GRÁFICO DE TENSIÓN DEL CIRCUITO

IC101 IC301 IC801

PIN PIN NAME VOLTAGE PIN PIN NAME VOLTAGE PIN PIN NAME VOLTAGE

AM FM TUNER CD B/T USB 1 TAB 0

Mode Mode MODE MODE MODE MODE 2 PWR_GND 0
1 AMRFIN 2.9 - 1 GND 0 0 0 0 3 OUT 7.2
2 AMRFDEC 4.2 - 2 FREG_B - - 13.6 - 4 STBY 5
3 FMIN2 - 3.1 3 FREG_F - - 1.24 - 5 OUT 7.2
4 FMIN1 - 3.1 4 ILL_8.4 8.4 8.4 8.4 8.4 6 VCC 14.3
5 GNDRF GND GND 5 CTL4(FREG) - - 5 - 7 OUT 7.2
6 VCC2 8.3 8.3 6 CD_8 V 8 8 8 8 8 PWR_GND 0
7 AMRFAGC 1.8 - 7 DSP_3.3 V 3.3 3.3 3.3 3.3 9 OUT 7.2
8 LOUT 3.8 3.8 8 BACK UP 14.1 14.1 14.1 14.1 10 RIPPLE 8.4
9 ROUT 3.8 3.8 9 CTL3(ILL) 5 5 5 5 11 IN 6.9
10 GNDAUD GND GND 10 AUDIO_8.4 V 8.4 8.4 8.4 8.4 12 IN 6.9
11 AMIFAGC2 - - 11 CTL1(6,7,10) 5 5 5 5 13 PRE_GND 0
12 MPXIN 3.7 3.7 12 EXT(P.ANT) 13.8 13.8 13.8 13.8 14 IN 6.9
13 MPXOUT 4 4 13 CTL2(P.ANT) 5 5 5 5 15 IN 6.9
14
15
RSSI
XTAL2
1.2
6
0.8
6
14
15
VDD_5.6 V
BACK UP

i 5.6
14.1
5.6
14.1
5.6
14.1
5.6
14.1
16
17
AC_GND
OUT
6.9
7.2
16
17
18
XTAL1
GNDD
SCL
6
GND
4.7
m6
GND
4.7
18
19
20
PWR_GND
OUT
VCC
0
7.2
14.3
19 SDA 3.9 3.9 21 OUT 7.2
20 VREF 4 4 22 MUTE 5
21 VREGSUP 7.1 7.1 23 OUT 7.2
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22 VCC1 8.3 8.3 24 PWR_GND 0
23 GND GND GND 25 OFFSET 6.4
24 VCODEC 5.7 5.7
25 PLL - -
26 PLLREF 2.25 2.25
27 TEST - -
28 AMSELIN1 1.55 -
29 AMSELIN2 1.55 -
30 AMIFAGC1 3 -
31 AMSELOUT1 6.8 -
32 AMSELOUT2 6.8 -

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 IC802 CN402
PIN PIN NAME VOLTAGE PIN PIN NAME VOLTAGE
1 CD_R 4.2 1 DI 0
2 CD_L 4.2 2 AGND 0
3 BT_R 4.2 3 DO 0
4 BT_L 4.2 4 LCH 0
5 TUNER_R 4.2 5 CLK 0
6 TUNER_L 4.2 6 AGND 3.259
7 AUX_R 4.2 7 LOAD_SW 0
8 DN 4.2 8 RCH 4.99
9 AUX_L 4.2 9 LG2TA 4.98
10 N.C 4.2 10 AGND 4.98
11 N.C 4.2 11 CE 0
12 N.C 4.2 12 8V 0
13 N.C 4.2 13 TA2LG 8.05
14 BEEP 4.2 14 3.3 V 0
15 MUTE 5 15 GND 0
16
17
LRST
LDOUT
-
-
16
17
GND
GND

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0
18
19
20
OUT_SL
OUT_SR
OUT_RL
4.2
4.2
4.2
m 18
19
20
GND
RESET
GND
5
4.98
0
21 OUT_RR 4.2 21 FEW_IN 4.99
22 OUT_FL 4.2 22 GND 5.02
23 OUT_FR 4.2 23 REW_IN 0
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24 VCC 8.4 24 GND 4.76
25 SCL 4.9 25 8/12 4.76
26 SDA 4.9 26 GND 1.54
27 GND 0 27 RESERVED 2.52
28 FIL 4.2 28 GND 2.52
29 CHUK_SW 5.06
30 GND 0.02

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 DIAGRAMA DE BLOQUE INTERNO DE CIs
1. IC301 (HA13173AH)
1-1. DIAGRAMA DE BLOQUE

+B
VB DBUP C1
8 100uF
C2
0.1uF
Over voltage detect 15 VBUP
3.5V
CTL 1
11 CBUP
100uF
1.5V BIAS TSD
CTL 2
13
VREF
2.5V
CTL 3 VDDOUT
9 14

CTL 4
2.5V

i CVDD
10uF
m5

2.5V
7
DSPOUT

CDSP
DEXT1 EXTOUT 10uF
12
DEXT2 VREF CDOUT
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CEXT 6
10uF CCD
VREF
ILMOUT 0.1uF
4
CILM
0.1uF
AUDIOOUT
10
FREG B
2 CAUDIO
10uF
QFREG 3 TAB
1
RFREG3
FREG F GND GND
CFREG RFREG1
10uF

RFREG2

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1-2. FUNCION DE PINES (Nota1)

Protection function
Pin No. Pin name Function Normal (Note2) (Note3) (Note3)
operation TSD On VB=24V VB=50V
1 GND Ground - - - -
2 FREG_B External Trs bass drive (Note4) On/Off On/Off Off Off
3 FREG_F FREG feedback terminal On/Off On/Off Off Off
4 ILMOUT 8.4 V output for JLM/500mAmax On/Off Off Off Off
5 CTL4 FREG control terminal - - - -
6 CDOUT 8.0 V output for CD/1.3Amax (Note4) On/Off Off Off Off
7 DSPOUT 3.3 V output for DSP/250mAmax (Note4) On/Off Off Off Off
8 VB Battery - - - -
9 CTL3 ILM control terminal - - - -
10 AUDIOOUT 8.4 V output for AUDIO/500mAmax (Note4) On/Off Off Off Off
11 CTL1 DSP, CD, Audio control terminal - - - -
12 EXTOUT High side output/600mAmax (Note4) On/Off Off Off Off
13 CTL2 EXT control terminal - - - -
14 VDDOUT 5.7 V output for micro controller (Note4) On On On Off
15 VBUP Back up - - - -

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Note1. In the uper table. “On” means always On. “Off” means compulsory Off and “On/Off” means that it can control by con-
trol terminal.
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Note2. Thermal protection circuit
A built-in thermal protection circuit (TSD:Thermal shut down) prevents thermal damage to the IC. All outputs except
VDD(pin14) and FREG (pin2&3) are switched off when the circuit operates, revert to the original state when the tem-
perature drops to a certain level.
Note3. Overvoltage protection circuit
The overvoltage protection circuit (surge protector) turns off all outputs without Vdd, when VB voltage is more than
about 21V. And the overvoltage protection circuit (surge protector) turns off Vdd output with other all outputs, when
VB voltage is more than about 26V. When the overvoltage protection operates on VB>=18V condition, the stand by
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current increases.
Note4. Overcurrent protection circuit
FREG_B (pin2), ILMOUT (pin4), CDOUT (pin6), DSPOUT (pin7), AUDIOOUT (pin10), EXITOUT (pin12), VDDOUT
(pin14) output circuits are built-in overcurrent protection circuit based on the respective output current. These over-
current protection circuits limit the current with a curve shape of “7” in the voltage-current graph. This prevents IC
destruction due to overcurrent.

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2. IC801 (TB2946HQ)
2-1. DIAGRAMA DE BLOQUE

C5

C3
C2
10 1 6 20
Ripple TAB VCC2 VCC1

C1 IN1
11 Out1 (+)
9

PW-GND1
8 RL
Out1 (-)
7

C1 IN2
12 Out2 (+)
5

PW-GND2
2 RL

13 Pre-GND

i 3
Out2 (-)
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C1
15
IN3
17
Out3 (+)

PW-GND3
18 RL
C6
16 AC-GND Out3 (-)
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19

C1 IN4
14 Out4 (+)
21

PW-GND4
5V 24 RL
4 Stby Out4 (-)
Play 23
R1
Mute 22 Mute
C4

Offset/short 25

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3. IC802 (BD3702FV)
3-1. DIAGRAMA DE BLOQUE

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3-2. DESCRIPCIÓN DE PINES

Terminal Terminal Terminal Terminal

Description Description
No. Name No. Name
1 A1 A input terminal of 1ch 15 MUTE External compulsory mute terminal
2 A2 A input terminal of 2ch 16 LRST Level meter reset terminal
3 B1 B input terminal of 1ch 17 LOUT Output terminal for Level meter
4 B2 B input terminal of 2ch 18 OUTS2 Subwoofer output terminal of 2ch
5 C1 C input terminal of 1ch 19 OUTS1 Subwoofer output terminal of 1ch
6 C2 C input terminal of 2ch 20 OUTR2 Rear output terminal of 2ch
7 DP1 D positive input terminal of 1ch 21 OUTR1 Rear output terminal of 1ch
8 DN D negative input terminal 22 OUTF2 Front output terminal of 2ch
9 DP2 D positive input terminal of 2ch 23 OUTF1 Front output terminal of 1ch
10 EP1 E positive input terminal of 1ch 24 VCC Power supply terminal
11 EN1 E negative input terminal of 1ch 25 SCL I2C Communication clock terminal
12 EN2 E negative input terminal of 2ch 26 SDA I2C Communication data terminal
13 EP2 E positive input terminal of 2ch 27 GND GND terminal
14 MIN Mixing input terminal 28 FIL VCC/2 terminal

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4. IC901 (MC5502)
4-1. CONFIGURACIÓN DE PINES

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4-2. DIAGRAMA DE BLOQUE
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4-3. DESCRIPCIÓN DE PINES

Pin No. Pin Name I/O Pin Description

1 ~ 12 SEG1/ P1 ~ O LCD Segment output pins / General-purpose output pins(Only 1/4Duty Mode)
SEG12/ P12 Select Segment output pins or General-purpose output pins by the instruction.
13 ~ 51 SEG13~SEG51 O LCD Segment output pins.
52 SEG52/ COM0 O LCD Segment output pin or LCD Common output pin.
SEG52 in 1/3 Duty use, COM0 in 1/4 Duty use.
53 ~ 55 COM1 ~ COM3 O LCD Common output pins.
57 INH\ I Display off control input pin
INH\ = VSS, Display forced off INH\ = VDD, Display on
58, 59 VLC1, VLC2 I/O LCD power supply
61 OSC I/O Oscillator output pin.
62 CE I Chip enable input pin
63 SCK I Shift clock input pin
64 SI I Serial Data input pin
56 VDD - Power supply
60 VSS - Ground

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DIAGRAMA DE CONEXIONES

B+, ACC,
Phone Mute,
Dimmer,
Speaker Out,
Power Ant Pick Up Motor

ANT POWER 17PIN 11PIN

HARNESS
SK101 CN519 CN506

CN302

30PIN 30PIN

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MICOM DSP
CN402 CN520

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8PIN 8PIN
USB /
CN301 Tuner Signal CN599

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MAIN BOARD
PN901

24PIN

24PIN
CD BOARD

1LINE LCD (VA TYPE)

CN971

FRONT BOARD
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2-
DIAGRAMA DE BLOQUE

LINE-OUT
BLOCK

F/L

R/R
F/R

R/L
LINE_OUT : 2V
FL FR RL/SW RR/SW

BACK/UP
OUT RR+
OUT FR+

OUT RL+

REMOTE
OUT RR-
OUT FL+

OUT FR-

OUT RL-
OUT FL-

T/MUTE
A/ANT

GND
MUTE

DIM

ACC

N.C
TUNER-On-Board NXP Tiger-RDS(IC101)

TB2946 ALL MODEL

RL/RR : LINE_OUT
SUBWOOFER OPTION

21

23
24
19

PW_GND 18
17
7

5
8

2
9

AGND
+

+
-

VCC2

KDS160E
FL FR RL RR TEL MUTE

20

800uH
AC_GND
MUTE

ST_BY

VCC1
SVR

BACK UP 14.4V
AM TUNER PLL TUNING POWER SUPPLY I2C BUS

13 S_GND
SYSTEM

25 HSD

1 TAB

A1504

C3875S
22
11

15

16
14
12

10
4
2.2K
FL
2.2K
SIGNAL FR TELMUTE_3.3V
STEREO DECODER 2.2K
IMPROVEMENT
HIGH CUT RL
FM TUNER RDS SOFT MUTE CONTROL
DEMODULATOR BANDWIDTH 2.2K
NOISE BLANKER RR BACKUP_ON_14.4V TEL_MUTE
CONTROL

22K
22K

22K

22K
SWLSWR

2
AGND

8.2V
CD

3
KDS181 1
AUDIO 8.4V
PLL TUNING
SYSTEM
USB

C3875S
PICK UP 87F14C8A
DSP SDRAM
GND

12MHz
LD LD
MD
R Tamul DVDD
DVDD USB 11P CNT FFC
ACC_IN
USB
T-
F-
F+ @refe

ON/OFF CONTROL
T+
PDGND KIA278R05 USB 5V
E E

DC OUTPUT
A A

DC INPUT
D D
C C B DVDD

GND
B B F

SPD
F

SLD
F

TD
FD
VC SVDD
2SA1797

1
VCC AVDD

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BACK UP 14.4V
L_MTR L_CTL MUTE CD MOTOR DRV 8V
AGND
SDA SCL USB_5V
C105S
C

I 2 C BUS LOGIC BUFFER B

F+
T+

SLD
SPD
FD
TD
T-
F-
DO CE CL E
USB_ON
UART_TX

DVDD
2.2UH

2.2UH
AM5810FM

AVDD

SVDD
2.2UH
+

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USB SW_OUT
+ DO CE CL

SP+
LO+
SL+

LO-
SL-
SL+ AGND
SL-
F F F F F SP+
LO- B1366
LO+

11.CHUCKING(SLED)
#3

28.OPTION SDRAM

CD_OPTION RAM
BT 3.3V BACK UP 14.4V
CD POWER 5V

CD_LOAD_SW

CD_SLED_SW
LPF

16.DR IC MUTE

26.ZERO MUTE
5. AUDIO 8.4V

14.DAC MUTE

29.5V MICOM

LIMIT_SW
22.SPI(DO)
+

20.SPI(CE)
19.SPI(CL)

12/8_SW
21.SPI(DI)
6. DSP 5V

18.RESET

25.INTIB2
13.CD 8V
9. LD SW

24.INTB1
15.PGND

23.SGND
7. DGND

10.12CM
2. AGND

4. AGND
3. CD_R
1. CD_L

17.REW
12.FEW

27.N.C

30.N.C
8. INN
LOUDNESS AGND
AGND
BD3702FV 3 Band P-EQ(Tone control) POWER VCC
BACK UP 14.4V
AUDIO 8.4V B+ DETACT
VDD_5.6V
VOLUME1/MUTE VDD_5V

LEVEL METER I2C

Bluetooth 5V KTA1504 @refe

INPUT GAIN ATT
C105S

@refe
4.7K
VDD_5V_1

PWR_5V
Input selector (3 single-end and 2 stereo ISO) NEC UPD78F1165GF MULTI Regulator
30,47,50,99,100 PIN(40mA)
19.2M MICOM STAND BY 5V POWER_ON
RAM Serial Interface FREG_B FREG_F
CTL1
AD CONVERTER VDD_5V PWR_5V KTA1504 @refe SENSE OVER
FLASH EEPROM RESET
(A1,A2) (B1,B2) (C1,C2) (DP1,DN,DP2) (EP1,EN1,EN2,EP2) (MIX) VOLT POWER_ON
S7133SF CTL1
TIMER 6,10

@refe
32.768K

4.7K
SYSTEM CONTROL TSD BIAS

jo AUX L/R
RESET VDD
FLMD0 VSS
REGC EVDD
16Bit/8Bit/Watch

59:B+ DETACT
ACC_OUT CTL2
12
CDP_PWR_ON_8V
PANT

PWR_5V
Operation Voltage BT 5V Vref DIMMER
1.8V to 5.5V CTL3
TUNER L/R I/O PORT CLOCK
PWR_5V 4 POWER_ON
CD L/R Total:71 MAIN CLOCK: 8MHz

VOL_DOWN
CMOS Output:1 78K0 CPU WDT CLOCK: 240KHz CTL4 ACC_OUT(B/T)

VOL_UP
N-ch O.D I/O:4 SUB CLOCK : 32.768KHz VDD_5.6V 200mA MAX 14
CMOS I/O:66
BLUETOOTH L/R CTL2
DSP 3.3V A.ANT
250mA MAX 600mA MAX
VDD_3.3V
7 12
2

CTL3

Vref
CD OUTPUT
1

LCD B_Lighting/LED
BT ANTENA 8.0V 1300mA MAX 8.4V 500mA MAX
6 4
Back up Voltage
VDD_5V_1
2
EEPROM AUDIO
8.4V/500mA MAX
CTL4

AUDIO 8.4V 10

BT 5V PWR_5V
BT MODULE

FRONT_OPEN
PWR_5V

LBMX-2CC9B
REMOCON_5V

Vnon-inv2
-Vcc +
4 Vnon-inv1 5
KEY2

KEY1

LEFT
-
+
DETACH S/W RESET_SW
RIGHT 3 -
Vinv2 6
1

4 2
FRONT_DETECT
LED 8.4V
2 Vinv1 Vo2 7 DIM_IN
3 1
4
2

Vo1 +Vcc
FRONT CLOSE

1 8 DIMMER_IN
LCD 8.4V

S4580
PWR_5V

3PIN

4PIN
13PIN

REMOTE IN @refe

BLUETOOTH MODULE (MCS LOGICS) FRONT BLOCK

VOUT
GND
GND

VCC
1
2
3

VOLUME UP/DN REMOTE IC

WHITE
BLUE

RED

4 5
E D LCD DRIVER IC
3

VOLUME
COGtype(Flip-D)_100P
4

4
2

A COM B MC5502(Detach)_64P
3

1 2 3
4

4
2

SWITCH1 SWITCH2
1/3 BIAS 1/4 DUTY

SEG CONTROLL

USB
JACK LCD

AUX_IN

2-29 2-
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DIAGRAMAS DE CIRCUITO
1. DIAGRAMA DEL CIRCUITO PRINCIPAL

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MAIN
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EBY60748501_3_1
2010. 06. 17
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2. DIAGRAMA DEL CIRCUITO FRONTAL

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FRONT
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EBY61308501_2_1
2011. 02. 15
A B C D E F G H I J K L M N O P Q R S T

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3. DIAGRAMA DEL CIRCUITO CDP

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CDP
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EBY60708101_4_3
2010. 06. 17
A B C D E F G H I J K L M N O P Q R S T

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