Electrical Characteristics of MOSFETs
Dae Hyun Kim
EECS
Washington State University
References
• John P. Uyemura, “Introduction to VLSI Circuits and Systems,” 2002.
– Chapter 6
• Neil H. Weste and David M. Harris, “CMOS VLSI Design: A Circuits
and Systems Perspective,” 2011.
– Chapter 2
Goal
• Understand the electrical characteristics of MOSFETs.
MOS Physics – Threshold Voltage (nFET)
• Oxide capacitance per unit area (𝐹𝐹/𝑚𝑚2 )
𝜀𝜀
– 𝑐𝑐𝑜𝑜𝑜𝑜 = 𝑡𝑡𝑜𝑜𝑜𝑜
𝑜𝑜𝑜𝑜
• Surface charge per unit area (𝐶𝐶/𝑚𝑚2 )
– 𝑄𝑄𝑆𝑆 = −𝑐𝑐𝑜𝑜𝑜𝑜 𝑉𝑉𝐺𝐺
• 𝑉𝑉𝐺𝐺 = 𝑉𝑉𝑜𝑜𝑜𝑜 + 𝜙𝜙𝑆𝑆
– 𝜙𝜙𝑆𝑆 : surface potential
𝑉𝑉𝐺𝐺 𝑉𝑉𝐺𝐺 > 0 Voltage
M O S
electric field
G 𝜙𝜙𝑆𝑆 G 𝑉𝑉𝐺𝐺
+ 𝑉𝑉
𝑡𝑡𝑜𝑜𝑜𝑜 − 𝑜𝑜𝑜𝑜 𝑉𝑉𝑜𝑜𝑜𝑜
n+ n+ n+ n+
p-sub p-sub 𝜙𝜙𝑆𝑆
Distance
surface charge
MOS Physics – Threshold Voltage (nFET)
• Force on a charged particle
– 𝐹𝐹 = 𝑄𝑄𝑝𝑝𝑝𝑝𝑝𝑝𝑝𝑝𝑝𝑝𝑝𝑝𝑝𝑝𝑝𝑝 𝐸𝐸
• 𝐹𝐹𝑒𝑒 = −𝑞𝑞𝑞𝑞 (for electrons)
• 𝐹𝐹ℎ = +𝑞𝑞𝑞𝑞 (for holes)
• Bulk charge density (negative charge on the surface)
– 𝑄𝑄𝐵𝐵 = − 2𝑞𝑞𝜀𝜀𝑠𝑠𝑠𝑠 𝑁𝑁𝑎𝑎 𝜙𝜙𝑠𝑠
– 𝑄𝑄𝐵𝐵 = −𝑐𝑐𝑜𝑜𝑜𝑜 𝑉𝑉𝑜𝑜𝑜𝑜
1
• 𝑉𝑉𝑜𝑜𝑜𝑜 = 2𝑞𝑞𝜀𝜀𝑠𝑠𝑠𝑠 𝑁𝑁𝑎𝑎 𝜙𝜙𝑠𝑠
𝑐𝑐𝑜𝑜𝑜𝑜
𝑉𝑉𝐺𝐺 > 0
• Depletion region (depleted of free electrons and holes)
– Holes: forced away electric field
𝜙𝜙𝑆𝑆 G
– Electrons: absorbed by the dopant atoms.
+ 𝑉𝑉
− 𝑜𝑜𝑜𝑜
n+ n+
depletion region p-sub
surface charge
MOS Physics – Threshold Voltage (nFET)
• 𝑉𝑉𝐺𝐺 < 𝑉𝑉𝑇𝑇𝑇𝑇
𝑉𝑉𝐺𝐺 > 𝑉𝑉𝑇𝑇𝑇𝑇
– 𝑄𝑄𝑆𝑆 = 𝑄𝑄𝐵𝐵
• 𝑉𝑉𝐺𝐺 > 𝑉𝑉𝑇𝑇𝑇𝑇 electron layer 𝑄𝑄𝑒𝑒
– 𝑄𝑄𝑆𝑆 = 𝑄𝑄𝐵𝐵 + 𝑄𝑄𝑒𝑒 < 0 G
– The additional electrons are movable.
• 𝑄𝑄𝑒𝑒 = −𝑐𝑐𝑜𝑜𝑜𝑜 (𝑉𝑉𝐺𝐺 − 𝑉𝑉𝑇𝑇𝑇𝑇 ) n+ n+
• Surface potential p-sub
– 𝜙𝜙𝑆𝑆 = 2|𝜙𝜙𝐹𝐹 |
bulk charge
• |𝜙𝜙𝐹𝐹 |: bulk Fermi potential
𝑘𝑘𝑘𝑘 𝑁𝑁𝑎𝑎
• 𝜙𝜙𝐹𝐹 = ln
𝑞𝑞 𝑛𝑛𝑖𝑖
• Threshold voltage for an ideal MOS structure
1
– 𝑉𝑉𝑇𝑇𝑇𝑇 = 𝑉𝑉𝑜𝑜𝑜𝑜 |𝜙𝜙𝑆𝑆 =2|𝜙𝜙𝐹𝐹 | + 2 𝜙𝜙𝐹𝐹 = 2𝑞𝑞𝜀𝜀𝑠𝑠𝑠𝑠 𝑁𝑁𝑎𝑎 (2 𝜙𝜙𝐹𝐹 ) + 2 𝜙𝜙𝐹𝐹
𝑐𝑐𝑜𝑜𝑜𝑜
• A general expression
1 𝑞𝑞𝐷𝐷𝐼𝐼
– 𝑉𝑉𝑇𝑇𝑇𝑇 = 2𝑞𝑞𝜀𝜀𝑠𝑠𝑠𝑠 𝑁𝑁𝑎𝑎 (2 𝜙𝜙𝐹𝐹 ) + 2 𝜙𝜙𝐹𝐹 + 𝑉𝑉𝐹𝐹𝐹𝐹 +
𝑐𝑐𝑜𝑜𝑜𝑜 𝑐𝑐𝑜𝑜𝑜𝑜
• 𝑉𝑉𝐹𝐹𝐹𝐹 : flatband voltage
• 𝐷𝐷𝐼𝐼 : implant dose
MOS Physics – I-V Characteristics (nFET)
• Cutoff
– 𝑉𝑉𝐺𝐺𝐺𝐺 < 𝑉𝑉𝑇𝑇𝑇𝑇
𝑉𝑉𝐷𝐷
– 𝐼𝐼𝐷𝐷 = 0 +
– Open switch 𝑉𝑉𝐺𝐺 𝑉𝑉𝐷𝐷𝐷𝐷 𝐼𝐼𝐷𝐷
+
−
𝑉𝑉𝐺𝐺𝐺𝐺 𝑉𝑉𝑆𝑆
−
• Active
– 𝑉𝑉𝐺𝐺𝐺𝐺 > 𝑉𝑉𝑇𝑇𝑇𝑇
– If 𝑉𝑉𝐷𝐷𝐷𝐷 = 𝑉𝑉𝐷𝐷𝐷𝐷
1 𝑊𝑊 1 𝑊𝑊 1
• 𝐼𝐼𝐷𝐷 = 𝜇𝜇𝑛𝑛 𝑐𝑐𝑜𝑜𝑜𝑜 𝑉𝑉𝐺𝐺𝐺𝐺 − 𝑉𝑉𝑇𝑇𝑇𝑇 2
= 𝑘𝑘𝑛𝑛 ′ 𝑉𝑉𝐺𝐺𝐺𝐺 − 𝑉𝑉𝑇𝑇𝑇𝑇 2
= 𝛽𝛽𝑛𝑛 𝑉𝑉𝐺𝐺𝐺𝐺 − 𝑉𝑉𝑇𝑇𝑇𝑇 2
2 𝐿𝐿 2 𝐿𝐿 2
𝐼𝐼𝐷𝐷
cutoff active
𝑉𝑉𝐺𝐺𝐺𝐺
0
𝑉𝑉𝑇𝑇𝑇𝑇
MOS Physics – I-V Characteristics (nFET)
• Active
– 𝑉𝑉𝐺𝐺𝐺𝐺 > 𝑉𝑉𝑇𝑇𝑇𝑇
– If 𝑉𝑉𝐷𝐷𝐷𝐷 varies
𝑊𝑊 1 1
• 𝐼𝐼𝐷𝐷 = 𝜇𝜇𝑛𝑛 𝑐𝑐𝑜𝑜𝑜𝑜 { 𝑉𝑉𝐺𝐺𝐺𝐺 − 𝑉𝑉𝑇𝑇𝑇𝑇 𝑉𝑉𝐷𝐷𝐷𝐷 − 𝑉𝑉𝐷𝐷𝑆𝑆 2 } = 𝛽𝛽𝑛𝑛 { 𝑉𝑉𝐺𝐺𝐺𝐺 − 𝑉𝑉𝑇𝑇𝑇𝑇 𝑉𝑉𝐷𝐷𝐷𝐷 − 𝑉𝑉𝐷𝐷𝐷𝐷 2 }
𝐿𝐿 2 2
𝜕𝜕𝐼𝐼𝐷𝐷
• The saturation occurs when = 0.
𝜕𝜕𝑉𝑉𝐷𝐷𝑆𝑆
– 𝑉𝑉𝐷𝐷𝑆𝑆,𝑠𝑠𝑠𝑠𝑠𝑠 = 𝑉𝑉𝐺𝐺𝐺𝐺 − 𝑉𝑉𝑇𝑇𝑇𝑇 (saturation voltage)
– If 𝑉𝑉𝐷𝐷𝐷𝐷 ≥ 𝑉𝑉𝐺𝐺𝐺𝐺 − 𝑉𝑉𝑇𝑇𝑇𝑇
• Saturation
1 2
• 𝐼𝐼𝐷𝐷 = 𝛽𝛽𝑛𝑛 𝑉𝑉𝐺𝐺𝐺𝐺 − 𝑉𝑉𝑇𝑇𝑇𝑇
2
1 𝐼𝐼𝐷𝐷
• 𝐼𝐼𝐷𝐷 = 𝛽𝛽 𝑉𝑉𝐺𝐺𝐺𝐺 − 𝑉𝑉𝑇𝑇𝑇𝑇 2 [1 + λ(𝑉𝑉𝐷𝐷𝐷𝐷 − 𝑉𝑉𝑠𝑠𝑠𝑠𝑠𝑠 )]
2 𝑛𝑛
– λ: Channel-length modulation parameter non-saturation saturation
𝑉𝑉𝐷𝐷𝐷𝐷
0
𝑉𝑉𝑠𝑠𝑠𝑠𝑠𝑠
MOS Physics – I-V Characteristics (nFET)
• Body-bias effects
– occurs when 𝑉𝑉𝑆𝑆𝑆𝑆 > 0.
• 𝑉𝑉𝐵𝐵 : bulk potential
𝑉𝑉𝐷𝐷
– 𝑉𝑉𝑇𝑇𝑇𝑇 = 𝑉𝑉𝑇𝑇𝑇𝑇𝑇 + 𝛾𝛾( 2 𝜙𝜙𝐹𝐹 + 𝑉𝑉𝑆𝑆𝑆𝑆 − 2 𝜙𝜙𝐹𝐹 )
• 𝛾𝛾: Body-bias coefficient 𝑉𝑉𝐺𝐺
2𝑞𝑞𝜀𝜀𝑠𝑠𝑠𝑠 𝑁𝑁𝑎𝑎
– 𝛾𝛾 = 𝑉𝑉𝑆𝑆 +
𝑐𝑐𝑜𝑜𝑜𝑜 𝑉𝑉𝑆𝑆𝑆𝑆 − 𝑉𝑉𝐵𝐵
• 2 𝜙𝜙𝐹𝐹 : Bulk Fermi potential
• Example (NAND3)
𝑉𝑉𝑆𝑆𝑆 > 0 ⟹ 𝑉𝑉𝑆𝑆𝐵𝐵𝐵 > 0 ⟹ 𝑉𝑉𝑇𝑇𝑇𝑇 > 𝑉𝑉𝑇𝑇0𝑛𝑛
𝑉𝑉𝑆𝑆𝑆 > 0 ⟹ 𝑉𝑉𝑆𝑆𝐵𝐵𝐵 > 0 ⟹ 𝑉𝑉𝑇𝑇𝑇𝑇 > 𝑉𝑉𝑇𝑇0𝑛𝑛
𝑉𝑉𝑆𝑆𝑆 = 0 ⟹ 𝑉𝑉𝑆𝑆𝐵𝐵𝐵 = 0 ⟹ 𝑉𝑉𝑇𝑇𝑇𝑇 = 𝑉𝑉𝑇𝑇0𝑛𝑛
MOS Physics – I-V Characteristics (nFET)
• Derivation 𝑉𝑉𝐺𝐺
𝑑𝑑𝑑𝑑
– 𝐸𝐸 𝑦𝑦 = − channel
𝑑𝑑𝑑𝑑
• Boundary conditions G 𝑉𝑉𝐷𝐷
– 𝑉𝑉 0 = 0
– 𝑉𝑉 𝐿𝐿 = 𝑉𝑉𝐷𝐷𝐷𝐷
n+ n+
– Charge 𝐸𝐸
• 𝑄𝑄𝑒𝑒 𝑦𝑦 = −𝑐𝑐𝑜𝑜𝑜𝑜 [𝑉𝑉𝐺𝐺𝐺𝐺 − 𝑉𝑉𝑇𝑇𝑇𝑇 − 𝑉𝑉(𝑦𝑦)] p-sub
– 𝑑𝑑𝑑𝑑 = 𝐼𝐼𝐷𝐷 𝑑𝑑𝑑𝑑
1 𝑑𝑑𝑑𝑑 1 𝑑𝑑𝑑𝑑 𝑦𝑦
– 𝑑𝑑𝑑𝑑 = ∙ = ∙ 0 𝐿𝐿
𝜎𝜎𝑛𝑛 𝐴𝐴𝑛𝑛 𝑞𝑞∙𝑢𝑢𝑛𝑛 ∙𝑛𝑛𝑒𝑒 𝑊𝑊∙𝑥𝑥𝑒𝑒
• 𝑥𝑥𝑒𝑒 : channel thickness
𝑉𝑉𝑆𝑆 = 0𝑉𝑉 −
𝑑𝑑𝑑𝑑+ 𝑉𝑉𝐷𝐷
– Channel charge density
• 𝑄𝑄𝑒𝑒 = −𝑞𝑞𝑛𝑛𝑒𝑒 𝑥𝑥𝑒𝑒 𝑊𝑊 𝐼𝐼𝐷𝐷
𝐼𝐼𝐷𝐷 𝑑𝑑𝑑𝑑 𝐼𝐼𝐷𝐷 𝑑𝑑𝑑𝑑 n+ n+
– 𝑑𝑑𝑑𝑑 = − =
𝜇𝜇𝑛𝑛 𝑊𝑊𝑄𝑄𝑒𝑒 𝜇𝜇𝑛𝑛 𝑊𝑊𝑐𝑐𝑜𝑜𝑜𝑜 (𝑉𝑉𝐺𝐺𝐺𝐺 −𝑉𝑉𝑇𝑇𝑇𝑇 −𝑉𝑉)
𝐿𝐿 𝑉𝑉
– 𝐼𝐼𝐷𝐷 ∫0 𝑑𝑑𝑑𝑑 = 𝜇𝜇𝑛𝑛 𝑊𝑊𝑐𝑐𝑜𝑜𝑜𝑜 ∫0 𝐷𝐷𝐷𝐷 [𝑉𝑉𝐺𝐺𝐺𝐺 − 𝑉𝑉𝑇𝑇𝑇𝑇 − 𝑉𝑉]𝑑𝑑𝑉𝑉 𝑑𝑑𝑑𝑑
𝑦𝑦
𝑊𝑊 1 0 𝐿𝐿
– 𝐼𝐼𝐷𝐷 = 𝜇𝜇𝑛𝑛 𝑐𝑐𝑜𝑜𝑜𝑜 [ 𝑉𝑉𝐺𝐺𝐺𝐺 − 𝑉𝑉𝑇𝑇𝑇𝑇 𝑉𝑉𝐷𝐷𝑆𝑆 − 𝑉𝑉𝐷𝐷𝐷𝐷 2 ]
𝐿𝐿 2
MOS Physics – FET RC Model
• FET RC models provide simplified linear models.
𝑉𝑉𝐺𝐺
𝑉𝑉𝐺𝐺
𝑅𝑅𝑛𝑛
𝑉𝑉𝑆𝑆 𝑉𝑉𝐷𝐷
𝑉𝑉𝑆𝑆 𝑉𝑉𝐷𝐷
𝑊𝑊 𝐶𝐶𝑆𝑆 𝐶𝐶𝐷𝐷
𝐿𝐿 𝑛𝑛
• 𝑅𝑅𝑛𝑛 varies depending on 𝑉𝑉𝐷𝐷𝐷𝐷 .
𝑉𝑉𝐷𝐷𝐷𝐷
– 𝑅𝑅𝑛𝑛 = 𝐼𝐼𝐷𝐷
1
– At a: 𝑅𝑅𝑛𝑛 ≈
𝛽𝛽𝑛𝑛 (𝑉𝑉𝐺𝐺𝐺𝐺 −𝑉𝑉𝑇𝑇𝑇𝑇 )
1
– At b: 𝑅𝑅𝑛𝑛 = 1
𝛽𝛽𝑛𝑛 [ 𝑉𝑉𝐺𝐺𝐺𝐺 −𝑉𝑉𝑇𝑇𝑇𝑇 −2𝑉𝑉𝐷𝐷𝐷𝐷 ] 𝐼𝐼𝐷𝐷
2𝑉𝑉𝐷𝐷𝐷𝐷
– At c: 𝑅𝑅𝑛𝑛 = 𝛽𝛽𝑛𝑛 (𝑉𝑉𝐺𝐺𝑆𝑆 −𝑉𝑉𝑇𝑇𝑇𝑇 )2 b
c
– In general
𝜂𝜂
a
• 𝑅𝑅𝑛𝑛 = (𝜂𝜂 = 1~6). 𝑉𝑉𝐷𝐷𝐷𝐷
𝛽𝛽𝑛𝑛 (𝑉𝑉𝐷𝐷𝐷𝐷 −𝑉𝑉𝑇𝑇𝑇𝑇 )
0
𝑉𝑉𝑠𝑠𝑠𝑠𝑠𝑠
MOS Physics – FET RC Model
• Capacitance
– MOS capacitance 𝐶𝐶𝐺𝐺𝐺𝐺 G 𝐶𝐶𝐺𝐺𝐺𝐺
• 𝐶𝐶𝐺𝐺 = 𝑐𝑐𝑜𝑜𝑜𝑜 𝐴𝐴𝐺𝐺 (gate capacitance)
1
• 𝐶𝐶𝐺𝐺𝐺𝐺 ≈ 𝐶𝐶𝐺𝐺𝐷𝐷 ≈ 𝐶𝐶𝐺𝐺 S D
2
– Junction (depletion) capacitance
𝑉𝑉𝐺𝐺
𝐶𝐶0
• 𝐶𝐶 = 𝑉𝑉 𝑚𝑚𝑗𝑗
1+ 𝑅𝑅
𝜙𝜙0
– 𝐶𝐶0 = 𝐶𝐶𝑗𝑗 𝐴𝐴𝑝𝑝𝑝𝑝 G
» zero-bias capacitance
n+ n+ 𝑥𝑥𝑗𝑗
» 𝐶𝐶𝑗𝑗 : given
» 𝐴𝐴𝑝𝑝𝑝𝑝 : pn junction area p-sub
– 𝜙𝜙0 : built-in potential
– 𝑚𝑚𝑗𝑗 : grading coefficient
• 𝐶𝐶𝑛𝑛 = 𝐶𝐶𝑏𝑏𝑏𝑏𝑏𝑏 + 𝐶𝐶𝑠𝑠𝑠𝑠 = 𝐶𝐶𝑗𝑗 𝑋𝑋𝑋𝑋 + 𝐶𝐶𝑗𝑗 𝑥𝑥𝑗𝑗 (2𝑊𝑊 + 2𝑋𝑋)
𝐶𝐶𝑗𝑗 𝑋𝑋𝑋𝑋 𝐶𝐶𝑗𝑗 𝑥𝑥𝑗𝑗 (2𝑊𝑊+2𝑋𝑋) S G D 𝑊𝑊
• 𝐶𝐶𝑛𝑛 = 𝑉𝑉 𝑚𝑚𝑗𝑗 + 𝑉𝑉𝑅𝑅 𝑚𝑚𝑗𝑗𝑠𝑠𝑠𝑠
1+ 𝑅𝑅 1+
𝜙𝜙0 𝜙𝜙0𝑠𝑠𝑠𝑠
𝑋𝑋
MOS Physics – FET RC Model
• FET RC model
𝐶𝐶𝐺𝐺𝐺𝐺 G 𝐶𝐶𝐺𝐺𝐺𝐺
S D
𝐶𝐶𝑆𝑆𝑆𝑆 𝐶𝐶𝐷𝐷𝐷𝐷
– 𝐶𝐶𝑆𝑆 = 𝐶𝐶𝐺𝐺𝑆𝑆 + 𝐶𝐶𝑆𝑆𝐵𝐵
– 𝐶𝐶𝐷𝐷 = 𝐶𝐶𝐺𝐺𝐺𝐺 + 𝐶𝐶𝐷𝐷𝐵𝐵
𝑉𝑉𝐺𝐺
𝑉𝑉𝐺𝐺
𝑅𝑅𝑛𝑛
𝑉𝑉𝑆𝑆 𝑉𝑉𝐷𝐷
𝑉𝑉𝑆𝑆 𝑉𝑉𝐷𝐷
𝑊𝑊 𝐶𝐶𝑆𝑆 𝐶𝐶𝐷𝐷
𝐿𝐿 𝑛𝑛
MOS Physics – pFET
• 𝑉𝑉𝑆𝑆𝑆𝑆 < |𝑉𝑉𝑇𝑇𝑇𝑇 |
– 𝑄𝑄ℎ = 0
• 𝑉𝑉𝑆𝑆𝑆𝑆 > |𝑉𝑉𝑇𝑇𝑇𝑇 |
– 𝑄𝑄ℎ > 0
• Threshold voltage
1 𝑞𝑞𝐷𝐷𝐼𝐼
– 𝑉𝑉𝑇𝑇𝑇𝑇 = − 2𝑞𝑞𝜀𝜀𝑠𝑠𝑠𝑠 𝑁𝑁𝑑𝑑 2𝜙𝜙𝐹𝐹𝐹𝐹 − 2𝜙𝜙𝐹𝐹𝐹𝐹 + 𝑉𝑉𝐹𝐹𝐹𝐹𝐹𝐹 ∓ 𝑐𝑐
𝑐𝑐𝑜𝑜𝑜𝑜 𝑜𝑜𝑜𝑜
𝑘𝑘𝑘𝑘 𝑁𝑁𝑑𝑑
• 2𝜙𝜙𝐹𝐹𝐹𝐹 = 2 ln : surface potential
𝑞𝑞 𝑛𝑛𝑖𝑖
• 𝑉𝑉𝐹𝐹𝐹𝐹𝐹𝐹 : flatband voltage
𝑉𝑉𝑆𝑆
𝑉𝑉𝐺𝐺 current
𝑉𝑉𝐷𝐷
MOS Physics – pFET
• Cutoff
– 𝑉𝑉𝑆𝑆𝑆𝑆 < |𝑉𝑉𝑇𝑇𝑇𝑇 | 𝑉𝑉𝑆𝑆
+
𝑉𝑉𝑆𝑆𝑆𝑆
– 𝐼𝐼𝐷𝐷 = 0 +
𝑉𝑉𝐺𝐺 −
– Open switch 𝑉𝑉𝑆𝑆𝑆𝑆 𝐼𝐼𝐷𝐷
−
𝑉𝑉𝐷𝐷
• Active
– 𝑉𝑉𝑆𝑆𝐺𝐺 > |𝑉𝑉𝑇𝑇𝑝𝑝 |
– If 𝑉𝑉𝑆𝑆𝑆𝑆 = 𝑉𝑉𝐷𝐷𝐷𝐷
1 𝑊𝑊 2 1 𝑊𝑊 2 1 2
• 𝐼𝐼𝐷𝐷 = 𝜇𝜇𝑝𝑝 𝑐𝑐𝑜𝑜𝑜𝑜 𝑉𝑉𝑆𝑆𝑆𝑆 − |𝑉𝑉𝑇𝑇𝑇𝑇 | = 𝑘𝑘𝑝𝑝 ′ 𝑉𝑉𝑆𝑆𝑆𝑆 − |𝑉𝑉𝑇𝑇𝑇𝑇 | = 𝛽𝛽𝑝𝑝 𝑉𝑉𝑆𝑆𝑆𝑆 − |𝑉𝑉𝑇𝑇𝑇𝑇 |
2 𝐿𝐿 2 𝐿𝐿 2
𝐼𝐼𝐷𝐷
cutoff active
𝑉𝑉𝑆𝑆𝑆𝑆
0
|𝑉𝑉𝑇𝑇𝑇𝑇 |
MOS Physics – pFET
• Active
– 𝑉𝑉𝑆𝑆𝐺𝐺 > |𝑉𝑉𝑇𝑇𝑝𝑝 |
– If 𝑉𝑉𝑆𝑆𝑆𝑆 varies
𝑊𝑊 1 1
• 𝐼𝐼𝐷𝐷 = 𝜇𝜇𝑝𝑝 𝑐𝑐𝑜𝑜𝑜𝑜 { 𝑉𝑉𝑆𝑆𝑆𝑆 − |𝑉𝑉𝑇𝑇𝑇𝑇 | 𝑉𝑉𝑆𝑆𝑆𝑆 − 𝑉𝑉𝑆𝑆𝑆𝑆 2 } = 𝛽𝛽𝑝𝑝 { 𝑉𝑉𝑆𝑆𝐺𝐺 − |𝑉𝑉𝑇𝑇𝑝𝑝 | 𝑉𝑉𝑆𝑆𝐷𝐷 − 𝑉𝑉𝑆𝑆𝐷𝐷 2 }
𝐿𝐿 2 2
𝜕𝜕𝐼𝐼𝐷𝐷
• The saturation occurs when = 0.
𝜕𝜕𝑉𝑉𝑆𝑆𝑆𝑆
– 𝑉𝑉𝑆𝑆𝑆𝑆,𝑠𝑠𝑠𝑠𝑠𝑠 = 𝑉𝑉𝑆𝑆𝐺𝐺 − |𝑉𝑉𝑇𝑇𝑇𝑇 | (saturation voltage)
– If 𝑉𝑉𝑆𝑆𝑆𝑆 ≥ 𝑉𝑉𝑆𝑆𝑆𝑆 − |𝑉𝑉𝑇𝑇𝑇𝑇 |
• Saturation
1 2
• 𝐼𝐼𝐷𝐷 = 𝛽𝛽𝑝𝑝 𝑉𝑉𝑆𝑆𝐺𝐺 − |𝑉𝑉𝑇𝑇𝑝𝑝 |
2
𝐼𝐼𝐷𝐷
non-saturation saturation
• pFET resistance
1
– 𝑅𝑅𝑝𝑝 =
𝛽𝛽𝑝𝑝 (𝑉𝑉𝐷𝐷𝐷𝐷 −|𝑉𝑉𝑇𝑇𝑇𝑇 |)
𝑉𝑉𝑆𝑆𝑆𝑆
0
𝑉𝑉𝑠𝑠𝑠𝑠𝑠𝑠
