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Instructions For Stack Operations

A stack is a collection of memory locations that follows the LIFO (last-in, first-out) principle. The stack pointer (SP) tracks the latest data written to the stack. PUSH places data onto the stack and decrements SP, while POP removes data from the stack and increments SP. String instructions operate on source and destination strings pointed to by SI and DI respectively, repeating as specified by the count in CX for REP prefixes. Macros provide a way to group instructions that perform a single task without procedure calls.

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84 views9 pages

Instructions For Stack Operations

A stack is a collection of memory locations that follows the LIFO (last-in, first-out) principle. The stack pointer (SP) tracks the latest data written to the stack. PUSH places data onto the stack and decrements SP, while POP removes data from the stack and increments SP. String instructions operate on source and destination strings pointed to by SI and DI respectively, repeating as specified by the count in CX for REP prefixes. Macros provide a way to group instructions that perform a single task without procedure calls.

Uploaded by

vasu007
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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Instructions for Stack Operations

 What is a Stack ?
— A stack is a collection of memory locations. It always follows the rule of
last-in-firs-out
— Generally, SS and SP are used to trace where is the latest date written into stack

 PUSH Source
— Push data (word) onto stack
— It does not modify flags
— For Example: PUSH AX (assume ax=1234H, SS=1000H, SP=2000H
before PUSH AX)

1000:1FFD ?? 1000:1FFD ??
1000:1FFE ?? SS:SP 1000:1FFE 34
1000:1FFF ?? 1000:1FFF 12
SS:SP 1000:2000 ?? 1000:2000 ?? 12 34

Before PUSH AX, SP = 2000H After PUSH AX, SP = 1FFEH AX

 Decrementing the stack pointer during a push is a standard way of implementing stacks in hardware
8-1
Instructions for Stack Operations
 PUSHF
— Push the values of the flag register onto stack
— It does not modify flags

 POP Destination
— Pop word off stack
— It does not modify flags
— For example: POP AX

1000:1FFD ?? 1000:1FFD ??
SP 1000:1FFE 34 1000:1FFE 34
1000:1FFF 12 1000:1FFF 12
1000:2000 EC SP 1000:2000 EC 12 34

After POP AX, SP = 2000H AX


Before POP, SP = 1FFEH

 POPF
— Pop word from the stack to the flag register
— It modifies all flags 8-2
String Instructions
 String is a collection of bytes, words, or long-words that can be up to 64KB
in length
 String instructions can have at most two operands. One is referred to as source
string and the other one is called destination string
— Source string must locate in Data Segment and SI register points to the current
element of the source string
— Destination string must locate in Extra Segment and DI register points to the current
element of the destination string
DS : SI ES : DI
0510:0000 53 S 02A8:2000 53 S
0510:0001 48 H 02A8:2001 48 H
0510:0002 4F O 02A8:2002 4F O
0510:0003 50 P 02A8:2003 50 P
0510:0004 50 P 02A8:2004 50 P
0510:0005 45 E 02A8:2005 49 I
0510:0006 52 R 02A8:2006 4E N
Source String Destination String 8-3
Repeat Prefix Instructions
 REP String Instruction
— The prefix instruction makes the microprocessor repeatedly execute the string instruction
until CX decrements to 0 (During the execution, CX is decreased by one when the string
instruction is executed one time).
— For Example:

MOV CX, 5
REP MOVSB
By the above two instructions, the microprocessor will execute MOVSB 5 times.

— Execution flow of REP MOVSB::

While (CX!=0) Check_CX: If CX!=0 Then


{ CX = CX –1;
CX = CX –1; OR MOVSB;
MOVSB; goto Check_CX;
} end if

8-4
Macros
• A group of instructions that perform one task, just as a
procedure performs one task.
– a procedure is accessed via a CALL instruction
– a macro & all instructions defined in the macro,
is inserted in the program at the point of usage
• Creating a macro is very similar to creating a new
opcode
• Macros execute faster than procedures because there is
no CALL or RET instruction to execute.
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Timing and Delays

10/15/2010 7
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10/15/2010 9

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