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Epic 2: Wire IR into the compilation pipeline (AST → TAC → MIPS) #18

@aalhour

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@aalhour

Epic 2: Wire IR into the compilation pipeline (AST → TAC → MIPS)

Goal: IR is not a teaching demo; it actually drives codegen and optimizations.

  • Define pipeline stages explicitly:
    • parse → sema → lower-to-TAC → optimize → regalloc/stack-alloc → emit MIPS
  • Ensure TAC lowering covers all COOL constructs (if not already complete)
  • Write a TAC-to-MIPS code generator (new backend):
    • calling convention (args, return, saved regs)
    • stack frame layout rules
    • object layout / runtime calls
    • string ops (concat, length, substr) correctness
  • Keep current AST-to-MIPS backend temporarily as reference/fallback
  • Add integration tests comparing TAC-path output vs AST-path output (until AST path is retired)

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