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Releases: google/xls

v0.0.0-9647-ge05081cec

07 Mar 07:57

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Integrate LLVM at llvm/llvm-project@5f1683ca1a4a

Updates LLVM usage to match
[5f1683ca1a4a](https://github.com/llvm/llvm-project/commit/5f1683ca1a4a)

PiperOrigin-RevId: 879769087

v0.0.0-9645-g3fea640e5

06 Mar 08:04

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Automated Code Change

PiperOrigin-RevId: 879421320

v0.0.0-9617-g528010031

05 Mar 08:04

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[NFC] Make `LazyDagCache::QueryValue` non-recursive

Besides overall goodness in removing recursion in a compiler - avoid stack overflows in the case of large graphs - it also shows a small (~5%) perf improvement in some benchmarks.

PiperOrigin-RevId: 878636906

v0.0.0-9609-g9dff5297e

04 Mar 08:02

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Merge pull request #3867 from xlsynth:cdleary/2026-02-19-resolve-tiv2…

v0.0.0-9591-g36d7a75f5

28 Feb 07:55

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Fix bug with match arm result of a type defined within the arm.

The issue was that in a case like
```
match X {
  u32:1 => u3:2,
  _ => {
    type InternalType = uN[Y + 1];
    InternalType:3
  }
}
```

the type unification of `u3:2` in the first arm would unify [`u3`, `InternalType`] when the constants that the latter depends on had not been collected yet due to later appearance.

Fixes #3892

PiperOrigin-RevId: 876504126

v0.0.0-9585-gef984869e

26 Feb 08:10

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Automated Code Change

PiperOrigin-RevId: 875454978

v0.0.0-9582-g3e13fe0bc

25 Feb 08:08

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Remove annotations from std.x that TIv2 does not require.

This is slightly conservative in that it does not remove them in situations where they might be desirable for readability or asserting the size of a parametric function result.

PiperOrigin-RevId: 874856499

v0.0.0-9575-gc103e450b

24 Feb 08:08

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Add io_printer_main tool.

This tool dumps information about IO operations (Send/Receive) from a scheduled XLS IR package. It can take either an IR file with embedded schedule information or an IR file combined with a separate schedule proto. The output shows the pipeline stage, direction, blocking status (for receives), and channel name for each IO node.

This can be helpful for determining relevant differences between two schedules.

PiperOrigin-RevId: 874120868

v0.0.0-9573-g6548edd59

23 Feb 08:11

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Automated Code Change

PiperOrigin-RevId: 873688680

v0.0.0-9571-g40462772c

22 Feb 08:02

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Fix for some mutual exclusion errors

The "FSM active" part of the predicate for the IO was just coming from the wrong slice, should be the slice before not the slice after. The IO operation
happens after the slice that produces its predicate, and before the slice that consumes any output value (such as received data).

For a receive, the received data is available "live", not through a state element,
when the slice before it is active, supplying its predicate.

PiperOrigin-RevId: 873372705