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Commits on Mar 10, 2024

• Registered clk_gate to easy timing closure.

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Commits on Feb 20, 2024

• CHANGE: parameter APP_CLK_RATIO replaced by APP_CLK_FREQ.

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Commits on Dec 10, 2023

• Added Single/Multi-channel feature

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Commits on Nov 27, 2022

• Some cosmetic changes

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Commits on Nov 8, 2022

• ADD: TinyFPGA-BX bootloader example, fully compatible with tinyprog

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Commits on Oct 29, 2022

• Improvements on code reuse.

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Commits on Aug 28, 2022

• tx_dp/tx_dn/rx_dp/rx_dn pins renamed to dp_tx/dn_tx/dp_rx/dn_rx.

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Commits on Feb 27, 2022

• Improvements on code reuse.

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Commits on Feb 6, 2022

• Now 'demo' example can read and program TinyFPGA-BX FLASH memory.

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Commits on Jan 10, 2022

• Improved USB standard compliance with direct driving of D+ pull-up and better device state management.

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Commits on Dec 28, 2021

• Added Fomu implementation examples

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Commits on Dec 17, 2021

• Dropped the constraint of freq(app_clk_i) <= freq(clk_i)/4. Now app_clk_i frequency can be even higher than clk_i one.

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Commits on Dec 8, 2021

• Added simulation testbenches

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Commits on Nov 10, 2021

• Added SOC example

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Commits on Nov 1, 2021

• Add demo example to OSS CAD Suite

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Commits on Oct 29, 2021

• Code cleanup to workaround Yosys bug

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Commits on Jun 8, 2021

• first commit

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• Initial commit

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