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DASIP 2012: Karlsruhe, Germany
- Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing, DASIP 2012, Karlsruhe, Germany, October 23-25, 2012. IEEE 2012, ISBN 978-1-4673-2089-4
- Yusuf Aksehir, Kamil Erdayandi, Tevfik Zafer Ozcan, Ilker Hamzaoglu:
A low energy adaptive motion estimation hardware for H.264 Multiview Video Coding. 1-6 - Ercan Kalali, Yusuf Adibelli, Ilker Hamzaoglu:
A high performance and low energy intra prediction hardware for HEVC video decoding. 1-8 - Nikolaos Kavvadias, Kostas Masselos:
Design of fixed-point rounding operators for the VHDL-2008 standard. 1-8 - Vincent Boulos, Vincent Fristot, Dominique Houzet, Luc Salvo, Pierre Lhuissier:
Investigating performance variations of an optimized GPU-ported granulometry algorithm. 1-6 - Andreas Engel, Björn Liebig, Andreas Koch:
Energy-efficient heterogeneous reconfigurable sensor node for distributed structural health monitoring. 1-8 - Carlos Colodro-Conde, F. Javier Toledo-Moreo, J. Javier Martínez-Álvarez, F. Javier Garrigós-Guerrero, José Manuel Ferrández de Vicente:
Implementing large-kernel 2-D filters using Impulse CoDeveloper. 1-8 - Amel Khiar, N. Knecht, Laurent Gantel, S. Lkad, Benoît Miramond:
Middleware based executive for embedded reconfigurable platforms. 1-6 - Michael Feilen, Andreas Iliopoulos, Matthias Ihmig, Walter Stechele:
Partitioning and context switching for a reconfigurable FPGA-based DAB receiver. 1-8 - Lothar Stolz, Matthias Ihmig, Walter Stechele:
An evaluation on using GPU coprocessing for software radios on a low-cost platform. 1-8 - Jani Boutellier, Ismo Lundbom, Janne Janhunen, Jori Ylimainen, Jari Hannuksela:
Application-specific instruction processor for extracting local binary patterns. 1-8 - Mickael Lanoe, Eric Senn:
Consumption analysis and estimation in the design of GStreamer based multimedia applications. 1-7 - Carina Schmidt-Knorreck, Renaud Pacalet, Andreas Minwegen, Uwe Deidersen, Torsten Kempf, Raymond Knopp, Gerd Ascheid:
Flexible front-end processing for software defined radio applications using application specific instruction-set processors. 1-8 - Henryk Richter, Benno Stabernack, Volker Kühn:
Architectural decomposition of video decoders for many core architectures. 1-8 - Youenn Corre, Van-Trinh Hoang, Jean-Philippe Diguet, Dominique Heller, Loïc Lagadec:
HLS-based fast design space exploration of ad hoc hardware accelerators: A key tool for MPSoC synthesis on FPGA. 1-8 - Ghassan Almaless, Franck Wajsbürt:
On the scalability of image and signal processing parallel applications on emerging cc-NUMA many-cores. 1-8 - Manel Djemal, Robert de Simone, François Pêcheux, Franck Wajsbürt, Dumitru Potop-Butucaru, Zhen Zhang:
Programmable routers for efficient mapping of applications onto NoC-based MPSoCs. 1-8 - Romuald Rocher, Pascal Scalart:
Noise probability density function in fixed-point systems based on smooth operators. 1-8 - Aymen Chakhari, Karthick Parashar, Romuald Rocher, Pascal Scalart:
Analytical approach to evaluate the effect of the spread of quantization noise through the cascade of decision operators for spherical decoding. 1-5 - Alexandre Chapoutot, Laurent-Stéphane Didier, Fanny Villers:
Range estimation of floating-point variables in Simulink models. 1-8 - Benoit Lopez, Thibault Hilaire, Laurent-Stéphane Didier:
Sum-of-products evaluation schemes with fixed-point arithmetic, and their application to IIR filter implementation. 1-8 - Venugopal Santhanam, Lokesh Kabra:
Optimal low power and scalable memory architecture for Turbo encoder. 1-8 - Jean Dion, Marie-Hélène Hamon, Pierre Penard, Matthieu Arzel, Michel Jézéquel:
Multi-standard trellis-based FEC decoder. 1-7 - Nicholas Preyss, Andreas Burg, Christoph Studer:
Layered detection and decoding in MIMO wireless systems. 1-8 - François Leduc-Primeau, Alexandre J. Raymond, Pascal Giard, Kevin Cushon, Claude Thibeault, Warren J. Gross:
High-throughput LDPC decoding using the RHS algorithm. 1-6 - Kaushik Ravindran, Arkadeb Ghosal, Rhishikesh Limaye, Guoqiang Wang, Guang Yang, Hugo A. Andrade:
Analysis techniques for static dataflow models with access patterns. 1-8 - Ab Al-Hadi Ab Rahman, Richard Thavot, Simone Casale Brunet, Endri Bezati, Marco Mattavelli:
Design space exploration strategies for FPGA implementation of signal processing systems using CAL dataflow program. 1-8 - Van-Trinh Hoang, Nathalie Julien, Pascal Berruet:
Design under constraints of availability and energy for sensor node in wireless sensor network. 1-8 - Tomasz Kryjak, Mateusz Komorkiewicz, Marek Gorgon:
FPGA implementation of camera tamper detection in real-time. 1-8 - Tomasz Kryjak, Mateusz Komorkiewicz, Marek Gorgon:
FPGA implementation of real-time head-shoulder detection using local binary patterns, SVM and foreground object detection. 1-8 - H. Ye, Lionel Lacassagne, Daniel Etiemble, Laurent Cabaret, Joel Falcou, Andrés Romero Mier y Terán, Olivier Florent:
Impact of high level transforms on high level synthesis for motion detection algorithm. 1-8 - Roman Bartosinski, Martin Danek, Jaroslav Sykora, Lukas Kohout, Petr Honzík:
Video surveillance application based on application specific vector processors. 1-8 - Diego A. Botero Galeano, Jonathan Piat, Pierre Chalimbaud, Michel Devy, Jean-Louis Boizard:
FPGA implementation of mono and stereo inverse perspective mapping for obstacle detection. 1-8 - Jason Lambert, Antoine Pedron, Guillaume Gens, Franck Bimbard, Lionel Lacassagne, Ekaterina Iakovleva:
Performance evaluation of total focusing method on GPP and GPU. 1-8 - Scott C. Kim, William Plishker, Shuvra S. Bhattacharyya, Joseph R. Cavallaro:
GPU-based acceleration of symbol timing recovery. 1-8 - Istas Pratomo, Sébastien Pillement:
Gradient - An adaptive fault-tolerant routing algorithm for 2D mesh Network-on-Chips. 1-8 - Willy Aubry, Bertrand Le Gal, Daniel Négru, Simon Desfarges, Dominique Dallet:
A generic video adaptation FPGA implementation towards content- and context-awareness in future networks. 1-7 - Daniela Genius, Khouloud Zine el Abidine:
A hierarchical approach to the out-of-order arrival of frames in video streaming applications on clustered MPSoC. 1-8 - Ons Mbarek, Alain Pegatoquet, Michel Auguin:
Black-box and white-box early power intent simulation and verification: Two novel approaches. 1-8 - Takieddine Majdoub, Sébastien Le Nours, Olivier Pasquier, Fabienne Nouvel:
Application of temporal decoupling to the creation of efficient performance models of automotive architectures. 1-8 - Carlo Sau, Danilo Pani, Francesca Palumbo, Luigi Raffo:
A nature-inspired adaptive floating-point coprocessing system. 1-8 - Julien Le Kernec, Olivier Romain, Patrick Garda, Julien Denoulet:
Empirical comparison of Chirp and Multitones on experimental UWB software defined radar prototype. 1-8 - Gabriel Caffarena, Daniel Ménard:
Many-core parallelization of fixed-point optimization of VLSI circuits through GPU devices. 1-8 - Arnault Ioualalen, Matthieu Martel:
Synthesis of arithmetic expressions for the fixed-point arithmetic: The Sardana approach. 1-8 - Manel Hentati, Yassine Aoudni, Jean-François Nezan, Mohamed Abid:
A hierarchical implementation of Hadamard transform using RVC-CAL dataflow programming and dynamic partial reconfiguration. 1-7 - Fernando Herrera, Hector Posadas, Pablo Peñil, Eugenio Villar, Francisco Ferrero, Raúl Valencia:
The COMPLEX Eclipse framework for UML/MARTE specification and design space exploration of embedded systems. 1-2 - Daniel Ménard, Romuald Rocher, Olivier Sentieys, Nicolas Simon, Laurent-Stéphane Didier, Thibault Hilaire, Benoit Lopez, Eric Goubault, Sylvie Putot, Franck Védrine, Amine Najahi, Guillaume Revy, L. Fangain, Christian Samoyeau, Fabrice Lemonnier, Christophe Clienti:
Design of fixed-point embedded systems (DEFIS) French ANR project. 1-2 - Julien Heulot, Karol Desnos, Jean-François Nezan, Maxime Pelcat, Mickaël Raulet, Hervé Yviquel, P.-L. Lagalaye, Jean-Christophe Le Lann:
An experimental toolchain based on high-level dataflow models of computation for heterogeneous MPSoC. 1-2 - Tomasz Kryjak, Mateusz Komorkiewicz, Marek Gorgon:
Is FPGA a suitable platform for advanced video surveillance systems? 1-2 - Bertrand Le Gal, Christophe Jégo:
FPGA prototyping of an ASIP LDPC decoder for the DVB-T2 standard. 1-2 - Thomas Schlechter, Christoph Juritsch, Mario Huemer:
FPGA based demonstrator for blocker detection in LTE systems. 1-2 - Roman Bartosinski, Martin Danek, Jaroslav Sykora, Lukas Kohout, Petr Honzík:
Foreground detection and image segmentation in a flexible ASVP platform for FPGAs. 1-2 - Frédérick Carrel, Mehdi Gmar, Hermine Lemaire, Vincent Schoepff, Mathieu Thevenin:
GAMPIX: A new generation of gamma camera. 1-2 - Olivier Berder, Olivier Sentieys, Trong Nhan Le, R. Fontaine, Alain Pegatoquet, Cécile Belleudy, Michel Auguin, William Tatinian, Gilles Jacquemod, Florian Broekaert, Amine Didioui, Carolynn Bernier, Karim Ben Chehida, Sylvain Bourdel, Hervé Barthélemy, P. Ciais, Chris Barratt:
GRECO: GREen communicating objects. 1-2 - Andreas Engel, Björn Liebig, Andreas Koch:
HaLOEWEn: A heterogeneous reconfigurable sensor node for distributed structural health monitoring. 1-2 - Uros Stevanovic, Michele Caselle, Suren Chilingaryan, A. Herth, Andreas Kopmann, Matthias Vogelgesang, M. Balzer, M. Weber:
High-speed camera with embedded FPGA processing. 1-2 - Grigoris Dimitroulakos, Christakis Lezos, Konstantinos Masselos:
MEMSCOPT: A source-to-source compiler for dynamic code analysis and loop transformations. 385-386 - Eric Senn, Daniel Chillet, Olivier Zendra, Cécile Belleudy, Rabie Ben Atitallah, A. Fritsch, Christian Samoyeau:
Open-people: An open platform for estimation and optimizations of energy consumption. 1-2 - Jan Micha Borrmann, Alexander Viehl, Oliver Bringmann, Wolfgang Rosenstiel:
Parallel video-based traffic sign recognition on the Intel SCC many-core platform. 1-2 - Jürgen Oehm, Christian Koch, Ivan Stoychev, Andreas Gornik:
A portable demonstration device for an integrated optical angle measurement system. 1-2 - Shravan Muddasani, Srinivas Boppu, Frank Hannig, Boris Kuzmin, Vahid Lari, Jürgen Teich:
A prototype of an invasive tightly-coupled processor array. 1-2 - Brunel Happi Tietche, Olivier Romain, Bruce Denby, Laurent Benaroya, Francois de Dieuleveult, Bertrand Granado, Guy Wassi, Houssemeddine Khemiri, Gérard Chollet, Dijana Petrovska, Raphaël Blouet, Khalil Hachicha, Sylvain Viateur:
Prototype of a radio-on-demand broadcast receiver with real time musical genre classification. 1-2 - Patrick Maechler, David E. Bellasi, Andreas Burg, Norbert Felber, Hubert Kaeslin, Christoph Studer:
Sparsity-based real-time audio restoration. 1-2 - Timo Schönwald, Alexander Koch, Benjamin Ranft, Alexander Viehl, Oliver Bringmann, Wolfgang Rosenstiel:
Stereo depth map computation on a Tilera TILEPro64 embedded multicore processor. 1-2 - Kaushik Ravindran, Arkadeb Ghosal, Rhishikesh Limaye, Hugo A. Andrade, Alejandro Asenjo, Takao Inoue, Douglas Kim, Ankita Prasad, Trung N. Tran, Mike Trimborn, Guoqiang Wang, Guang Yang:
Tools for deploying dataflow models on FPGA targets. 1-2 - Oliver Oey, Stephan Werner, Diana Göhringer, Andreas Stuckert, Jürgen Becker, Michael Hübner:
Virtualization of heterogeneous and adaptive multi-core/multi-board systems. 1-2 - Grigoris Dimitroulakos, Theodoros Lioris, Christakis Lezos, Konstantinos Masselos:
XMSIM: A tool for early memory hierarchy evaluation. 405-406
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