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52nd ISCA 2025: Tokyo, Japan
- Proceedings of the 52nd Annual International Symposium on Computer Architecture, ISCA 2025, Tokyo, Japan, June 21-25, 2025. ACM 2025, ISBN 979-8-4007-1261-6
Session 1A: ML Accelerators I
- Zheng Xu
, Dehao Kong, Jiaxin Liu, Jinxi Li, Jingxiang Hou
WSC-LLM: Efficient LLM Service and Architecture Co-exploration for Wafer-scale Chips. 1-17 - Liang Liu
LightML: A Photonic Accelerator for Efficient General Purpose Machine Learning. 18-33 - Saeed Rashidi
FRED: A Wafer-scale Fabric for 3D Parallel DNN Training. 34-48 - Qize Yang
PD Constraint-aware Physical/Logical Topology Co-Design for Network on Wafer. 49-64
Session 1B: Crypto & Fully Homomorphic Encryption
- Tianwei Pan
Finesse: An Agile Design Framework for Pairing-based Cryptography via Software/Hardware Co-Design. 65-77 - Ali Hajiabadi
Cassandra: Efficient Enforcement of Sequential Execution for Cryptographic Programs. 78-91 - Shengyu Fan
FAST: An FHE Accelerator for Scalable-parallelism with Tunable-bit. 92-106 - Dian Jiao
Neo: Towards Efficient Fully Homomorphic Encryption Acceleration using Tensor Core. 107-121
Session 1C: GPUs & Ray Tracing
- Yuan Feng
Heliostat: Harnessing Ray Tracing Accelerators for Page Table Walks. 122-136 - Mao Lin
Forest: Access-aware GPU UVM Management. 137-152 - Minseong Gil
Avant-Garde: Empowering GPUs with Scaled Numeric Formats. 153-165 - Yavuz Selim Tozlu
CoopRT: Accelerating BVH Traversal for Ray Tracing via Cooperative Threads. 166-179
Session 2A: Best Paper Nominees
- Zhewen Pan
The XOR Cache: A Catalyst for Compression. 180-193 - Cong Li
H2-LLM: Hardware-Dataflow Co-Exploration for Heterogeneous Hybrid-Bonding-based Low-Batch LLM Inference. 194-210 - Ben Simner
Precise exceptions in relaxed architectures. 211-224 - Gan Fang
Rethinking Prefetching for Intermittent Computing. 225-240
Session 3A: Quantum I
- Yuchen Zhu
Hardware-aware Calibration Protocol for Quantum Computers. 241-256 - Christopher A. Pattison
Constant-Rate Entanglement Distillation for Fast Quantum Interconnects. 257-270 - Chenghong Zhu
S-SYNC: Shuttle and Swap Co-Optimization in Quantum Charge-Coupled Devices. 271-284 - Wuwei Tian
ARTERY: Fast Quantum Feedback using Branch Prediction. 285-298 - Chenning Tao
Qtenon: Towards Low-Latency Architecture Integration for Accelerating Hybrid Quantum-Classical Computing. 299-312
Session 3B: Domain Specific Accelerators I
- Justin Ting
HiPER: Hierarchically-Composed Processing for Efficient Robot Learning-Based Control. 313-326 - Yiyang Huang, Yuhui Hao
Dadu-Corki: Algorithm-Architecture Co-Design for Embodied AI-powered Robotic Manipulation. 327-343 - Haiyu Wang
Process Only Where You Look: Hardware and Algorithm Co-optimization for Efficient Gaze-Tracked Foveated Rendering in Virtual Reality. 344-358 - Hongrui Zhang
RTSpMSpM: Harnessing Ray Tracing for Efficient Sparse Matrix Computations. 359-373 - Yen-Chieh Huang
AQB8: Energy-Efficient Ray Tracing Accelerator through Multi-Level Quantization. 374-387
Session 3C: Storage
- Ryan Wong
ANVIL: An In-Storage Accelerator for Name-Value Data Stores. 388-404 - Xinyue Yi
ArtMem: Adaptive Migration in Reinforcement Learning-Enabled Tiered Memory. 405-418 - Ipoom Jeong
UPP: Universal Predicate Pushdown to Smart Storage. 419-433 - Li Peng
XHarvest: Rethinking High-Performance and Cost-Efficient SSD Architecture with CXL-Driven Harvesting. 434-449 - Rohan Mahapatra
In-Storage Acceleration of Retrieval Augmented Generation as a Service. 450-466
Session 4A: LLMs
- Jiaming Xu
SpecEE: Accelerating Large Language Model Inference with Speculative Early Exiting. 467-481 - Minsu Kim
Oaken: Fast and Efficient LLM Serving with Online-Offline Hybrid KV Cache Quantization. 482-497 - Le Qin
Chimera: Communication Fusion for Hybrid Parallelism in Large Language Models. 498-513 - Zhiwen Mo
LUT Tensor Core: A Software-Hardware Co-Design for LUT-Based Low-Bit LLM Inference. 514-528 - Jaeyong Lee
AiF: Accelerating On-Device LLM Inference Using In-Flash Processing. 529-543 - Hyungyo Kim
LIA: A Single-GPU LLM Inference Acceleration with Cooperative AMX-Enabled CPU-GPU Computation and CXL Offloading. 544-558
Session 4B: Microarchitecture I
- Lingzhe Chester Cai
Enabling Ahead Prediction with Practical Energy Constraints. 559-571 - Mengming Li
Profile-Guided Temporal Prefetching. 572-585 - Noureldin Hassan
WarmCache: Exploiting STT-RAM Cache for Low-Power Intermittent Systems. 586-600 - Gelin Fu
Magellan: A High-Performance Loop-Guided Prefetcher for Indirect Memory Access. 601-615 - Haris Volos
Leveraging control-flow similarity to reduce branch predictor cold effects in microservices. 616-630
Session 4C: Datacenter & Cloud
- Xingmao Yu
Cramming a Data Center into One Cabinet, a Co-Exploration of Computing and Hardware Architecture of Waferscale Chip. 631-645 - Leo Han
Fair-CO2: Fair Attribution for Cloud Carbon Emissions. 646-663 - Jiaqi Lou
Dynamic Load Balancer in Intel Xeon Scalable Processor: Performance Analyses, Enhancements, and Guidelines. 664-678 - Haneul Park
A4: Microarchitecture-Aware LLC Management for Datacenter Servers with Emerging I/O Devices. 679-693 - Yuanlong Li
Single-Address-Space FaaS with Jord. 694-707 - Jovan Stojkovic
HardHarvest: Hardware-Supported Core Harvesting for Microservices. 708-722
Session 5A: RowHammer
- Suhas Vittal
MoPAC: Efficiently Mitigating Rowhammer with Probabilistic Activation Counting. 723-738 - Jeonghyun Woo
When Mitigations Backfire: Timing Channel Attacks and Defense for PRAC-Based RowHammer Mitigations. 739-756 - Ismail Emir Yuksel
PuDHammer: Experimental Analysis of Read Disturbance Effects of Processing-using-DRAM in Real DRAM Chips. 757-775 - Hritvik Taneja
DREAM: Enabling Low-Overhead Rowhammer Mitigation via Directed Refresh Management. 776-792
Session 5B: HPC for ML/AI
- Feng Cheng
Ecco: Improving Memory Bandwidth and Capacity for LLMs via Entropy-Aware Cache Compression. 793-807 - Seungjae Moon
Hybe: GPU-NPU Hybrid System for Efficient LLM Inference with Million-Token Context Window. 808-820 - Hyoungwook Nam
MeshSlice: Efficient 2D Tensor Parallelism for Distributed DNN Training. 821-834 - Dezun Dong
Zettafly: A Network Topology with Flexible Non-blocking Regions for Large-scale AI and HPC Systems. 835-848
Session 5C: Processing-in-Memory
- Yuanpeng Zhang
AIM: Software and Hardware Co-design for Architecture-level IR-drop Mitigation in High-performance PIM. 849-866 - Jiantao Liu
OptiPIM: Optimizing Processing-in-Memory Acceleration Using Integer Linear Programming. 867-883 - Chaoqiang Liu
HeterRAG: Heterogeneous Processing-in-Memory Acceleration for Retrieval-augmented Generation. 884-898 - Yongwon Shin
ATiM: Autotuning Tensor Programs for Processing-in-DRAM. 899-915
Session 6A: ML Accelerators II
- Rhys Gretsch
Single Spike Artificial Neural Networks. 916-929 - Chiyue Wei
Phi: Leveraging Pattern-based Hierarchical Sparsity for High-Efficiency Spiking Neural Networks. 930-943 - Boxun Xu
Bishop: Sparsified Bundling Spiking Transformers on Heterogeneous Cores with Error-constrained Pruning. 944-957 - Michael Shen
Hermes: Algorithm-System Co-design for Efficient Retrieval-Augmented Generation At-Scale. 958-973 - Wenqi Jiang
RAGO: Systematic Performance Optimization for Retrieval-Augmented Generation Serving. 974-989 - Cong Guo
Transitive Array: An Efficient GEMM Accelerator with Result Reuse. 990-1004
Session 6B: Microarchitecture II
- Saba Mostofi
Light-weight Cache Replacement for Instruction Heavy Workloads. 1005-1019 - Changxi Liu
The Sparsity-Aware LazyGPU Architecture. 1020-1034 - Dai Cheol Jung
Evaluating Ruche Networks: Physically Scalable, Cost-Effective, Bandwidth-Flexible NoCs. 1035-1048 - Jaewon Kwon
Garibaldi: A Pairwise Instruction-Data Management for Enhancing Shared Last-Level Cache Performance in Server Workloads. 1049-1063 - Amel Fatima
NetCrafter: Tailoring Network Traffic for Non-Uniform Bandwidth Multi-GPU Systems. 1064-1078 - Pedro Henrique Exenberger Becker
Caravan: A Hardware/Software Co-Design for Efficient SIMD Neighbor Search on Point Clouds. 1079-1092
Session 6C: Memory Acceleration
- Yiwei Li
ANSMET: Approximate Nearest Neighbor Search with Near-Memory Processing and Hybrid Early Termination. 1093-1107 - Derrick Quinn
DReX: Accurate and Scalable Dense Retrieval Acceleration via Algorithmic-Hardware Codesign. 1108-1124 - Taehwan Kim
EOD: Enabling Low Latency GNN Inference via Near-Memory Concatenate Aggregation. 1125-1139 - Ziyuan Wen
RAP: Reconfigurable Automata Processor. 1140-1154 - Chang Eun Song
Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution. 1155-1170 - Kangqi Chen
REIS: A High-Performance and Energy-Efficient Retrieval System with In-Storage Processing. 1171-1192
Session 7A: ML Acceleration III
- Akshat Ramachandran
MicroScopiQ: Accelerating Foundational Models through Outlier-Aware Microscaling Quantization. 1193-1209 - Dahu Feng
Topology-Aware Virtualization over Inter-Core Connected Neural Processing Units. 1210-1224 - August Ning
Chip Architectures Under Advanced Computing Sanctions✱. 1225-1239 - Jiaqi Yang
DiTile-DGNN: An Efficient Accelerator for Distributed Dynamic Graph Neural Network Inference. 1240-1253 - Tianbo Liu
Cambricon-SR: An Accelerator for Neural Scene Representation with Sparse Encoding Table. 1254-1268 - Haomin Li
FATE: Boosting the Performance of Hyper-Dimensional Computing Intelligence with Flexible Numerical DAta TypE. 1269-1282
Session 7B: Systems
- Jingqi Feng
WindServe: Efficient Phase-Disaggregated LLM Serving with Stream-based Dynamic Scheduling. 1283-1295 - Joseph Rogers
Neoscope: How Resilient Is My SoC to Workload Churn? 1296-1310 - Yanpeng Yu
CORD: Low-Latency, Bandwidth-Efficient and Scalable Release Consistency via Directory Ordering. 1311-1326 - Panagiotis Miliadis
Nyx: Virtualizing dataflow execution on shared FPGA platforms. 1327-1341 - Russel Arbore
HPVM-HDC: A Heterogeneous Programming System for Accelerating Hyperdimensional Computing. 1342-1355 - Xia Zhao
UGPU: Dynamically Constructing Unbalanced GPUs for Enhanced Resource Efficiency. 1356-1369
Session 7C: Quantum II
- Satvik Maurya
Synchronization for Fault-Tolerant Quantum Computers. 1370-1385 - Joshua Viszlai
SWIPER: Minimizing Fault-Tolerant Quantum Program Latency via Speculative Window Decoding. 1386-1401 - Xiang Fang, Keyi Yin, Yuchen Zhu, Jixuan Ruan, Dean Tullsen, Zhiding Liang, Andrew Sornborger
CaliQEC: In-situ Qubit Calibration for Surface Code Quantum Error Correction. 1402-1416 - Siddharth Dangwal
Variational Quantum Algorithms in the era of Early Fault Tolerance. 1417-1431 - Hengyun Zhou
Resource Analysis of Low-Overhead Transversal Architectures for Reconfigurable Atom Arrays. 1432-1448 - Hezi Zhang
SwitchQNet: Optimizing Distributed Quantum Computing for Quantum Data Centers with Switch Networks. 1449-1463
Session 8A: Performance and Modeling
- Jian Weng
Assassyn: A Unified Abstraction for Architectural Simulation and Implementation. 1464-1479 - Arash Nasr-Esfahany
Concorde: Fast and Accurate CPU Performance Modeling with Compositional Analytical-ML Fusion. 1480-1494 - Shiheng Cao
AMALI: An Analytical Model for Accurately Modeling LLM Inference on Modern GPUs. 1495-1508 - Hanna Cha
GCStack+GCScaler: Fast and Accurate GPU Performance Analyses Using Fine-Grained Stall Cycle Accounting and Interval Analysis. 1509-1523 - Ying Li
TrioSim: A Lightweight Simulator for Large-Scale DNN Workloads on Multi-GPU Systems. 1524-1538
Session 8B: Quantum III
- Meng Wang
Accelerating Simulation of Quantum Circuits under Noise via Computational Reuse. 1539-1553 - Junyao Zhang
QPlacer: Frequency-Aware Component Placement for Superconducting Quantum Computers. 1554-1567 - Hyungseok Kim
QR-Map: A Map-Based Approach to Quantum Circuit Abstraction for Qubit Reuse Optimization. 1568-1582 - Zihan Chen
Genesis: A Compiler for Hamiltonian Simulation on Hybrid CV-DV Quantum Computers. 1583-1597 - Yingheng Li
Reinforcement Learning-Guided Graph State Generation in Photonic Quantum Computers. 1598-1612
Session 8C: Domain Specific Accelerators II
- Xintong Li
HYTE: Flexible Tiling for Sparse Accelerators via Hybrid Static-Dynamic Approaches. 1613-1626 - Souradip Ghosh
NUPEA: Optimizing Critical Loads on Spatial Dataflow Architectures via Non-Uniform Processing-Element Access. 1627-1640 - Alireza Khadem
DX100: Programmable Data Access Accelerator for Indirection. 1641-1658 - Ryan Hou
SEAL: A Single-Event Architecture for In-Sensor Visual Localization. 1659-1674 - Suquan Zhang
IDEA-GP: Instruction-Driven Architecture with Efficient Online Workload Allocation for Geometric Perception. 1675-1688
Session 9A: Industry Track
- Joel Coburn
Meta's Second Generation AI Chip: Model-Chip Co-Design and Productionization Experiences. 1689-1702 - Weiwei Chu
Scaling Llama 3 Training with Efficient Parallelism Strategies. 1703-1716 - Wei Su
DCPerf: An Open-Source, Battle-Tested Performance Benchmark Suite for Datacenter Workloads. 1717-1730 - Chenggang Zhao
Insights into DeepSeek-V3: Scaling Challenges and Reflections on Hardware for AI Architectures. 1731-1745
Session 9B: HPC
- Gwangeun Byeon
Avalanche: Optimizing Cache Utilization via Matrix Reordering for Sparse Matrix Multiplication Accelerator. 1746-1759 - Yunjae Lee
Debunking the CUDA Myth Towards GPU-based AI Systems: Evaluation of the Performance and Programmability of Intel's Gaudi NPU for AI Model Serving. 1760-1776 - Fabian Wildgrube
GPUs All Grown-Up: Fully Device-Driven SpMV Using GPU Work Graphs. 1777-1791 - Xiaochen Hao
Telos: A Dataflow Accelerator for Sparse Triangular Solver of Partial Differential Equations. 1792-1805
Session 9C: Memory Technology
- Renhao Fan
MagiCache: A Virtual In-Cache Computing Engine. 1806-1818 - Vignesh Adhinarayanan
Folded Banks: 3D-Stacked HBM Design for Fine-Grained Random-Access Bandwidth. 1819-1833 - Heewoo Kim
NMP-PaK: Near-Memory Processing Acceleration of Scalable De Novo Genome Assembly. 1834-1847
Session 10A: ML Accelerators IV
- Chengyue Wang
Reconfigurable Stream Network Architecture. 1848-1866 - Chunshu Wu
DS-TPU: Dynamical System for on-Device Lifelong Graph Learning with Nonlinear Node Interaction. 1867-1879 - Guyue Huang
TRACI: Network Acceleration of Input-Dynamic Communication for Large-Scale Deep Learning Recommendation Model. 1880-1893 - Seock-Hwan Noh
FlexNeRFer: A Multi-Dataflow, Adaptive Sparsity-Aware Accelerator for On-Device NeRF Rendering. 1894-1909 - Jiale Yan
BingoGCN: Towards Scalable and Efficient GNN Acceleration with Fine-Grained Partitioning and SLT. 1910-1924
Session 10B: Domain Specific Accelerators III
- Yu Feng
Lumina: Real-Time Neural Rendering by Exploiting Computational Redundancy. 1925-1939 - Seunghee Han
LightNobel: Improving Sequence Length Limitation in Protein Structure Prediction Model via Adaptive Activation Quantization. 1940-1955 - Ning Kang
MD-pipe: A Strong Scaling Enhanced Pipeline Architecture for Ab Initio Accuracy Molecular Dynamics. 1956-1968 - Yeongwoo Jang
InfiniMind: A Learning-Optimized Large-Scale Brain-Computer Interface. 1969-1985
Session 10C: Security
- Alhad Daftardar
Need for zkSpeed: Accelerating HyperPlonk for Zero-Knowledge Proofs. 1986-2001 - Jianyi Cheng
Adaptive CHERI Compartmentalization for Heterogeneous Accelerators. 2002-2016 - Sunho Lee
Unified Memory Protection with Multi-granular MAC and Integrity Tree for Heterogeneous Processors. 2017-2031 - Saber Ganjisaffar
SpecASan: Mitigating Transient Execution Attacks Using Speculative Address Sanitization. 2032-2045
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