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ISCAS 2001: Sydney, Australia - Volume 1
- Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001. IEEE 2001, ISBN 0-7803-6685-9
- Antônio Carlos M. de Queiroz:
Unbalanced lattice switched-current filters. 1-4 - Bogdan Pankiewicz
, Marek Wójcikowski
A CMOS field programmable analog array and its application in continuous-time OTA-C filter design. 5-8 - Yngvar Berg, Snorre Aunet, Øivind Næss, Mats Høvin:
Floating-gate CMOS differential analog inverter for ultra low-voltage applications. 9-12 - Ramón González Carvajal, Antonio Jesús Torralba Silgado, Jaime Ramírez-Angulo, Jonathan Noel Tombs, Fernando Muñoz
Low voltage class AB output stages for CMOS op-amps using floating capacitors. 13-16 - Alexandre S. de la Vega, Antônio Carlos M. de Queiroz, Paulo S. R. Diniz
Adaptive filter implementation using switched-current technique. 17-20 - Vladimir I. Prodanov:
Robust high-pass and notch Gm-(grounded) C biquads: how many different topologies are there? 21-24 - Krissanapong Nandhasri, Jitkasem Ngarmnil:
Designs of analog and digital comparators with FGMOS. 25-28 - Jeffrey Harrison, Neil Weste:
Energy storage and Gramians of ladder filter realisations. 29-32 - Vincent F. Koosh, Rodney M. Goodman:
Dynamic charge restoration of floating gate subthreshold MOS translinear circuits. 33-36 - Yngvar Berg, Snorre Aunet, Øivind Næss, Henning Gundersen, Mats Høvin:
Extreme low-voltage floating-gate CMOS transconductance amplifier. 37-40 - Kåre Tais Christensen:
LC quadrature generation in integrated circuits. 41-44 - Kong-Pang Pun, José E. Franca, Carlos Azeredo Leme:
A quadrature sampling scheme with improved image rejection for complex-IF receivers. 45-48 - Apinunt Thanachayanont:
A 1.5-V CMOS fully differential inductorless RF bandpass amplifier. 49-52 - Javad Yavand-Hassani, Mahmoud Kamarei:
A flexible method of LUT indexing in digital predistortion linearization of RF power amplifiers. 53-56 - Joel H. Vuolevi, Jani Manninen, Timo Rahkonen
Cancelling the memory effects in RF power amplifiers. 57-60 - Esther Rodríguez-Villegas, Adoración Rueda, Alberto Yufera
A 1.25 V FGMOS filter using translinear circuits. 61-64 - Jorge M. Cañive, Antonio Petraglia:
On the testability of SC filters based on allpass sections. 65-68 - Joarez B. Monteiro, Antonio Petraglia, Carlos Azeredo Leme:
A digitally programmable IIR switched-capacitor filter for CMOS technology. 69-72 - Luís Cléber C. Marques, Carlos Galup-Montoro
Switched-MOSFET technique for programmable filters operating at low-voltage supply. 73-76 - Luís Cléber C. Marques, Carlos Galup-Montoro
A switched-MOSFET filter for application in hearing aid devices. 77-80 - Saeid Nooshabadi:
Modelling of effects of temperature profile in the MOS transistor characteristics. 81-84 - Mao-Feng Lan, Randall L. Geiger:
Modeling of random channel parameter variations in MOS transistors. 85-88 - Mao-Feng Lan, Randall L. Geiger:
MOSGRAD-a tool for simulating the effects of systematic and random channel parameter variations. 89-92 - Delmar Broglio Carvalho, Sidnei Noceti Filho, Rui Seara:
Q-GA: a modified genetic algorithm for the design of phase equalizers. 93-96 - Mark Schlarmann, Randall L. Geiger:
Prototype implementation of a WWW based analog circuit design tool. 97-100 - Jader A. De Lima, Adriano S. Cordeiro:
An accurate low-voltage analog memory-cell with built-in multiplication. 101-104 - Keng Hoong Wee, Toshiyuki Nozawa, Takemi Yonezawa, Yuichiro Yamashita, Tadashi Shibata, Tadahiro Ohmi:
High-precision analog EEPROM with real-time write monitoring. 105-108 - Xiaoqiang Shou, Michael M. Green:
A family of CMOS latches with 3 stable operating points. 109-112 - Chien-Cheng Yu, Weiping Wang, Bin-Da Liu:
A new level converter for low-power applications. 113-116 - Jacob Pihl, Kåre Tais Christensen, Erik Bruun:
Direct downconversion with switching CMOS mixer. 117-120 - Chung-Yu Wu, Chung-Yun Chou:
The design of a CMOS IF bandpass amplifier with low sensitivity to process and temperature variations. 121-124 - Mark Dawkins, Alison J. Payne, Nick Cowley:
Single chip tuner design for digital terrestrial television. 125-128 - Chung Kei Thomas Chan, Christofer Toumazou:
Design of a class E power amplifier with non-linear transistor output capacitance and finite DC-feed inductance. 129-132 - Mohamed Lamine Tounsi, Mustapha Chérif-Eddine Yagoub, Brahim Haraoubia:
Hybrid analysis of shielding effect in planar microwave circuits. 133-136 - Francisco Serra-Graells
All-MOS subthreshold log filters. 137-140 - Emmanuel M. Drakakis, Alison J. Payne, Christofer Toumazou, Andrew E. J. Ng, John I. Sewell:
High-order lowpass and bandpass elliptic log-domain ladder filters. 141-144 - Geoffrey D. Duerden, Gordon W. Roberts, M. Jamal Deen
The development of bipolar log domain filters in a standard CMOS process. 145-148 - Andrew E. J. Ng, John I. Sewell, Emmanuel M. Drakakis, Alison J. Payne, Chris Toumazou:
A unified matrix method for systematic synthesis of log-domain ladder filters. 149-152 - Julius Georgiou, Christofer Toumazou:
An operating point elimination technique for weak-inversion log-domain filters with multiple operating points. 153-155 - Adan Lopez-Martinez, Regina Antonio-Chavez, José Silva-Martínez:
A 150 MHz continuous-time seventh order 0.05° equiripple linear phase filter with automatic tuning system. 156-159 - Drazen Jurisic, George S. Moschytz, Neven Mijat:
Low-sensitivity SAB band-pass active-RC filter using impedance tapering. 160-163 - Uroschanit Yodprasit, Krisada Sirivathanant:
A compact low-power vertical filter for very-high-frequency applications. 164-167 - Arshan Aga, Gordon W. Roberts:
A CMOS digitally programmable current steering semidigital FIR reconstruction filter. 168-171 - Uroschanit Yodprasit, Krisada Sirivathanani:
VHF current-mode filter based on intrinsic biquad of the regulated cascode topology. 172-175 - Pezhman Amini, Omid Shoaei:
A low-power gigabit Ethernet analog equalizer. 176-179 - Amorn Jiraseree-amornkun, Boonruk Chipipop, Wanlop Surakampontorn:
Novel translinear-based multi-output FTFN. 180-183 - Liping Deng, John G. Harris:
The design and analysis of an analog ratio spectrum circuit. 184-187 - Dalibor Biolek
Optimization of frequency filters via vertex graphs. 188-191 - Anthony Tong, Paul J. Hurst:
A mixed-signal tuning approach for continuous-time LPFs. 192-195 - Giuseppe Pamisano, Salvatore Pennisi:
New CMOS tunable transconductor for filtering applications. 196-199 - Roman Kaszynski:
The parametric filter of signal constant component. 200-203 - Seng-Pan U., Rui Paulo Martins, José E. Franca:
High-frequency low-power multirate SC realizations for NTSC/PAL digital video filtering. 204-207 - Xiaoqiang Shou, Michael M. Green:
A programmable VHF CMOS read-channel continuous-time filter with on-chip tuning. 208-211 - Jader A. De Lima, Antonio Petraglia:
On designing OTA-C graphic-equalizers with MOSFET-triode transconductors. 212-215 - Bjørnar Hernes, Øystein Moldsvor, Trond Sæther:
A -80 dB HD3 opamp in 3.3 V CMOS technology using tail current compensation. 216-219 - Hoi Lee, Philip K. T. Mok:
A CMOS current-mirror amplifier with compact slew rate enhancement circuit for large capacitive load applications. 220-223 - Vijay Rentala, Saroj Rout, Edward Lee, Robert J. Weber:
A constant GM rail-to-rail opamp with a novel input stage for BiCMOS process. 224-227 - Jie Yan, Randall L. Geiger:
Fast-settling CMOS operational amplifiers with negative conductance voltage gain enhancement. 228-231 - Mezyad M. Amourah, Randall L. Geiger:
Gain and bandwidth boosting techniques for high-speed operational amplifiers. 232-235 - Yuanying Deng, Edward K. F. Lee:
Design of a 1 V 250 MHz current-mode filter in conventional CMOS process. 236-239 - Tertulien Ndjountche, Rolf Unbehauen:
A low-power and high-speed equalizer for magnetic storage read channels. 240-243 - Jaakko K. Pyykonen:
A low distortion wideband active-RC filter for a multicarrier base station transmitter. 244-247 - Phanumas Khumsat, Apisak Worapishet:
fT-integration based continuous-time filters for very high frequencies. 248-251 - George Palaskas, Yannis P. Tsividis:
A "divide and conquer" technique for the design of wide dynamic range continuous time filters. 252-255 - Yonghui Tang, Randall L. Geiger:
A 2.5 Gbit/s CMOS PLL for data/clock recovery without frequency divider. 256-259 - Jinghui Lu, Bernard Grung, Stephen Anderson, Shahriar Rokhsaz:
Discrete z-domain analysis of high order phase locked loops. 260-263 - Abdelohahab Djemouai, Mohamad Sawan:
Fast-locking low-jitter integrated CMOS phase-locked loop. 264-267 - Jin-Jer Jong, Chen-Yi Lee:
A novel structure for portable digitally controlled oscillator. 272-275 - Hassan Aboushady
Low-power design of low-voltage current-mode integrators for continuous-time Sigma-Delta modulators. 276-279 - Peter Kiss, Un-Ku Moon, Jesper Steensgaard, John T. Stonick, Gabor C. Temes:
Multibit Sigma-Delta ADC with mixed-mode DAC error correction. 280-283 - Zhenghong Wang, Xieting Ling:
Noise-reducing loop in multi-bit Sigma-Delta modulators. 284-287 - Omid Oliaei:
Clock jitter effect in continuous-time oversampling converters. 288-291 - Omid Oliaei:
Continuous-time sigma-delta modulator with an arbitrary feedback waveform. 292-295 - Andrea Gerosa
A micro-power low noise log-domain amplifier for the sensing chain of a cardiac pacemaker. 296-299 - Eitake Ibaragi, Soushirou Nishioka, Akira Hyogo, Keitaro Sekine:
A CMOS OTA free from second order effects with a high input resistance Gm control terminal. 300-303 - Wen-Chi Wu, Chih-Chien Huang, Nai-Heng Tseng:
CMOS transimpedance amplifier for DVD applications. 304-307 - Rosario Mita, Gaetano Palumbo, Salvatore Pennisi:
Reversed nested Miller compensation with current follower. 308-311 - Giuseppe Palmisano, Salvatore Pennisi:
Low-voltage continuous-time CMOS current amplifier with dynamic biasing. 312-315 - Tuomas Hollman, Saska Lindfors, Teemu Salo, Mika Länsirinne, Kari Halonen:
A 2.7 V CMOS dual-mode baseband filter for GSM and WCDMA. 316-319 - Seng-Pan U., Rui Paulo Martins, José E. Franca:
A high-speed frequency up-translated SC bandpass filter with auto-zeroing for DDFS systems. 320-323 - Gianfranco Avitabile, Bemardo Chellini, Giulio Fedi, Antonio Luchetta
MMIC active floating gyrator design and accurate modelling. 324-327 - Hengsheng Liu, Aydin I. Karsilayan
A high frequency bandpass continuous-time filter with automatic frequency and Q-factor tuning. 328-331 - Tsung-Sum Lee, Jing-Lea Huang:
A low-voltage BiCMOS transconductor with improved linearity for VHF transconductance-C filters. 332-335 - Pavan K. Singh, Franco Maloberti:
Design considerations for band-pass sigma delta modulators. 336-339 - José M. de la Rosa, Maria Belen Pérez-Verdú, Fernando Medeiro, Rocío del Río, Ángel Rodríguez-Vázquez:
Effect of non-linear settling error on the harmonic distortion of fully-differential switched-current bandpass Sigma-Delta modulators. 340-343 - Abdeljalil Yahias, Philippe Bénabès, Richard Kielbasa:
Bandpass Delta-Sigma modulators synthesis with high loop delay. 344-347 - Mustafa Keskin, Un-Ku Moon, Gabor C. Temes:
Low-voltage low-sensitivity switched-capacitor bandpass Sigma-Delta modulator. 348-351 - Teemu Salo, Saska Lindfors, Kari Halonen:
A low-voltage single-Opamp 4th-order band-pass Sigma-Delta-modulator. 352-355 - Kofi A. A. Makinwa, Johan H. Huijsing:
A wind-sensor with integrated interface electronics. 356-359 - Danielle Moraes, Francis Anghinolfi, Philippe Deval, Pierre Jarron, Werner Riegler, Angelo Rivetti, Burkhard Schmidt:
CARIOCA-0.25 Sigma-Delta CMOS fast binary front-end for sensor interface using a novel current-mode feedback technique. 360-363 - Nikos Haralabidis, Dimitris Loukas:
A versatile CMOS low-noise analog front-end stage for solid state detector interfaces. 364-367 - Michiel A. P. Pertijs, Anton Bakker, Johan H. Huijsing:
A high-accuracy temperature sensor with second-order curvature correction and digital bus interface. 368-371 - Pak Kwong Chan, Hong Liang Zhang:
A switched-capacitor interface circuit for integrated sensor applications. 372-375 - Thomas Tille, Jens Sauerbrey, Doris Schmitt-Landsiedel:
A low-voltage MOSFET-only Sigma-Delta modulator for speech band applications using depletion-mode MOS-capacitors in combined series and parallel compensation. 376-379 - Saska Lindfors:
Behavior of a 1-bit 2nd-order Sigma-Delta-modulator under wideband excitation. 380-383 - Antonio Jesús Torralba Silgado, Francisco Colodro Ruiz:
Multirate-cascade sigma-delta (MC-SD) modulators. 384-387 - Lee-An Ho, Shr-Lung Chen, Chien-Hung Kuo, Shen-Iuan Liu:
CMOS oversampling Sigma-Delta magnetic to digital converters. 388-391 - Mansour A. Aldajani, Ali H. Sayed:
SNR performance of an adaptive sigma delta modulator. 392-395 - Jorge Guilherme
A pipeline 15-b 10-Msample/s analog-to-digital converter for ADSL applications. 396-399 - Chunlei Shi, James Wilson, Mohammed Ismail:
Design techniques for improving intrinsic accuracy of resistor string DACs. 400-403 - Johan Piper, Jiren Yuan:
Realization of a floating-point A/D converter. 404-407 - Sameer R. Sonkusale, Jan Van der Spiegel, K. Nagaraj:
Background digital error correction technique for pipelined analog-digital converters. 408-411 - Brandon Greenley, Un-Ku Moon, Raymond Veith:
A 1.8 V CMOS DAC cell with ultra high gain op-amp in 0.0143 mm2. 412-415 - Gerry Quilligan, D. P. Burton:
A high-speed subranging system with background equalization of the sampling instants. 416-419 - Naoki Kurosawa, Haruo Kobayashi, Kensuke Kobayashi:
Channel linearity mismatch effects in time-interleaved ADC systems. 420-423 - Sotoudeh Hamedi-Hagh, C. André T. Salama:
A 10 bit, 50 M sample/s, low power pipelined A/D converter for cable modem applications. 424-427 - Alex R. Bugeja, Sung-Ung Kwak:
Design of a 14 b 100 MS/s switched-capacitor pipelined ADC in RFSiGe BiCMOS. 428-431 - Costantino Pala, Lars Thylén, Mehrun Mokhtari, Urban Westergren:
A high-speed electro-optical analog-to-digital converter principle. 432-435 - Eduardo J. Peralías, Adoración Rueda, José L. Huertas:
Structural testing of pipelined analog to digital converters. 436-439 - Joceli Mayer, Rui Seara, Sidnei Noceti Filho, Rogério dos Santos:
Analytical approach for compensation of the D/A conversion effect. 440-443 - Yeshoda Yedevelly, Kwong-Shu Chao, Lieyi Fang:
A compensation technique for integrator's pole error in cascaded sigma-delta modulators. 444-447 - Omid Oliaei:
Analysis of multirate sigma-delta modulators. 448-451 - Elizabeth de Lira Mendes, Patrick Loumeau, Jean-François Naviner
A switched-current sample and hold circuit for low frequency applications. 452-455 - Bingxin Li, Hannu Tenhunen:
Sigma delta modulators using semi-uniform quantizers. 456-459 - Christian Jesús B. Fayomi, Gordon W. Roberts, Mohamad Sawan:
A 1-V, 10-bit rail-to-rail successive approximation analog-to-digital converter in standard 0.18 um CMOS technology. 460-463 - Francisco Colodro Ruiz, Antonio Jesús Torralba Silgado:
Improved multirate sigma-delta architecture. 464-467 - Baiying Yu, William C. Black Jr.:
Error analysis for time-interleaved analog channels. 468-471 - Charif Beainy, Rola A. Baki, Mourad N. El-Gamal:
Distortion analysis of high-frequency log-domain filters using Volterra series. 472-475 - Jorge R. Fernandes
The effect of mismatch and disturbances on the quadrature relation of a cross-coupled relaxation oscillator. 476-479 - Arie van Staveren, Chris J. M. Verhoeven:
Optimizing a resonator tap for maximizing oscillator carrier-to-noise ratio. 480-483 - Afshin Rezayee, Ken Martin:
A three-stage coupled ring oscillator with quadrature outputs. 484-487 - Kari Stadius, Risto Kaunisto, Veikko Porra:
Monolithic tunable capacitors for RF applications. 488-491 - Ryan Perigny, Un-Ku Moon, Gabor C. Temes:
Area efficient CMOS charge pump circuits. 492-495 - Eduard Alarcón, Alberto Poveda, Eva Vidal
Analog current-mode implementation of a one-cycle integrated controller for switching power converters. 496-499 - Eduard Alarcón, Alfonso Romero, Alberto Poveda, Sonia Porta, Luis Martínez-Salamero:
Sliding-mode control analog integrated circuit for switching DC-DC power converters. 500-503 - Hongchin Lin
New four-phase generation circuits for low-voltage charge pumps. 504-507 - Ron Balczewski, Ramesh Harjani:
Capacitive voltage multipliers: a high efficiency method to generate multiple on-chip supply voltages. 508-511 - José Luis González, Eduard Alarcón:
Clock-jitter induced distortion in high speed CMOS switched-current segmented digital-to-analog converters. 512-515 - Jesper Steensgaard:
High-resolution mismatch-shaping digital-to-analog converters. 516-519 - Jiandong Jiang, Edward K. F. Lee:
Segmented sine wave digital-to-analog converters for frequency synthesizer. 520-523 - Mark Vesterbacka, J. Jacob Wikner
Design of encoders for linear-coded D/A converters. 524-527 - Samgsuk Kim, Minkyu Song:
An 8-bit 200 MSPS CMOS A/D converter for analog interface module of TFT-LCD driver. 528-531 - Jirayuth Mahattanakul, Sitthichai Pookaiyaudom, Chris Toumazou:
Understanding Wilson current mirror via the negative feedback approach. 532-535 - Huiting Chen, Frank Whiteside, Randall L. Geiger:
Current mirror circuit with accurate mirror gain for low beta transistors. 536-539 - Laszlo Toth, Yannis P. Tsividis:
Generalized chopper stabilization. 540-543 - Chunyan Wang, M. Omair Ahmad, M. N. S. Swamy:
Low power current comparator cell for weak current operations. 544-547 - Shigetaka Takagi, Nicodimus Retdian Agung, Kazuyuki Wada, Nobuo Fujii:
Active guard band circuit for substrate noise suppression. 548-551 - Wooyoung Choi, Ramesh Harjani, Bapiraju Vinnakota:
Non-ideal amplifier effects on the accuracy of analog-to-digital capacitor ratio converter. 552-555 - Rabin Raut:
Stabilizing the transconductance in CMOS transconductors for application in gm-C filters. 556-559 - Robert M. Fox, Hyung-Jong Ko, William R. Eisenstadt
High-gain common-mode feedback circuits for differential log-domain filters. 560-563 - Shashidhar Tantry
Two floating resistor circuits and their applications to synaptic weights in analog neural networks. 564-567 - Ahmed M. A. Ali
Correction of operational amplifier gain error in pipelined A/D converters. 568-571 - John B. Hughes, Martin Mee, William Donaldson:
A low voltage 8-bit, 40 MS/s switched-current pipeline analog-to-digital converter. 572-575 - Babak Nejati, Omid Shoaei
A 10-bit, 2.5-V, 40 M sample/s, pipelined analog-to-digital converter in 0.6-um CMOS. 576-579 - Yong-In Park, Soundarapandian Karthikeyan, Frank (Ching-Yuh) Tsay, Eduardo Bartolome:
A low power 10 bit, 80 MS/s CMOS pipelined ADC at 1.8 V power supply. 580-583 - Lauri Sumanen, Kari Halonen:
A single-amplifier 6-bit CMOS pipeline A/D converter for WCDMA receivers. 584-587 - Dalibor Biolek
Algorithmic s-z transformations for continuous-time to discrete-time filter conversion. 588-590 - Roelof H. Klunder, Jaap Hoekstra:
Energy conservation in a circuit with single electron tunnel junctions. 591-594 - Neeraj Nayak, Baiying Yu, William C. Black Jr.:
A comparison of transient digitization methods for high speed analog signals. 595-598 - Igor M. Filanovsky, P. N. Matkhanov:
On synthesis of a network to have the impulse response described by an integer power of sinusoid over its semi-period. 599-602 - Igor M. Filanovsky, P. N. Matkhanov:
On synthesis of a reactance network having the step response described by a sinusoid with a given envelope. 603-606 - Piero Malcovati
Optimization of the integrator output swing in low-voltage sigma-delta modulators. 607-610 - Chian C. Ho, Chung J. Kuo:
Oversampling sigma-delta modulator stabilized by two local nonlinear feedback loop techniques. 611-614 - Martijn F. Snoeij, Ovidiu Bajdechi, Johan H. Huijsing:
A 4th-order switched-capacitor sigma-delta A/D converter using a high-ripple Chebyshev loop filter. 615-618 - Fernando Muñoz
A 1.1 V low-power Sigma-Delta modulator for 14-b 16 kHz A/D conversion. 619-622 - Nguyen T. Thao:
Overview on a new approach to one-bit nth order Sigma-Delta modulation. 623-626 - Jader A. De Lima, Carlos Dualibe:
A low-voltage programmable-gain CMOS amplifier with very-low temperature-drift. 627-630 - Mezyad M. Amourah, Randall L. Geiger:
A high gain strategy with positive-feedback gain enhancement technique. 631-634 - Joseph Sylvester Chang, Bah-Hwee Gwee
A novel low-power low-voltage Class D amplifier with feedback for improving THD, power efficiency and gain linearity. 635-638 - Christian Jesús B. Fayomi, Mohamad Sawan, Gordon W. Roberts:
A design strategy for a 1-V rail-to-rail input/output CMOS opamp. 639-642 - Asit Shankar, José Silva-Martínez, Edgar Sánchez-Sinencio:
A low voltage operational transconductance amplifier using common mode feedforward for high frequency switched capacitor circuits. 643-646 - Cheng-Chung Hsu, Jieh-Tsorng Wu:
Highly linear 100 MHz CMOS programmable gain amplifiers. 647-650 - Brett Wilson, Muhammad Al-Gahtani
Improved logarithmic converter based on a transconductance feedback amplifier. 651-654 - Hanspeter Schmid:
The current-feedback OTA. 655-658 - Amir Hossein Nejad-Malayeri, Tajinder Manku:
A 270 MHz, 1.8 V fully differential CMOS operational amplifier for switched capacitor channel select filters in wide-band wireless applications. 659-662 - Andrew T. K. Tang:
Bandpass spread spectrum clocking for reduced clock spurs in autozeroed amplifiers. 663-666 - Eric A. M. Klumperink, Federico Bruccoleri, Bram Nauta:
Finding all elementary circuits exploiting transconductance. 667-670 - Jaime Ramírez-Angulo, Ramón González Carvajal, Antonio Jesús Torralba Silgado, Carlos Nieva:
A new class AB differential input stage for implementation of low-voltage high slew rate op amps and linear transconductors. 671-674 - R. Sitdhikorn, Apisak Worapishet, John B. Hughes:
A low-voltage neutralised class AB switched-current technique. 675-678 - Kostis Michelakis, Solon Despotopoulos, Stephen G. Badcock, Christos Papavassiliou, Anthony G. O'Neill
SiGe HMOSFET differential pair. 679-682 - Laszlo Tóth, George Palaskas, Yannis P. Tsividis:
"Noninvasive" techniques for syllabic companding in signal processors. 683-686 - Myles H. Capstick, J. Kel Fidler:
Delay approximation for synchronous filter topologies. 687-690 - Hrvoje Babic, Mladen Vucic:
Filter families with minimum time-bandwidth products. 691-694 - Kahtan A. Mezher
Noise-flow-graph analysis of OTA-C filters. 695-698 - Naoki Matsumoto:
Simple proof of the Routh stability criterion based on order reduction of polynomials and principle of argument. 699-702 - Sangjin Hong, Wayne E. Stark:
Performance effects of using analog memory in baseband signal processing systems design. 703-706 - Jaime Ramírez-Angulo, Francisco Ledesma:
Compact CMOS circuits for high-speed continuous-time linear weighted voltage addition. 707-710 - Joongho Choi, Jinup Lim, Sungwon Noh, Jaeyoung Shin, Kwangoh Kim:
3.3-V line drivers for digital subscriber line applications. 711-714 - Mehrdad Ramezani, C. André T. Salama:
An improved bang-bang phase detector for clock and data recovery applications. 715-718 - Clarence K. L. Tam, Gordon W. Roberts:
A robust DC current generation and measurement technique for deep submicron circuits. 719-722 - Sher Singh Rajput, Sudhanshu Shekhar Jamuar:
Low voltage, low power, high performance current conveyors. 723-726 - Jörg Krupar, Rico Srowik, Jörg Schreiter, Achim Graupner, René Schüffny, Udo Jörges:
Minimizing charge injection errors in high-precision, high-speed SC-circuits. 727-730 - Gianluca Giustolisi, Gaetano Palumbo:
Detailed frequency analysis of power supply rejection in Brokaw bandgap. 731-734 - Jader A. De Lima:
A low-voltage triode-MOSFET four-quadrant multiplier with optimized current-efficiency. 735-738 - Wensheng Yu, Long Wang:
Robust strictly positive real synthesis for convex combination of the fifth-order polynomials. 739-742
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