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Un-Ku Moon
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2020 – today
- 2024
- [c158]Manxin Li
, Runpeng Gao, Calder Wilson, Amartya Basak, Evan C. Markwell, Matthew L. Johnston, Un-Ku Moon:
An Easy-to-Drive Discrete-Time ADC Topology Using Digital Predictive Level-Shifting. ISCAS 2024: 1-5 - [c157]Hanyu Wang
Wideband Low-Distortion Noise-Coupled Delta-Sigma ADC. MWSCAS 2024: 1226-1229 - 2023
- [j82]Manxin Li
A Rail-to-Rail 12 MS/s 91.3 dB SNDR 94.1 dB DR Two-Step SAR ADC With Integrated Input Buffer Using Predictive Level-Shifting. IEEE J. Solid State Circuits 58(12): 3555-3564 (2023) - [c156]Manxin Li
A 16- Bit 100kHz Bandwidth Pseudo-Pseudo-Differential Delta-Sigma ADC. ISCAS 2023: 1-5 - [c155]Manxin Li
A Rail-to-Rail 12MS 91.3dB SNDR 94.1dB DR Two-Step SAR ADC with Integrated Input Buffer Using Predictive Level-Shifting. ISSCC 2023: 172-173 - [c154]Vladimir Veselý, Calvin Yoji Lee, Tejasvi Anand, Un-Ku Moon:
PLL-SAR: A New High-Speed Analog to Digital Converter Architecture. MWSCAS 2023: 84-88 - 2022
- [c153]David J. Allstot, Un-Ku Moon, Gabor C. Temes:
Switched-Capacitor Circuits. CICC 2022: 1-8 - [c152]Hang Hu, Vladimir Veselý, Un-Ku Moon:
Passive Third Order Continuous-Time ΔΣ Modulator with Q Enhancement Technique. ISCAS 2022: 1234-1238 - [c151]Hang Hu, Vladimir Veselý, Un-Ku Moon:
Ultra-Low OSR Calibration Free MASH Noise Shaping SAR ADC. ISCAS 2022: 1244-1248 - [c150]Calvin Yoji Lee, Un-Ku Moon:
A 0.0375mm2 203.5µW 108.8dB DR DT Single-Loop DSM Audio ADC Using a Single-Ended Ring-Amplifier-Based Integrator in 180nm CMOS. ISSCC 2022: 412-414 - 2021
- [j81]Lukang Shi
Noise-Shaping SAR ADC Using a Two-Capacitor Digitally Calibrated DAC With 82.6-dB SNDR and 90.9-dB SFDR. IEEE Trans. Circuits Syst. I Regul. Pap. 68(10): 4001-4012 (2021) - [j80]Calvin Yoji Lee
A Pseudo-Pseudo-Differential ADC Achieving 105dB SNDR in 10kHz Bandwidth Using Ring Amplifier Based Integrators. IEEE Trans. Circuits Syst. II Express Briefs 68(7): 2327-2331 (2021) - [c149]Alexander Pierce, Eashwar Thaigarajan, Rajiv Singh, Erhan Hancioglu, Un-Ku Moon, Gabor C. Temes:
Low-Distortion Correlated Level Shifting Sample-and-Hold Stage. NEWCAS 2021: 1-4 - 2020
- [j79]Hyuk Sun
A 951-fsrms Period Jitter 3.2% Modulation Range in-Band Modulation Spread-Spectrum Clock Generator. IEEE J. Solid State Circuits 55(2): 426-438 (2020) - [j78]Yang Xu
A 77-dB-DR 0.65-mW 20-MHz 5th-Order Coupled Source Followers Based Low-Pass Filter. IEEE J. Solid State Circuits 55(10): 2810-2818 (2020) - [j77]Yang Xu
A Charge-Domain Switched-Gm-C Band-Pass Filter Using Interleaved Semi-Passive Charge-Sharing Technique. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(2): 600-610 (2020) - [c148]Lukang Shi, Eashwar Thaigarajan, Rajiv Singh, Erhan Hancioglu, Un-Ku Moon, Gabor C. Temes:
Noise-Shaping SAR ADC Using a Two-Capacitor Digitally Calibrated DAC with 85.1 dB DR and 91 dB SFDR. MWSCAS 2020: 353-356
2010 – 2019
- 2019
- [j76]Ahmed ElShater
A 10-mW 16-b 15-MS/s Two-Step SAR ADC With 95-dB DR Using Dual-Deadzone Ring Amplifier. IEEE J. Solid State Circuits 54(12): 3410-3420 (2019) - [j75]Tao He
Noise Filtering and Linearization of Single-Ended Sampled-Data Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(4): 1331-1341 (2019) - [c147]Bohui Xiao, Praveen Kumar Venkatachala, Yang Xu, Ahmed ElShater, Calvin Yoji Lee, Spencer Leuenberger, Qadeer Ahmad Khan, Un-Ku Moon:
An 80mA Capacitor-Less LDO with 6.5µA Quiescent Current and No Frequency Compensation Using Adaptive-Deadzone Ring Amplifier. A-SSCC 2019: 39-42 - [c146]Hang Hu, Calvin Y. Lee, Ahmed ElShater, Zhiyuan Dai, Fan Ye, Un-Ku Moon:
Simultaneous STF and NTF Estimation in CTΔΣ Modulators with ARMA-Model. ISCAS 2019: 1-5 - [c145]Ahmed ElShater, Calvin Y. Lee, Praveen Kumar Venkatachala, Mohamed Dessouky, Un-Ku Moon:
Gm-Free Assisted Opamp Technique for Continuous Time Delta-Sigma Modulators. ISCAS 2019: 1-4 - [c144]Calvin Yoji Lee, Ahmed ElShater, Praveen Kumar Venkatachala, Hang Hu, Bohui Xiao, Un-Ku Moon:
Application of Ring-Amplifiers for Low-Power Wide-Bandwidth Digital Subsampling ADC-PLL. ISCAS 2019: 1-5 - [c143]Calvin Yoji Lee, Praveen Kumar Venkatachala, Ahmed ElShater, Bohui Xiao, Hang Hu, Un-Ku Moon:
Cascoded Ring Amplifiers for High Speed and High Accuracy Settling. ISCAS 2019: 1-5 - [c142]Ahmed ElShater, Calvin Yoji Lee, Praveen Kumar Venkatachala, Jason Muhlestein, Spencer Leuenberger, Kazuki Sobue, Koichi Hamashita, Un-Ku Moon:
A 10mW 16b 15MS/s Two-Step SAR ADC with 95dB DR Using Dual-Deadzone Ring-Amplifier. ISSCC 2019: 70-72 - 2018
- [j74]Hyuk Sun
An Oversampling Stochastic ADC Using VCO-Based Quantizers. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(12): 4037-4050 (2018) - [c141]Calvin Lee, Spencer Leuenberger, Praveen Kumar Venkatachala, Ahmed ElShater, Michael Oatman, Bohui Xiao, Un-Ku Moon:
A Power Efficient SAR Algorithm for High Resolution ADCs. ISCAS 2018: 1-5 - [c140]Spencer Leuenberger, Praveen Kumar Venkatachala, Ahmed ElShater, Michael Oatman, Calvin Lee, Bohui Xiao, Un-Ku Moon:
An Empirical Study of the Settling Performance of Ring Amplifiers for Pipelined ADCs. ISCAS 2018: 1-5 - [c139]Praveen Kumar Venkatachala, Spencer Leuenberger, Ahmed ElShater, Calvin Lee, Yang Xu, Bohui Xiao, Michael Oatman, Un-Ku Moon:
Process Invariant Biasing of Ring Amplifiers Using Deadzone Regulation Circuit. ISCAS 2018: 1-5 - [c138]Praveen Kumar Venkatachala, Spencer Leuenberger, Ahmed ElShater, Calvin Lee, Jason Muhlestein, Bohui Xiao, Michael Oatman, Un-Ku Moon:
Passive Compensation for Improved Settling and Large Signal Stabilization of Ring Amplifiers. ISCAS 2018: 1-5 - [c137]Bohui Xiao, Spencer Leuenberger, Praveen Kumar Venkatachala, Ahmed ElShater, Calvin Lee, Michael Oatman, Un-Ku Moon:
Power Optimized Comparator Selecting Method For Stochastic ADC. ISCAS 2018: 1-4 - [c136]Matt Straayer, Seung-Tak Ryu, Un-Ku Moon:
Session 14 overview: High-resolution ADCs: Data converter subcommittee. ISSCC 2018: 228-229 - [c135]Kostas Doris, Jan Westra, Un-Ku Moon:
Session 22 overview: Gigahertz data converters: Data converter subcommittee. ISSCC 2018: 356-357 - 2017
- [c134]Spencer Leuenberger, Jason Muhlestein, Hyuk Sun, Praveen Kumar Venkatachala, Un-Ku Moon:
A 74.33 dB SNDR 20 MSPS 2.74 mW pipelined ADC using a dynamic deadzone ring amplifier. CICC 2017: 1-4 - [c133]Jason Muhlestein, Spencer Leuenberger, Hyuk Sun, Yang Xu, Un-Ku Moon:
A 73dB SNDR 20MS/s 1.28mW SAR-TDC using hybrid two-step quantization. CICC 2017: 1-4 - [c132]Hyuk Sun, Kazuki Sobue, Koichi Hamashita, Tejasvi Anand, Un-Ku Moon:
A 0.951 psrms period jitter, 3.2% modulation range, DSM-free, spread-spectrum PLL. CICC 2017: 1-4 - [c131]Yang Xu, Jason Muhlestein, Un-Ku Moon:
A 0.65mW 20MHz 5th-order low-pass filter with +28.8dBm IIP3 using source follower coupling. CICC 2017: 1-4 - [c130]Jason Muhlestein, Farshad Farahbakhshian, Praveen Kumar Venkatachala, Un-Ku Moon:
A multi-path ring amplifier with dynamic biasing. ISCAS 2017: 1-4 - [c129]Praveen Kumar Venkatachala, Ahmed ElShater, Yang Xu, Manar El-Chammas, Un-Ku Moon:
Voltage domain correction technique for timing skew errors in time interleaved ADCs. ISCAS 2017: 1-4 - [c128]Yang Xu, Praveen Kumar Venkatachala, Un-Ku Moon:
A highly compact wideband continuous-time transimpedance low-pass filter. ISCAS 2017: 1-4 - [c127]Jan Mulder, Paul Ferguson, Un-Ku Moon:
Session 16 overview: Gigahertz data converters. ISSCC 2017: 274-275 - [c126]Tai-Cheng Lee, Bob Verbruggen, Un-Ku Moon:
Session 28 overview: Hybrid ADCs. ISSCC 2017: 464-465 - [c125]Tao He, Manjunath Kareppagoudr, Un-Ku Moon, Gabor C. Temes, Yi Zhang:
Pseudo-pseudo-differential circuits. MWSCAS 2017: 1517-1520 - 2016
- [j73]Allen Waters, Jason Muhlestein, Un-Ku Moon:
Analysis of Metastability Errors in Conventional, LSB-First, and Asynchronous SAR ADCs. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(11): 1898-1909 (2016) - [c124]Hyuk Sun, Jason Muhlestein, Spencer Leuenberger, Kazuki Sobue, Koichi Hamashita, Un-Ku Moon:
A 50 MHz bandwidth 54.2 dB SNDR reference-free stochastic ADC using VCO-based quantizers. A-SSCC 2016: 325-328 - [c123]David Robertson
Data converter reflections: 19 papers from the last ten years that deserve a second look. ESSCIRC 2016: 161-164 - [c122]Hyuk Sun, Kazuki Sobue, Koichi Hamashita, Un-Ku Moon:
A power efficient PLL with in-loop-bandwidth spread-spectrum modulation scheme using a charge-based discrete-time loop filter. ISCAS 2016: 2755-2758 - [c121]Yang Xu, Spencer Leuenberger, Praveen Kumar Venkatachala, Un-Ku Moon:
A 0.6mW 31MHz 4th-order low-pass filter with +29dBm IIP3 using self-coupled source follower based biquads in 0.18µm CMOS. VLSI Circuits 2016: 1-2 - 2015
- [j72]Yue Hu, Hariprasath Venkatram, Nima Maghari, Un-Ku Moon:
A Continuous-Time ΔΣ ADC Utilizing Time Information for Two Cycles of Excess Loop Delay Compensation. IEEE Trans. Circuits Syst. II Express Briefs 62-II(11): 1063-1067 (2015) - [c120]Allen Waters, Un-Ku Moon:
A fully automated verilog-to-layout synthesized ADC demonstrating 56dB-SNDR with 2MHz-BW. A-SSCC 2015: 1-4 - [c119]Hyuk Sun, Jason Muhlestein, Un-Ku Moon:
A VCO-based spatial averaging stochastic ADC. ICECS 2015: 272-275 - [c118]Jason Muhlestein, Hariprasath Venkatram, Jon Guerber, Allen Waters, Un-Ku Moon:
Bit-error-rate analysis and mixed signal triple modular redundancy methods for data converters. ICECS 2015: 421-424 - [c117]Allen Waters, Jason Muhlestein, Un-Ku Moon:
Analysis of metastability errors in asynchronous SAR ADCs. ICECS 2015: 547-550 - [c116]Spencer Leuenberger, Un-Ku Moon:
A single OpAmp 2nd-Order ΔΣ ADC with a double integrating quantizer. ISCAS 2015: 309-312 - [c115]Allen Waters, Jerry Leung, Manideep Gande, Un-Ku Moon:
A ΔΣ ADC using an LSB-first SAR quantizer. ISCAS 2015: 1638-1641 - [c114]Jerry Leung, Allen Waters, Un-Ku Moon:
Selectable starting bit SAR ADC. ISCAS 2015: 1654-1657 - [c113]Yang Xu, Spencer Leuenberger, Un-Ku Moon:
Highly linear continuous-time MASH ΔΣ ADC with dual VCO-based quantizers. ISCAS 2015: 2033-2036 - [c112]Yue Hu, Spencer Leuenberger, Yang Xu, Un-Ku Moon:
Time-interleaved integrating quantizer incorporating channel coupling for speed and linearity enhancement. ISCAS 2015: 2249-2252 - [c111]Hyuk Sun, Un-Ku Moon:
MDLL/PLL dual-path clock generator. MWSCAS 2015: 1-4 - [c110]Allen Waters, Un-Ku Moon:
Practical modeling of comparator metastability for conventional and LSB-first SAR ADCs. MWSCAS 2015: 1-4 - [c109]Yang Xu, Hyuk Sun, Un-Ku Moon:
Analysis of discrete-time charge-domain complex bandpass filter with accurately tunable center frequency. MWSCAS 2015: 1-4 - 2014
- [j71]Taehwan Oh, Hariprasath Venkatram, Un-Ku Moon:
A Time-Based Pipelined ADC Using Both Voltage and Time Domain Information. IEEE J. Solid State Circuits 49(4): 961-971 (2014) - [j70]Manideep Gande, Hariprasath Venkatram, Ho-Young Lee, Jon Guerber, Un-Ku Moon:
Blind Calibration Algorithm for Nonlinearity Correction Based on Selective Sampling. IEEE J. Solid State Circuits 49(8): 1715-1724 (2014) - [j69]Skyler Weaver, Benjamin P. Hershberg, Un-Ku Moon:
Digitally Synthesized Stochastic Flash ADC Using Only Standard Digital Cells. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(1): 84-91 (2014) - [c108]Yue Hu, Yang Xu, Un-Ku Moon:
Inherently linear time symmetric pulse width modulation. CICC 2014: 1-4 - [c107]Nima Maghari, Un-Ku Moon:
Emerging analog-to-digital converters. ESSCIRC 2014: 43-50 - [c106]Allen Waters, Jerry Leung, Un-Ku Moon:
LSB-first SAR ADC with bit-repeating for reduced energy consumption. ICECS 2014: 203-206 - [c105]Allen Waters, Spencer Leuenberger, Farshad Farahbakhshian, Un-Ku Moon:
Analysis and performance trade-offs of linearity calibration for stochastic ADCs. ICECS 2014: 207-210 - [c104]Spencer Leuenberger, Allen Waters, Un-Ku Moon:
Resistive correction of low output impedance high-speed current-steering DACs. ICECS 2014: 459-462 - [c103]Yue Hu, Farshad Farahbakhshian, Un-Ku Moon:
Time amplifiers based on phase accumulation. ISCAS 2014: 2349-2352 - [c102]Farshad Farahbakhshian, Allen Waters, Jason Muhlestein, Un-Ku Moon:
Stochastic approximation register ADC. NEWCAS 2014: 189-192 - [c101]Hariprasath Venkatram, Taehwan Oh, Kazuki Sobue, Koichi Hamashita, Un-Ku Moon:
A 48 fJ/CS, 74 dB SNDR, 87 dB SFDR, 85 dB THD, 30 MS/s pipelined ADC using hybrid dynamic amplifier. VLSIC 2014: 1-2 - 2013
- [j68]Un-Ku Moon:
New Associate Editor. IEEE J. Solid State Circuits 48(2): 343 (2013) - [j67]Omid Rajaee, Un-Ku Moon:
Highly Linear Noise-Shaped Pipelined ADC Utilizing a Relaxed Accuracy Front-End. IEEE J. Solid State Circuits 48(2): 502-515 (2013) - [j66]Un-Ku Moon:
New Associate Editor. IEEE J. Solid State Circuits 48(3): 635 (2013) - [j65]Taehwan Oh, Nima Maghari, Un-Ku Moon:
A Second-Order ΔΣ ADC Using Noise-Shaped Two-Step Integrating Quantizer. IEEE J. Solid State Circuits 48(6): 1465-1474 (2013) - [j64]Un-Ku Moon:
Message From the Outgoing Editor-in-Chief. IEEE J. Solid State Circuits 48(8): 1767 (2013) - [j63]Hariprasath Venkatram, Jon Guerber, Manideep Gande, Un-Ku Moon:
Detection and Correction Methods for Single Event Effects in Analog to Digital Converters. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(12): 3163-3172 (2013) - [c100]Manideep Gande, Ho-Young Lee, Hariprasath Venkatram, Jon Guerber, Un-Ku Moon:
Blind background calibration of harmonic distortion based on selective sampling. CICC 2013: 1-4 - [c99]Hariprasath Venkatram, Benjamin P. Hershberg, Taehwan Oh, Manideep Gande, Kazuki Sobue, Koichi Hamashita, Un-Ku Moon:
Parallel gain enhancement technique for switched-capacitor circuits. CICC 2013: 1-4 - [c98]Manideep Gande, Jon Guerber, Un-Ku Moon:
Analysis of back-end flash in a 1.5b/stage pipelined ADC. ISCAS 2013: 2247-2250 - 2012
- [j62]Un-Ku Moon:
New Associate Editors. IEEE J. Solid State Circuits 47(5): 1071-1072 (2012) - [j61]Un-Ku Moon:
New Associate Editor. IEEE J. Solid State Circuits 47(9): 1963 (2012) - [j60]Un-Ku Moon:
New Associate Editor. IEEE J. Solid State Circuits 47(10): 2279 (2012) - [j59]Jon Guerber, Hariprasath Venkatram, Manideep Gande, Allen Waters, Un-Ku Moon:
A 10-b Ternary SAR ADC With Quantization Time Information Utilization. IEEE J. Solid State Circuits 47(11): 2604-2613 (2012) - [j58]Benjamin P. Hershberg, Skyler Weaver, Kazuki Sobue, Seiji Takeuchi, Koichi Hamashita, Un-Ku Moon:
Ring Amplifiers for Switched Capacitor Circuits. IEEE J. Solid State Circuits 47(12): 2928-2942 (2012) - [j57]Jon Guerber, Manideep Gande, Un-Ku Moon:
The Analysis and Application of Redundant Multistage ADC Resolution Improvements Through PDF Residue Shaping. IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(8): 1733-1742 (2012) - [j56]Naga Sasidhar, David Gubbins, Pavan Kumar Hanumolu, Un-Ku Moon:
Rail-to-Rail Input Pipelined ADC Incorporating Multistage Signal Mapping. IEEE Trans. Circuits Syst. II Express Briefs 59-II(9): 558-562 (2012) - [c97]Hariprasath Venkatram, Taehwan Oh, Jon Guerber, Un-Ku Moon:
Class A+ amplifier with controlled positive feedback for discrete-time signal processing circuits. ISCAS 2012: 428-431 - [c96]Taehwan Oh, Hariprasath Venkatram, Jon Guerber, Un-Ku Moon:
Correlated jitter sampling for jitter cancellation in pipelined TDC. ISCAS 2012: 810-813 - [c95]Benjamin P. Hershberg, Tawfiq Musah
The effect of correlated level shifting on noise performance in switched capacitor circuits. ISCAS 2012: 942-945 - [c94]Jon Guerber, Hariprasath Venkatram, Taehwan Oh, Un-Ku Moon:
Enhanced SAR ADC energy efficiency from the early reset merged capacitor switching algorithm. ISCAS 2012: 2361-2364 - [c93]Benjamin P. Hershberg, Skyler Weaver, Kazuki Sobue, Seiji Takeuchi, Koichi Hamashita, Un-Ku Moon:
Ring amplifiers for switched-capacitor circuits. ISSCC 2012: 460-462 - [c92]Ho-Young Lee, Bumha Lee, Un-Ku Moon:
A 31.3fJ/conversion-step 70.4dB SNDR 30MS/s 1.2V two-step pipelined ADC in 0.13μm CMOS. ISSCC 2012: 474-476 - [c91]Un-Ku Moon, Shanthi Pavan:
Little-known features of well-known creatures. ISSCC 2012: 511 - [c90]Benjamin P. Hershberg, Skyler Weaver, Kazuki Sobue, Seiji Takeuchi, Koichi Hamashita, Un-Ku Moon:
A 61.5dB SNDR pipelined ADC using simple highly-scalable ring amplifiers. VLSIC 2012: 32-33 - [c89]Taehwan Oh, Nima Maghari, Un-Ku Moon:
A 5MHz BW 70.7dB SNDR noise-shaped two-step quantizer based ΔΣ ADC. VLSIC 2012: 162-163 - [c88]Manideep Gande, Nima Maghari, Taehwan Oh, Un-Ku Moon:
A 71dB dynamic range third-order ΔΣ TDC using charge-pump. VLSIC 2012: 168-169 - [c87]Pavan Kumar Hanumolu, Un-Ku Moon, Terri S. Fiez:
Tutorial T5: Advanced Analog-Mixed Signal System and Circuit Techniques. VLSI Design 2012: 20-21 - 2011
- [j55]Omid Rajaee, Seiji Takeuchi, Mitsuru Aniya, Koichi Hamashita, Un-Ku Moon:
Low-OSR Over-Ranging Hybrid ADC Incorporating Noise-Shaped Two-Step Quantizer. IEEE J. Solid State Circuits 46(11): 2458-2468 (2011) - [j54]Nima Maghari, Un-Ku Moon:
A Third-Order DT ΔΣ Modulator Using Noise-Shaped Bi-Directional Single-Slope Quantizer. IEEE J. Solid State Circuits 46(12): 2882-2891 (2011) - [j53]Igor Vytyaz, Pavan Kumar Hanumolu, Un-Ku Moon, Kartikeya Mayaram:
Design-Oriented Analysis of Circuits With Equality Constraints. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(5): 1089-1098 (2011) - [j52]Taehwan Oh, Nima Maghari, David Gubbins, Un-Ku Moon:
Analysis of Residue Integration Sampling With Improved Jitter Immunity. IEEE Trans. Circuits Syst. II Express Briefs 58-II(7): 417-421 (2011) - [j51]Skyler Weaver, Benjamin P. Hershberg, Nima Maghari, Un-Ku Moon:
Domino-Logic-Based ADC for Digital Synthesis. IEEE Trans. Circuits Syst. II Express Briefs 58-II(11): 744-747 (2011) - [c86]Jon Guerber, Manideep Gande, Hariprasath Venkatram, Allen Waters, Un-Ku Moon:
A 10b Ternary SAR ADC with decision time quantization based redundancy. A-SSCC 2011: 65-68 - [c85]B. Robert Gregoire, Tawfiq Musah
A 30% beyond VDD signal swing 9-ENOB pipelined ADC using a 1.2V 30dB loop-gain opamp. A-SSCC 2011: 345-348 - [c84]Ho-Young Lee, David Gubbins, Bumha Lee, Un-Ku Moon:
A 0.7V 810µW 10b 30MS/s comparator-based two-step pipelined ADC. CICC 2011: 1-4 - [c83]Benjamin P. Hershberg, Skyler Weaver, Seiji Takeuchi, Koichi Hamashita, Un-Ku Moon:
Binary Access Memory: An optimized lookup table for successive approximation applications. ISCAS 2011: 1620-1623 - [c82]Nima Maghari, Un-Ku Moon:
A third-order DT ΔΣ modulator using noise-shaped bidirectional single-slope quantizer. ISSCC 2011: 474-476 - 2010
- [j50]Charles T. Peach, Un-Ku Moon, David J. Allstot:
An 11.1 mW 42 MS/s 10 b ADC With Two-Step Settling in 0.18 μ m CMOS. IEEE J. Solid State Circuits 45(2): 391-400 (2010) - [j49]Omid Rajaee, Tawfiq Musah
Design of a 79 dB 80 MHz 8X-OSR Hybrid Delta-Sigma/Pipelined ADC. IEEE J. Solid State Circuits 45(4): 719-730 (2010) - [j48]David Gubbins, Bumha Lee, Pavan Kumar Hanumolu, Un-Ku Moon:
Continuous-Time Input Pipeline ADCs. IEEE J. Solid State Circuits 45(8): 1456-1468 (2010) - [j47]Benjamin P. Hershberg, Skyler Weaver, Un-Ku Moon:
Design of a Split-CLS Pipelined ADC With Full Signal Swing Using an Accurate But Fractional Signal Swing Opamp. IEEE J. Solid State Circuits 45(12): 2623-2633 (2010) - [j46]Skyler Weaver, Benjamin P. Hershberg, Peter Kurahashi, Daniel Knierim, Un-Ku Moon:
Stochastic Flash Analog-to-Digital Conversion. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(11): 2825-2833 (2010) - [c81]Nima Maghari, Skyler Weaver, Un-Ku Moon:
A +5dBFS third-order extended dynamic range single-loop ΔΣ modulator. CICC 2010: 1-4 - [c80]Skyler Weaver, Benjamin P. Hershberg, Un-Ku Moon:
PDF folding for stochastic flash ADCs. ICECS 2010: 770-773 - [c79]Hariprasath Venkatram, Benjamin P. Hershberg, Un-Ku Moon:
Asynchronous CLS for Zero Crossing based Circuits. ICECS 2010: 1025-1028 - [c78]Nima Maghari, Un-Ku Moon:
Precise area-controlled return-to-zero current steering DAC with reduced sensitivity to clock jitter. ISCAS 2010: 297-300 - [c77]Omid Rajaee, Yue Hu, Manideep Gande, Tawfiq Musah
An interstage correlated double sampling technique for switched-capacitor gain stages. ISCAS 2010: 1252-1255 - [c76]Tawfiq Musah
Pseudo-differential zero-crossing-based circuit with differential error suppression. ISCAS 2010: 1731-1734 - [c75]Nima Maghari, Un-Ku Moon:
A double-sampled path-coupled single-loop ΣΔ modulator using noise-shaped integrating quantizer. ISCAS 2010: 4005-4008 - [c74]Benjamin P. Hershberg, Skyler Weaver, Un-Ku Moon:
A 1.4V signal swing hybrid CLS-opamp/ZCBC pipelined ADC using a 300mV output swing opamp. ISSCC 2010: 302-303
2000 – 2009
- 2009
- [j45]Ting Wu, Pavan Kumar Hanumolu, Kartikeya Mayaram, Un-Ku Moon:
Method for a Constant Loop Bandwidth in LC-VCO PLL Frequency Synthesizers. IEEE J. Solid State Circuits 44(2): 427-435 (2009) - [j44]Kyehyung Lee, Qingdong Meng, Tetsuro Sugimoto, Koichi Hamashita, Kaoru Takasuka, Seiji Takeuchi, Un-Ku Moon, Gabor C. Temes:
A 0.8 V, 2.6 mW, 88 dB Dual-Channel Audio Delta-Sigma D/A Converter With Headphone Driver. IEEE J. Solid State Circuits 44(3): 916-927 (2009) - [j43]Nima Maghari, Sunwoo Kwon, Un-Ku Moon:
74 dB SNDR Multi-Loop Sturdy-MASH Delta-Sigma Modulator Using 35 dB Open-Loop Opamp Gain. IEEE J. Solid State Circuits 44(8): 2212-2221 (2009) - [j42]Min-Gyu Kim, Pavan Kumar Hanumolu, Un-Ku Moon:
A 10 MS/s 11-bit 0.19 mm2 Algorithmic ADC With Improved Clocking Scheme. IEEE J. Solid State Circuits 44(9): 2348-2355 (2009) - [j41]Naga Sasidhar, Youn-Jae Kook, Seiji Takeuchi, Koichi Hamashita, Kaoru Takasuka, Pavan Kumar Hanumolu, Un-Ku Moon:
A Low Power Pipelined ADC Using Capacitor and Opamp Sharing Technique With a Scheme to Cancel the Effect of Signal Dependent Kickback. IEEE J. Solid State Circuits 44(9): 2392-2401 (2009) - [j40]Igor Vytyaz, David C. Lee, Pavan Kumar Hanumolu, Un-Ku Moon, Kartikeya Mayaram:
Automated Design and Optimization of Low-Noise Oscillators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(5): 609-622 (2009) - [j39]Anthony Chan Carusone
Guest Editorial Special Issue on ISCAS 2008. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(5): 861-864 (2009) - [j38]Anthony Chan Carusone
Introducing Jump-Start Tutorials. IEEE Trans. Circuits Syst. II Express Briefs 56-II(8): 613 (2009) - [j37]Volodymyr Kratyuk, Pavan Kumar Hanumolu, Kerem Ok, Un-Ku Moon, Kartikeya Mayaram:
A Digital PLL With a Stochastic Time-to-Digital Converter. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(8): 1612-1621 (2009) - [c73]Tawfiq Musah
A 630μW zero-crossing-based ΔΣ ADC using switched-resistor current sources in 45nm CMOS. CICC 2009: 1-4 - [c72]Sunwoo Kwon, Pavan Kumar Hanumolu, Sang-Ho Kim, Sung-No Lee, Seung-Bin You, Ho-Jin Park, Jae-Whui Kim, Un-Ku Moon:
An 11mW 100MHz 16X-OSR 64dB-SNDR hybrid CT/DT ΔΣ ADC with relaxed DEM timing. CICC 2009: 171-174 - [c71]David Gubbins, Sunwoo Kwon, Bumha Lee, Pavan Kumar Hanumolu, Un-Ku Moon:
A continuous-time input pipeline ADC with inherent anti-alias filtering. CICC 2009: 275-278 - [c70]Skyler Weaver, Benjamin P. Hershberg, Pavan Kumar Hanumolu, Un-Ku Moon:
A multiplexer-based digital passive linear counter (PLINCO). ICECS 2009: 607-610 - 2008
- [j36]Pavan Kumar Hanumolu, Volodymyr Kratyuk, Gu-Yeon Wei, Un-Ku Moon:
A Sub-Picosecond Resolution 0.5-1.5 GHz Digital-to-Phase Converter. IEEE J. Solid State Circuits 43(2): 414-424 (2008) - [j35]Pavan Kumar Hanumolu, Gu-Yeon Wei, Un-Ku Moon:
A Wide-Tracking Range Clock and Data Recovery Circuit. IEEE J. Solid State Circuits 43(2): 425-439 (2008) - [j34]Min-Gyu Kim, Gil-Cho Ahn, Pavan Kumar Hanumolu, Sanghyeon Lee, Sang-Ho Kim, Seung-Bin You, Jae-Whui Kim, Gabor C. Temes, Un-Ku Moon:
A 0.9 V 92 dB Double-Sampled Switched-RC Delta-Sigma Audio ADC. IEEE J. Solid State Circuits 43(5): 1195-1206 (2008) - [j33]B. Robert Gregoire, Un-Ku Moon:
An Over-60 dB True Rail-to-Rail Performance Using Correlated Level Shifting and an Opamp With Only 30 dB Loop Gain. IEEE J. Solid State Circuits 43(12): 2620-2630 (2008) - [j32]Igor Vytyaz, David C. Lee, Pavan Kumar Hanumolu, Un-Ku Moon, Kartikeya Mayaram:
Sensitivity Analysis for Oscillators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(9): 1521-1534 (2008) - [j31]Gianluca Setti, Un-Ku Moon:
A Note From the Editors. IEEE Trans. Circuits Syst. II Express Briefs 55-II(3): 205-206 (2008) - [c69]Nima Maghari, Sunwoo Kwon, Un-Ku Moon:
74dB SNDR multi-loop sturdy-MASH delta-sigma modulator using 35dB opamp gain. CICC 2008: 101-104 - [c68]David Gubbins, Bumha Lee, Pavan Kumar Hanumolu, Un-Ku Moon:
A continuous-time input pipeline ADC. CICC 2008: 169-172 - [c67]Igor Vytyaz, Josh Carnes, Ting Wu, Pavan Kumar Hanumolu, Un-Ku Moon, Kartikeya Mayaram:
Noise tolerant oscillator design using perturbation projection vector analysis. CICC 2008: 695-698 - [c66]Peter Kurahashi, Pavan Kumar Hanumolu, Un-Ku Moon:
A 1V downconversion filter using duty-cycle controlled bandwidth tuning. CICC 2008: 707-710 - [c65]Igor Vytyaz, Pavan Kumar Hanumolu, Un-Ku Moon, Kartikeya Mayaram:
Periodic Steady-State Analysis Augmented with Design Equality Constraints. DATE 2008: 312-317 - [c64]B. Robert Gregoire, Un-Ku Moon:
Reducing the effects of component mismatch by using relative size information. ISCAS 2008: 512-515 - [c63]Igor Vytyaz, David C. Lee, Un-Ku Moon, Kartikeya Mayaram:
Parameter variation analysis for voltage controlled oscillators in phase-locked loops. ISCAS 2008: 716-719 - [c62]Omid Rajaee, Un-Ku Moon:
Enhanced multi-bit delta-sigma modulator with two-step pipeline quantizer. ISCAS 2008: 1212-1215 - [c61]Nima Maghari, Un-Ku Moon:
Multi-loop efficient sturdy MASH delta-sigma modulators. ISCAS 2008: 1216-1219 - [c60]B. Robert Gregoire, Un-Ku Moon:
An Over-60dB True Rail-to-Rail Performance Using Correlated Level Shifting and an Opamp with 30dB Loop Gain. ISSCC 2008: 540-541 - 2007
- [j30]Ting Wu, Kartikeya Mayaram, Un-Ku Moon:
An On-chip Calibration Technique for Reducing Supply Voltage Sensitivity in Ring Oscillators. IEEE J. Solid State Circuits 42(4): 775-783 (2007) - [j29]Peter Kurahashi, Pavan Kumar Hanumolu, Gabor C. Temes, Un-Ku Moon:
Design of Low-Voltage Highly Linear Switched-R-MOSFET-C Filters. IEEE J. Solid State Circuits 42(8): 1699-1709 (2007) - [j28]B. Robert Gregoire, Un-Ku Moon:
A Sub 1-V Constant Gm- C Switched-Capacitor Current Source. IEEE Trans. Circuits Syst. II Express Briefs 54-II(3): 222-226 (2007) - [j27]Volodymyr Kratyuk, Pavan Kumar Hanumolu, Un-Ku Moon, Kartikeya Mayaram:
A Design Procedure for All-Digital Phase-Locked Loops Based on a Charge-Pump Phase-Locked-Loop Analogy. IEEE Trans. Circuits Syst. II Express Briefs 54-II(3): 247-251 (2007) - [c59]Volodymyr Kratyuk, Pavan Kumar Hanumolu, Kartikeya Mayaram, Un-Ku Moon:
A 0.6GHz to 2GHz Digital PLL with Wide Tracking Range. CICC 2007: 305-308 - [c58]Youn-Jae Kook, Jipeng Li, Bumha Lee, Un-Ku Moon:
Low-Power and High-Speed Pipelined ADC Using Time-Aligned CDS Technique. CICC 2007: 321-324 - [c57]Gil-Cho Ahn, Min-Gyu Kim, Pavan Kumar Hanumolu, Un-Ku Moon:
A 1V 10b 30MSPS Switched-RC Pipelined ADC. CICC 2007: 325-328 - [c56]Merrick Brownlee, Pavan Kumar Hanumolu, Un-Ku Moon:
A 3.2Gb/s Oversampling CDR with Improved Jitter Tolerance. CICC 2007: 353-356 - [c55]Pavan Kumar Hanumolu, Gu-Yeon Wei, Un-Ku Moon, Kartikeya Mayaram:
Digitally-Enhanced Phase-Locking Circuits. CICC 2007: 361-368 - [c54]Ting Wu, Pavan Kumar Hanumolu, Kartikeya Mayaram, Un-Ku Moon:
A 4.2 GHz PLL Frequency Synthesizer with an Adaptively Tuned Coarse Loop. CICC 2007: 547-550 - [c53]Igor Vytyaz, David C. Lee, Suihua Lu, Amit Mehrotra, Un-Ku Moon, Kartikeya Mayaram:
Parameter Finding Methods for Oscillators with a Specified Oscillation Frequency. DAC 2007: 424-429 - [c52]Igor Vytyaz, David C. Lee, Pavan Kumar Hanumolu, Un-Ku Moon, Kartikeya Mayaram:
Sensitivity analysis for oscillators. ICCAD 2007: 458-463 - [c51]Un-Ku Moon:
State-of-the-art continuous-time filters from scratch. ICECS 2007: 1 - [c50]Omid Rajaee, Nima Maghari, Un-Ku Moon:
Time-Shifted CDS Enhancement of Comparator-Based MDAC for Pipelined ADC Applications. ICECS 2007: 210-213 - [c49]Skyler Weaver, Daniel Knierim, Roland Wazenried, Un-Ku Moon:
Design Considerations for Stochastic Analog-to-Digital Conversion. ICECS 2007: 234-237 - [c48]Josh Carnes, Igor Vytyaz, Pavan Kumar Hanumolu, Kartikeya Mayaram, Un-Ku Moon:
Design and Analysis of Noise Tolerant Ring Oscillators Using Maneatis Delay Cells. ICECS 2007: 494-497 - [c47]Ranganathan Desikachari, Mark Steeds, Jeffrey M. Huard, Un-Ku Moon:
An Efficient Design Procedure for High-Speed Low-Power Dual-Modulus CMOS Prescalers. ICECS 2007: 645-648 - [c46]Nima Maghari, Sunwoo Kwon, Gabor C. Temes, Un-Ku Moon:
Mixed-Order Sturdy MASH Delta-Sigma Modulator. ISCAS 2007: 257-260 - [c45]Sunwoo Kwon, Un-Ku Moon:
A High-Speed Delta-Sigma Modulator with Relaxed DEM Timing Requirement. ISCAS 2007: 733-736 - [c44]Igor Vytyaz, David C. Lee, Suihua Lu, Amit Mehrotra, Un-Ku Moon, Kartikeya Mayaram:
Periodic Steady-State Analysis of Oscillators with a Specified Oscillation Frequency. ISCAS 2007: 1073-1076 - [c43]B. Robert Gregoire, Un-Ku Moon:
Process-Independent Resistor Temperature-Coefficients using Series/Parallel and Parallel/Series Composite Resistors. ISCAS 2007: 2826-2829 - 2006
- [j26]Jipeng Li, Un-Ku Moon, John A. McNeill
Comments on 'Split ADC' architecture for deterministic digital background calibration of a 16-bit 1-MS/s ADC". IEEE J. Solid State Circuits 41(6): 1481 (2006) - [j25]Merrick Brownlee, Pavan Kumar Hanumolu, Kartikeya Mayaram, Un-Ku Moon:
A 0.5-GHz to 2.5-GHz PLL With Fully Differential Supply Regulated Tuning. IEEE J. Solid State Circuits 41(12): 2720-2728 (2006) - [c42]Pavan Kumar Hanumolu, Min-Gyu Kim, Gu-Yeon Wei, Un-Ku Moon:
A 1.6Gbps Digital Clock and Data Recovery Circuit. CICC 2006: 603-606 - [c41]Peter Kurahashi, Pavan Kumar Hanumolu, Gabor C. Temes, Un-Ku Moon:
A 0.6V Highly Linear Switched-R-MOSFET-C Filter. CICC 2006: 833-836 - [c40]Josh Carnes, Un-Ku Moon:
The effect of switch resistance on pipelined ADC MDAC settling time. ISCAS 2006 - [c39]Nasser Talebbeydokhti
Constant transconductance bias circuit with an on-chip resistor. ISCAS 2006 - [c38]Ting Wu, Un-Ku Moon, Kartikeya Mayaram:
Dependence of LC VCO oscillation frequency on bias current. ISCAS 2006 - [c37]Merrick Brownlee, Pavan Kumar Hanumolu, Kartikeya Mayaram, Un-Ku Moon:
A 0.5 to 2.5GHz PLL with Fully Differential Supply-Regulated Tuning. ISSCC 2006: 2412-2421 - 2005
- [j24]Arun Rao, William McIntyre, Un-Ku Moon, Gábor C. Temes:
Noise-shaping techniques applied to switched-capacitor voltage regulators. IEEE J. Solid State Circuits 40(2): 422-429 (2005) - [j23]Jipeng Li, Gil-Cho Ahn, Dong-Young Chang, Un-Ku Moon:
A 0.9-V 12-mW 5-MSPS algorithmic ADC with 77-dB SFDR. IEEE J. Solid State Circuits 40(4): 960-969 (2005) - [j22]Gowtham Vemulapalli, Pavan Kumar Hanumolu, Youn-Jae Kook, Un-Ku Moon:
A 0.8-V accurately tuned linear continuous-time filter. IEEE J. Solid State Circuits 40(9): 1972-1977 (2005) - [j21]Gil-Cho Ahn, Dong-Young Chang, Matthew E. Brown, Naoto Ozaki, Hiroshi Youra, Ken Yamamura, Koichi Hamashita, Kaoru Takasuka, Gábor C. Temes, Un-Ku Moon:
A 0.6-V 82-dB delta-sigma audio ADC using switched-RC integrators. IEEE J. Solid State Circuits 40(12): 2398-2407 (2005) - [j20]Dong-Young Chang, Gil-Cho Ahn, Un-Ku Moon:
Sub-1-V design techniques for high-linearity multistage/pipelined analog-to-digital converters. IEEE Trans. Circuits Syst. I Regul. Pap. 52-I(1): 1-12 (2005) - [j19]Brandon Greenley, Raymond Veith, Dong-Young Chang, Un-Ku Moon:
A low-Voltage 10-bit CMOS DAC in 0.01-mm2 die area. IEEE Trans. Circuits Syst. II Express Briefs 52-II(5): 246-250 (2005) - [j18]Anurag Pulincherry, Mike Hufford, Eric Naviasky, Un-Ku Moon:
A time-delay jitter-insensitive continuous-time bandpass ΔΣ modulator architecture. IEEE Trans. Circuits Syst. II Express Briefs 52-II(10): 680-684 (2005) - [c36]Jafar Savoj, David Rich, Brett Forejt, Peter R. Kinget
Will continued process-node shrinks kill high-performance analog design? CICC 2005: 616-617 - [c35]Volodymyr Kratyuk, Pavan Kumar Hanumolu, Un-Ku Moon, Kartikeya Mayaram:
A low spur fractional-N frequency synthesizer architecture. ISCAS (3) 2005: 2807-2810 - [c34]Ting Wu, Pavan Kumar Hanumolu, Un-Ku Moon, Kartikeya Mayaram:
An FMDLL based dual-loop frequency synthesizer for 5 GHz WLAN applications. ISCAS (4) 2005: 3986-3989 - [c33]Volodymyr Kratyuk, Igor Vytyaz, Un-Ku Moon, Kartikeya Mayaram:
Analysis of supply and ground noise sensitivity in ring and LC oscillators. ISCAS (6) 2005: 5986-5989 - [c32]Vivek Sharma, Un-Ku Moon, Gabor C. Temes:
A generic multilevel multiplying D/A converter for pipelined ADCs. ISCAS (6) 2005: 6182-6185 - [c31]Thirumalai Rengachari, Vivek Sharma, Gabor C. Temes, Un-Ku Moon:
A 10-bit algorithmic A/D converter for cytosensor application. ISCAS (6) 2005: 6186-6189 - 2004
- [j17]Jipeng Li, Un-Ku Moon:
A 1.8-V 67-mW 10-bit 100-MS/s pipelined ADC using time-shifted CDS technique. IEEE J. Solid State Circuits 39(9): 1468-1476 (2004) - [j16]Un-Ku Moon, Gang Huang:
CMOS implementation of nonlinear spectral-line timing recovery in digital data-communication systems. IEEE Trans. Circuits Syst. I Regul. Pap. 51-I(2): 298-308 (2004) - [j15]Charles Myers, Brandon Greenley, Daniel Thomas, Un-Ku Moon:
Continuous-time filter design optimized for reduced die area. IEEE Trans. Circuits Syst. II Express Briefs 51-II(3): 105-110 (2004) - [j14]Sang-Min Yoo, Jong-Bum Park
A 2.5-V 10-b 120-MSample/s CMOS pipelined ADC based on merged-capacitor switching. IEEE Trans. Circuits Syst. II Express Briefs 51-II(5): 269-275 (2004) - [j13]Pavan Kumar Hanumolu, Merrick Brownlee, Kartikeya Mayaram, Un-Ku Moon:
Analysis of charge-pump phase-locked loops. IEEE Trans. Circuits Syst. I Regul. Pap. 51-I(9): 1665-1674 (2004) - [j12]Dong-Young Chang, Jipeng Li, Un-Ku Moon:
Radix-based digital calibration techniques for multi-stage recycling pipelined ADCs. IEEE Trans. Circuits Syst. I Regul. Pap. 51-I(11): 2133-2140 (2004) - [c30]Gowtham Vemulapalli, Pavan Kumar Hanumolu, Un-Ku Moon:
A 0.8V accurately-tuned continuous-time filter. CICC 2004: 45-48 - [c29]Xuesheng Wang, Yuhua Guo, Un-Ku Moon, Gabor C. Temes:
Experimental verification of a correlation-based correction algorithm for multi-bit delta-sigma ADCs. CICC 2004: 523-526 - [c28]Pavan Kumar Hanumolu, Bryan Casper, Randy Mooney, Gu-Yeon Wei, Un-Ku Moon:
Jitter in high-speed serial and parallel links. ISCAS (4) 2004: 425-428 - [c27]Shelly Xiao, José B. Silva, Un-Ku Moon, Gabor C. Temes:
A tunable duty-cycle-controlled switched-R-MOSFET-C CMOS filter for low-voltage and high-linearity applications. ISCAS (1) 2004: 433-436 - [c26]Min-Gyu Kim, Gil-Cho Ahn, Un-Ku Moon:
An improved algorithmic ADC clocking scheme. ISCAS (1) 2004: 589-592 - [c25]José B. Silva, Un-Ku Moon, Gabor C. Temes:
Low-distortion delta-sigma topologies for MASH architectures. ISCAS (1) 2004: 1144-1147 - 2003
- [j11]Dong-Young Chang, Un-Ku Moon:
A 1.4-V 10-bit 25-MS/s pipelined ADC using opamp-reset switching technique. IEEE J. Solid State Circuits 38(8): 1401-1404 (2003) - [j10]Jipeng Li, Un-Ku Moon:
Background calibration techniques for multistage pipelined ADCs with digital redundancy. IEEE Trans. Circuits Syst. II Express Briefs 50(9): 531-538 (2003) - [j9]Pavan Kumar Hanumolu, Bryan Casper, Randy Mooney, Gu-Yeon Wei, Un-Ku Moon:
Analysis of PLL clock jitter in high-speed serial links. IEEE Trans. Circuits Syst. II Express Briefs 50(11): 879-886 (2003) - [c24]Jipeng Li, Un-Ku Moon:
A 1.8-V 67mW 10-bit 100MSPS pipelined ADC using time-shifted CDS technique. CICC 2003: 413-416 - [c23]Jipeng Li, Un-Ku Moon:
An extended radix-based digital calibration technique for multi-stage ADC. ISCAS (1) 2003: 829-832 - [c22]Anurag Pulincherry, Mike Hufford, Eric Naviasky, Un-Ku Moon:
Continuous-time, frequency translating, bandpass delta-sigma modulator. ISCAS (1) 2003: 1013-1016 - 2002
- [j8]Mustafa Keskin, Un-Ku Moon, Gabor C. Temes:
A 1-V 10-MHz clock-rate 13-bit CMOS ΔΣ modulator using unity-gain-reset op amps. IEEE J. Solid State Circuits 37(7): 817-824 (2002) - [j7]Tetsuya Kajita, Un-Ku Moon, Gabor C. Temes:
A two-chip interface for a MEMS accelerometer. IEEE Trans. Instrum. Meas. 51(4): 853-858 (2002) - [j6]Tetsuya Kajita, Un-Ku Moon, Gabor C. Temes:
A Noise-shaping Accelerometer Interface Circuit for Two-chip Implementation. VLSI Design 14(4): 355-361 (2002) - [c21]José Silva, Xuesheng Wang, Peter Kiss, Un-Ku Moon, Gabor C. Temes:
Digital techniques for improved ΔΣ data conversion. CICC 2002: 183-190 - [c20]Jeff L. Sonntag, John T. Stonick, James Gorecki, Bill Beale, Bill Check, Xue-Mei Gong, Joe Guiliano, Kyong Lee, Bob Lefferts, David A. Yokoyama-Martin, Un-Ku Moon, Amber Sengir, Stephen Titus, Gu-Yeon Wei, Daniel Weinlader, YaoHua Yang:
An adaptive PAM-4 5 Gb/s backplane transceiver in 0.25 μm CMOS. CICC 2002: 363-366 - [c19]Sang-Min Yoo, Tae-Hwan Oh, Jung-Woong Moon, Seung-Hoon Lee, Un-Ku Moon:
A 2.5 V 10 b 120 MSample/s CMOS pipelined ADC with high SFDR. CICC 2002: 441-444 - [c18]Dong-Young Chang, Lei Wu, Un-Ku Moon:
Low-voltage pipelined ADC using opamp-reset switching technique. CICC 2002: 461-464 - [c17]X. Wang, Un-Ku Moon, M. Liu, Gabor C. Temes:
Digital correlation technique for the estimation and correction of DAC errors in multibit mash Delta-Sigma ADCs. ISCAS (4) 2002: 691-694 - [c16]Arun Rao, William McIntyre, J. Parry, Un-Ku Moon, Gabor C. Temes:
Buck-boost switched-capacitor DC-DC voltage regulator using delta-sigma control loop. ISCAS (4) 2002: 743-746 - [c15]Jipeng Li, Un-Ku Moon:
High-speed pipelined A/D converter using time-shifted CDS technique. ISCAS (1) 2002: 909-912 - 2001
- [c14]Peter Kiss, Un-Ku Moon, Jesper Steensgaard, John T. Stonick, Gabor C. Temes:
Multibit Sigma-Delta ADC with mixed-mode DAC error correction. ISCAS (1) 2001: 280-283 - [c13]Mustafa Keskin, Un-Ku Moon, Gabor C. Temes:
Low-voltage low-sensitivity switched-capacitor bandpass Sigma-Delta modulator. ISCAS (1) 2001: 348-351 - [c12]Brandon Greenley, Un-Ku Moon, Raymond Veith:
A 1.8 V CMOS DAC cell with ultra high gain op-amp in 0.0143 mm2. ISCAS (1) 2001: 412-415 - [c11]Ryan Perigny, Un-Ku Moon, Gabor C. Temes:
Area efficient CMOS charge pump circuits. ISCAS (1) 2001: 492-495 - 2000
- [j5]Un-Ku Moon:
CMOS high-frequency switched-capacitor filters for telecommunication applications. IEEE J. Solid State Circuits 35(2): 212-220 (2000) - [j4]Un-Ku Moon:
Correction to "CMOS high-frequency switched-capacitor filters for telecommunication applications". IEEE J. Solid State Circuits 35(6): 920 (2000) - [j3]William B. Wilson, Un-Ku Moon, Kadaba R. Lakshmikumar, Liang Dai:
A CMOS self-calibrating frequency synthesizer. IEEE J. Solid State Circuits 35(10): 1437-1444 (2000) - [c10]Peter Kiss, José Silva, Un-Ku Moon, John T. Stonick, Gabor C. Temes:
Improved adaptive digital compensation for cascaded ΔΣ ADCs. ISCAS 2000: 33-36 - [c9]Mark Lehne, John T. Stonick, Un-Ku Moon:
An adaptive offset cancellation mixer for direct conversion receivers in 2.4 GHz CMOS. ISCAS 2000: 319-322 - [c8]Tetsuya Kajita, Un-Ku Moon, Gabor C. Temes:
A noise-shaping accelerometer interface circuit for two-chip implementation. ISCAS 2000: 337-340 - [c7]Un-Ku Moon, José Silva, Jesper Steensgaard, Gabor C. Temes:
A switched-capacitor DAC with analog mismatch correction. ISCAS 2000: 421-424 - [c6]Lei Wu, Mustafa Keskin, Un-Ku Moon, Gabor C. Temes:
Efficient common-mode feedback circuits for pseudo-differential switched-capacitor stages. ISCAS 2000: 445-448 - [c5]Zhilliang Zheng, Byung-Moo Min, Un-Ku Moon, Gabor C. Temes:
Efficient error-cancelling algorithmic ADC. ISCAS 2000: 451-454
1990 – 1999
- 1999
- [j2]Un-Ku Moon, Gabor C. Temes, Jesper Steensgaard:
Digital techniques for improving the accuracy of data converters. IEEE Commun. Mag. 37(10): 136-143 (1999) - [c4]Jesper Steensgaard, Un-Ku Moon, Gabor C. Temes:
Mismatch-shaping serial digital-to-analog converter. ISCAS (2) 1999: 5-8 - [c3]E. Bidari, Mustafa Keskin, Franco Maloberti, Un-Ku Moon, Jesper Steensgaard, Gabor C. Temes:
Low-voltage switched-capacitor circuits. ISCAS (2) 1999: 49-52 - [c2]Zhiliang Zheng, Un-Ku Moon, Jesper Steensgaard, Bo Wang, Gabor C. Temes:
Capacitor mismatch error cancellation technique for a successive approximation A/D converter. ISCAS (2) 1999: 326-329 - 1993
- [j1]Un-Ku Moon, Bang-Sup Song:
Design of a low-distortion 22-kHz fifth-order Bessel filter. IEEE J. Solid State Circuits 28(12): 1254-1264 (1993) - [c1]Un-Ku Moon, Bang-Sup Song:
Low-distortion Continuous-time R-MOSFET-C Filters. ISCAS 1993: 1168-1171
Coauthor Index
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