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Bang-Sup Song
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- affiliation: University of California, San Diego, USA
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2010 – 2019
- 2014
- [j35]Yuichi Miyahara, Mitsuhiro Sano, Kazuo Koyama, Toshikazu Suzuki, Koichi Hamashita, Bang-Sup Song:
A 14b 60 MS/s Pipelined ADC Adaptively Cancelling Opamp Gain and Nonlinearity. IEEE J. Solid State Circuits 49(2): 416-425 (2014) - 2013
- [c13]Yuichi Miyahara, Mitsuhiro Sano, Kazuo Koyama, Toshikazu Suzuki, Koichi Hamashita, Bang-Sup Song:
Adaptive cancellation of gain and nonlinearity errors in pipelined ADCs. ISSCC 2013: 282-283 - 2010
- [j34]Yun-Shiang Shu, Junpei Kamiishi, Koji Tomioka, Koichi Hamashita, Bang-Sup Song:
LMS-Based Noise Leakage Calibration of Cascaded Continuous-Time Delta Sigma Modulators. IEEE J. Solid State Circuits 45(2): 368-379 (2010)
2000 – 2009
- 2009
- [j33]Yun-Shiang Shu, Moon-Jung Kyung, Wei-Ming Lee, Bang-Sup Song, Bedabrata Pain:
A 10∼15-bit 60-MS/s Floating-Point ADC With Digital Gain and Offset Calibration. IEEE J. Solid State Circuits 44(9): 2356-2365 (2009) - [j32]Yusuke Aiba, Koji Tomioka, Yuta Nakashima, Koichi Hamashita, Bang-Sup Song:
A Fifth-Order Gm-C Continuous-Time ΔΣ Modulator With Process-Insensitive Input Linear Range. IEEE J. Solid State Circuits 44(9): 2381-2391 (2009) - [c12]Junpei Kamiishi, Yun-Shiang Shu, Koji Tomioka, Koichi Hamashita, Bang-Sup Song:
A self-calibrated 2-1-1 cascaded continuous-time ΔΣ modulator. CICC 2009: 9-12 - 2008
- [j31]Yun-Shiang Shu, Bang-Sup Song:
A 15-bit Linear 20-MS/s Pipelined ADC Digitally Calibrated With Signal-Dependent Dithering. IEEE J. Solid State Circuits 43(2): 342-350 (2008) - [j30]Supisa Lerstaveesin, Manoj Gupta, David Kang, Bang-Sup Song:
A 48-860 MHz CMOS Low-IF Direct-Conversion DTV Tuner. IEEE J. Solid State Circuits 43(9): 2013-2024 (2008) - [c11]Yun-Shiang Shu, Moon-Jung Kyung, Wei-Ming Lee, Bang-Sup Song, Bedabrata Pain:
A 10∼15b 60MS/s floating-point ADC with digital gain and offset calibration. CICC 2008: 157-160 - [c10]Yun-Shiang Shu, Bang-Sup Song, Kantilal Bacrania:
A 65nm CMOS CT ΔΣ Modulator with 81dB DR and 8MHz BW Auto-Tuned by Pulse Injection. ISSCC 2008: 500-501 - 2007
- [j29]Sourja Ray, Bang-Sup Song:
A 13-b Linear, 40-MS/s Pipelined ADC With Self-Configured Capacitor Matching. IEEE J. Solid State Circuits 42(3): 463-474 (2007) - [j28]Seung-Tak Ryu, Bang-Sup Song, Kantilal Bacrania:
A 10-bit 50-MS/s Pipelined ADC With Opamp Current Reuse. IEEE J. Solid State Circuits 42(3): 475-485 (2007) - [c9]Manoj Gupta, Supisa Lerstaveesin, David Kang, Bang-Sup Song:
A 48-to-860MHz CMOS Direct-Conversion TV Tuner. ISSCC 2007: 206-597 - 2006
- [j27]Yoshiaki Konno, Koji Tomioka, Yusuke Aiba, Katsuhiko Yamazoe, Bang-Sup Song:
A CMOS 1×-16× speed DVD write channel IC. IEEE J. Solid State Circuits 41(3): 642-650 (2006) - [j26]Supisa Lerstaveesin, Bang-Sup Song:
A Complex Image Rejection Circuit With Sign Detection Only. IEEE J. Solid State Circuits 41(12): 2693-2702 (2006) - [j25]Manoj Gupta, Bang-Sup Song:
A 1.8-GHz Spur-Cancelled Fractional-N Frequency Synthesizer With LMS-Based DAC Gain Calibration. IEEE J. Solid State Circuits 41(12): 2842-2851 (2006) - [c8]Seung-Tak Ryu, Bang-Sup Song, Kantilal Bacrania:
A 10b 50MS/s pipelined ADC with opamp current reuse. ISSCC 2006: 792-801 - [c7]Sourja Ray, Bang-Sup Song:
A 13b linear 40MS/s pipelined ADC with self-configured capacitor matching. ISSCC 2006: 852-861 - [c6]Supisa Lerstaveesin, Bang-Sup Song:
A complex image rejection circuit with sign detection only. ISSCC 2006: 1810-1819 - [c5]Manoj Gupta, Bang-Sup Song:
A 1.8GHz Spur-Cancelled Fractional-N Frequency Synthesizer with LMS-Based DAC Gain Calibration. ISSCC 2006: 1922-1931 - 2005
- [j24]Chun-Huat Heng
, Manoj Gupta, Sang-Hoon Lee, David Kang, Bang-Sup Song:
A CMOS TV tuner/demodulator IC with digital image rejection. IEEE J. Solid State Circuits 40(12): 2525-2535 (2005) - 2004
- [j23]Thomas Byunghak Cho, David Kang, Chun-Huat Heng
A 2.4-GHz dual-mode 0.18-μm CMOS transceiver for Bluetooth and 802.11b. IEEE J. Solid State Circuits 39(11): 1916-1926 (2004) - [j22]Seung-Tak Ryu, Sourja Ray, Bang-Sup Song, Gyu-Hyeong Cho, Kantilal Bacrania:
A 14-b linear capacitor self-trimming pipelined ADC. IEEE J. Solid State Circuits 39(11): 2046-2051 (2004) - 2003
- [j21]Yun Kim, Bang-Sup Song, John Grosspietsch, Steven F. Gillig:
Correction to "A carry-free 54 b x 54 b multiplier using equivalent bit conversion algorithm". IEEE J. Solid State Circuits 38(1): 159 (2003) - [j20]Milos D. Ercegovac, Tomás Lang, Y. Kim, Bang-Sup Song, John Grosspietsch, Steven F. Gillig:
Comments on "A carry-free 54 b×54 b multiplier using equivalent bit conversion algorithm". IEEE J. Solid State Circuits 38(1): 160-161 (2003) - [j19]Chun-Huat Heng
A 1.8-GHz CMOS fractional-N frequency synthesizer with randomized multiphase VCO. IEEE J. Solid State Circuits 38(6): 848-854 (2003) - 2002
- [c4]Chun-Huat Heng, Bang-Sup Song:
A 1.8 GHz CMOS fractional-N frequency synthesizer with randomized multi-phase VCO. CICC 2002: 427-430 - [c3]Bang-Sup Song, Thomas Cho, David Kang, Scott Dow:
A 2 MHz GFSK IQ receiver for Bluetooth with DC-tolerant bit slicer. CICC 2002: 431-434 - 2001
- [j18]Myung-Jun Choe, Bang-Sup Song, Kantilal Bacrania:
An 8-b 100-MSample/s CMOS pipelined folding ADC. IEEE J. Solid State Circuits 36(2): 184-194 (2001) - [j17]Hsin-Shu Chen
A 14-b 20-Msamples/s CMOS pipelined ADC. IEEE J. Solid State Circuits 36(6): 997-1001 (2001) - [j16]Yun Kim, Bang-Sup Song, John Grosspietsch, Steven F. Gillig:
A carry-free 54b×54b multiplier using equivalent bit conversion algorithm. IEEE J. Solid State Circuits 36(10): 1538-1545 (2001) - 2000
- [j15]Bang-Sup Song, Patrick L. Rakers, Steven F. Gillig:
A 1-V 6-b 50-MSamples/s current-interpolating CMOS ADC. IEEE J. Solid State Circuits 35(4): 647-651 (2000) - [j14]Woogeun Rhee
A 1.1-GHz CMOS fractional-N frequency synthesizer with a 3-b third-order ΔΣ modulator. IEEE J. Solid State Circuits 35(10): 1453-1460 (2000) - [j13]Myung-Jun Choe, Bang-Sup Song, Kantilal Bacrania:
A 13-b 40-MSamples/s CMOS pipelined folding ADC with background offset trimming. IEEE J. Solid State Circuits 35(12): 1781-1790 (2000) - [j12]Alex R. Bugeja, Bang-Sup Song:
A self-trimming 14-b 100-MS/s CMOS DAC. IEEE J. Solid State Circuits 35(12): 1841-1852 (2000)
1990 – 1999
- 1999
- [j11]Jaejin Park, Eurho Joe, Myung-Jun Choe, Bang-Sup Song:
A 5-MHz IF digital FM demodulator. IEEE J. Solid State Circuits 34(1): 3-11 (1999) - [j10]Alex R. Bugeja, Bang-Sup Song, Patrick L. Rakers, Steven F. Gillig:
A 14-b, 100-MS/s CMOS DAC designed for spectral performance. IEEE J. Solid State Circuits 34(12): 1719-1732 (1999) - [r1]Bang-Sup Song:
Nyquist-Rate ADC and DAC. The VLSI Handbook 1999 - 1998
- [j9]Kyung-Wook Shin, Bang-Sup Song, Kantilal Bacrania:
A 200-MHz complex number multiplier using redundant binary arithmetic. IEEE J. Solid State Circuits 33(6): 904-909 (1998) - [j8]Chun-Sup Kim, Geo-Ok Cho, Yong-Hwan Kim, Bang-Sup Song:
A CMOS 4× speed DVD read channel IC. IEEE J. Solid State Circuits 33(8): 1168-1178 (1998) - 1997
- [j7]Bang-Sup Song, David C. Soo:
NRZ timing recovery technique for band-limited channels. IEEE J. Solid State Circuits 32(4): 514-520 (1997) - [j6]Sung-Ung Kwak, Bang-Sup Song, Kantilal Bacrania:
A 15-b, 5-Msample/s low-spurious CMOS ADC. IEEE J. Solid State Circuits 32(11): 1866-1875 (1997) - 1995
- [j5]Tzi-Hsiung Shu, Bang-Sup Song, Kantilal Bacrania:
A 13-b 10-Msample/s ADC digitally calibrated with oversampling delta-sigma converter. IEEE J. Solid State Circuits 30(4): 443-452 (1995) - [j4]Won-Chul Song, Hae-Wook Choi, Sung-Ung Kwak, Bang-Sup Song:
A 10-b 20-Msample/s low-power CMOS ADC. IEEE J. Solid State Circuits 30(5): 514-521 (1995) - [j3]Bang-Sup Song:
A fourth-order bandpass delta-sigma modulator with reduced numbers of op amps. IEEE J. Solid State Circuits 30(12): 1309-1315 (1995) - 1993
- [c2]Un-Ku Moon, Bang-Sup Song:
Low-distortion Continuous-time R-MOSFET-C Filters. ISCAS 1993: 1168-1171 - [c1]Seung-Hoon Lee, Bang-Sup Song:
Simplified Digital Calibration for Multi-stage Analog-to-digital Converters. ISCAS 1993: 1216-1219
1980 – 1989
- 1989
- [j2]Bang-Sup Song:
A 10.7-MHz switched-capacitor bandpass filter. IEEE J. Solid State Circuits 24(2): 320-324 (1989) - 1988
- [j1]Bang-Sup Song, Michael F. Tompsett, Kadaba R. Lakshmikumar:
A 12-bit 1-Msample/s capacitor error-averaging pipelined A/D converter. IEEE J. Solid State Circuits 23(6): 1324-1333 (1988)
Coauthor Index
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