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Zhiping Yu
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2020 – today
- 2024
- [c47]Yuanyuan Duan, Xingchen Liu, Zhiping Yu, Hanming Wu, Leilai Shao, Xiaolei Zhu:
RLPlanner: Reinforcement Learning Based Floorplanning for Chiplets with Fast Thermal Analysis. DATE 2024: 1-2 - [i3]Zhuofu Tao, Yichen Shi, Yiru Huo, Rui Ye, Zonghang Li, Li Huang, Chen Wu, Na Bai, Zhiping Yu, Ting-Jung Lin, Lei He:
AMSNet: Netlist Dataset for AMS Circuits. CoRR abs/2405.09045 (2024) - [i2]Zhiping Yu, Chenyang Liu, Liqin Liu, Zhenwei Shi, Zhengxia Zou:
MetaEarth: A Generative Foundation Model for Global-Scale Remote Sensing Image Generation. CoRR abs/2405.13570 (2024) - 2023
- [i1]Yuanyuan Duan, Xingchen Liu, Zhiping Yu, Hanming Wu, Leilai Shao, Xiaolei Zhu:
RLPlanner: Reinforcement Learning based Floorplanning for Chiplets with Fast Thermal Analysis. CoRR abs/2312.16895 (2023)
2010 – 2019
- 2018
- [j28]Di Li, Lei Zhang, Li Zhang, Yan Wang, Zhiping Yu:
Design of mm-wave amplifiers based on over & under neutralization techniques. Sci. China Inf. Sci. 61(6): 069404:1-069404:3 (2018) - [j27]ChengKuei Lee, Sen Yin, Jinyu Zhang, Yan Wang, Zhiping Yu:
Study on scalability of hybrid junctionless FinFET and multi-stacked nanowire FET by TCAD simulation. IEICE Electron. Express 15(21): 20180884 (2018) - [j26]Zhijian Pan
, Chuan Qin, Zuochang Ye, Yan Wang
Wideband Inductorless Low-Power LNAs with Gm Enhancement and Noise-Cancellation. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(1): 26-38 (2018) - [c46]Weiping Wu, Lei Zhang, Li Zhang, Yan Wang, Zhiping Yu:
An Accurate dB-Linear Programmable-Gain Amplifier with Temperature-Robust Characteristic. ISCAS 2018: 1-4 - 2017
- [j25]Chuan Qin, Lei Zhang, Li Zhang, Yan Wang, Zhiping Yu:
A 5.8 GHz class-AB power amplifier with 25.4 dBm saturation power and 29.7% PAE. Sci. China Inf. Sci. 60(4): 42403 (2017) - [j24]Chuan Qin
Dual AC Boosting Compensation Scheme for Multistage Amplifiers. IEEE Trans. Circuits Syst. II Express Briefs 64-II(8): 882-886 (2017) - [j23]Dong Huang, Lei Zhang, Di Li, Li Zhang, Yan Wang, Zhiping Yu:
A 60-GHz 360° 5-Bit Phase Shifter With Constant IL Compensation Followed by a Normal Amplifier With ±1 dB Gain Variation and 0.6-dBm OP-1dB. IEEE Trans. Circuits Syst. II Express Briefs 64-II(12): 1437-1441 (2017) - 2016
- [j22]Lei Zhang, Jun Luo, Wei Zhu, Li Zhang, Yan Wang, Zhiping Yu:
A fully integrated CMOS 60-GHz transceiver for IEEE802.11ad applications. J. Commun. Inf. Networks 1(2): 45-61 (2016) - 2015
- [j21]Jun Luo, Lei Zhang, Li Zhang, Yan Wang, Zhiping Yu:
Behavioral Analysis and Optimization of CMOS CML Dividers for Millimeter-Wave Applications. IEEE Trans. Circuits Syst. II Express Briefs 62-II(3): 256-260 (2015) - [c45]Jun Luo, Lei Zhang, Wei Zhu, Li Zhang, Yan Wang, Zhiping Yu:
A 64dB gain 60GHz receiver with 7.1dB noise figure for 802.11ad applications in 90nm CMOS. ISCAS 2015: 2401-2404 - [c44]Jun Luo, Lei Zhang, Li Zhang, Yan Wang, Zhiping Yu:
A 24GHz low power and low phase noise PLL frequency synthesizer with constant KVCO for 60GHz wireless applications. ISCAS 2015: 2840-2543 - 2014
- [j20]Yaping Sun, Jinyu Zhang, Yan Wang, Zhiping Yu:
Fast Convolution Method and Its Application in Mask Optimization for Intensity Calculation Using Basis Expansion. IEEE Trans. Image Process. 23(12): 4982-4995 (2014) - [c43]Huaqiang Wu, Xinyi Li, Yue Bai, Ye Zhang, Minghao Wu, Zhiping Yu, He Qian:
Stack engineering for ReRAM devices performance improvement. ISCAS 2014: 846-849 - [c42]Xiaolong Liu, Lei Zhang, Li Zhang, Yan Wang, Zhiping Yu:
A 3.45-4.22 GHz PLL frequency synthesizer with constant loop bandwidth for WLAN applications. MWSCAS 2014: 749-752 - 2013
- [c41]Chuan Qin, Lei Zhang, Yan Wang, Zhiping Yu, Dajie Zeng:
An inductorless wideband low noise amplifier with current reuse and linearity enhancement. ISCAS 2013: 389-392 - 2012
- [j19]Mingzhi Gao, Zuochang Ye, Yan Wang, Zhiping Yu:
Efficient Full-Chip Statistical Leakage Analysis Based on Fast Matrix Vector Product. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(3): 356-369 (2012) - [j18]Jiying Xue, Yangdong Deng, Zuochang Ye, Hongrui Wang, Liu Yang, Zhiping Yu:
A Framework for Layout-Dependent STI Stress Analysis and Stress-Aware Circuit Optimization. IEEE Trans. Very Large Scale Integr. Syst. 20(3): 498-511 (2012) - [c40]Qing Jin
A transformer-based filtering technique to lower LC-oscillator phase noise. ISCAS 2012: 1383-1386 - 2011
- [j17]Hongrui Wang, Lei Zhang, Li Zhang, Yan Wang, Zhiping Yu:
Design of 24-GHz High-Gain Receiver Front-End Utilizing ESD-Split Input Matching Network. IEEE Trans. Circuits Syst. II Express Briefs 58-II(8): 482-486 (2011) - [j16]Chunyuan Zhou, Lei Zhang, Li Zhang, Yan Wang, Zhiping Yu, He Qian:
Injection-Locking-Based Power and Speed Optimization of CML Dividers. IEEE Trans. Circuits Syst. II Express Briefs 58-II(9): 565-569 (2011) - [j15]Yao Peng, Jinyu Zhang, Yan Wang, Zhiping Yu:
Gradient-Based Source and Mask Optimization in Optical Lithography. IEEE Trans. Image Process. 20(10): 2856-2864 (2011) - [c39]Haitao Wang, Hui Hong, Lingling Sun, Zhiping Yu:
A sample-and-hold circuit for 10-bit 100MS/s pipelined ADC. ASICON 2011: 480-483 - [c38]Mingzhi Gao, Zuochang Ye, Dajie Zeng, Yan Wang, Zhiping Yu:
Robust spatial correlation extraction with limited sample via L1-norm penalty. ASP-DAC 2011: 677-682 - [c37]Lei Zhang, Xiangqing He, Yan Wang, Zhiping Yu:
A fully integrated CMOS nanoscale biosensor microarray. CICC 2011: 1-4 - [c36]Zuochang Ye, Yang Li, Mingzhi Gao, Zhiping Yu:
A novel framework for passive macro-modeling. DAC 2011: 546-551 - [c35]Hongrui Wang, Chao Jiao, Li Zhang, Dajie Zeng, Dongxu Yang, Yan Wang, Zhiping Yu:
A low-power ESD-protected 24GHz receiver front-end with π-type input matching network. ISCAS 2011: 2877-2880 - [c34]Hongrui Wang, Dajie Zeng, Dongxu Yang, Li Zhang, Lei Zhang, Yan Wang, He Qian, Zhiping Yu:
Understanding dynamic behavior of mm-wave CML divider with injection-locking concept. ISCAS 2011: 2885-2888 - 2010
- [j14]Jiying Xue, Tao Li, Yangdong Deng, Zhiping Yu:
Full-chip leakage analysis for 65 nm CMOS technology and beyond. Integr. 43(4): 353-364 (2010) - [j13]Hongrui Wang, Li Zhang, Zhiping Yu:
A Wideband Inductorless LNA With Local Feedback and Noise Cancelling for Low-Power Low-Voltage Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(8): 1993-2005 (2010) - [c33]Jiying Xue, Xiaomeng Jiao, Yangdong Deng, Hao Qian, Dajie Zeng, Guoyu Li, Zhiping Yu:
Massively Parallel Finite Element Simulator for Full-Chip STI Stress Analysis. CIT 2010: 1196-1201 - [c32]Jinyu Zhang, Wei Xiong, Yan Wang, Zhiping Yu, Min-Chun Tsai:
A robust pixel-based RET optimization algorithm independent of initial conditions. ASP-DAC 2010: 645-650 - [c31]Dajie Zeng, Hongrui Wang, Dongxu Yang, Li Zhang, Yan Wang, Zhiping Yu, Yaohui Zhang:
A novel equivalent circuit for on chip transmission lines modeling. CICC 2010: 1-4 - [c30]Huanhuan Zou, Jun Liu, Jincai Wen, Huang Wang, Lingling Sun, Zhiping Yu:
A novel wideband 1-π model with accurate substrate modeling for on-chip spiral inductors. CICC 2010: 1-4 - [c29]Mingzhi Gao, Zuochang Ye, Yan Wang, Zhiping Yu:
Efficient tail estimation for massive correlated log-normal sums: with applications in statistical leakage analysis. DAC 2010: 475-480 - [c28]Jun Liu, Lingling Sun, Zhiping Yu, Marissa Condon:
A new substrate model and parameter extraction method for DNW RF MOSFETs. ISCAS 2010: 2478-2481 - [c27]Yao Peng, Jinyu Zhang, Yan Wang, Zhiping Yu:
High performance source optimization using a gradient-based method in optical lithography. ISQED 2010: 108-113 - [c26]Mingzhi Gao, Zuochang Ye, Yao Peng, Yan Wang, Zhiping Yu:
A comprehensive model for gate delay under process variation and different driving and loading conditions. ISQED 2010: 406-412
2000 – 2009
- 2009
- [j12]Bo Liu, Yan Wang, Zhiping Yu, Leibo Liu
Analog circuit optimization system based on hybrid evolutionary algorithms. Integr. 42(2): 137-148 (2009) - [j11]Lei Zhang, Zhiping Yu, Xiangqing He:
Design and Implementation of Ultralow Current-Mode Amplifier for Biosensor Applications. IEEE Trans. Circuits Syst. II Express Briefs 56-II(7): 540-544 (2009) - [c25]Zhiping Yu, Colin C. McAndrew:
RF CMOS is more than CMOS: Modeling of RF passive components. CICC 2009: 407-414 - [c24]Zuochang Ye, Zhiping Yu:
An efficient algorithm for modeling spatially-correlated process variation in statistical full-chip leakage analysis. ICCAD 2009: 295-301 - [c23]Jiying Xue, Zuochang Ye, Yangdong Deng, Hongrui Wang, Liu Yang, Zhiping Yu:
Layout-dependent STI stress analysis and stress-aware RF/analog circuit design optimization. ICCAD 2009: 521-528 - 2008
- [c22]Fang Gong, Wenjian Yu, Zeyi Wang, Zhiping Yu, Changhao Yan:
Efficient techniques for 3-D impedance extraction using mixed boundary element method. ASP-DAC 2008: 158-163 - [c21]Tao Li, Wenjun Zhang, Zhiping Yu:
Full-chip leakage analysis in nano-scale technologies: mechanisms, variation sources, and verification. DAC 2008: 594-599 - [c20]Wangyang Zhang, Wenjian Yu, Zeyi Wang, Zhiping Yu, Rong Jiang, Jinjun Xiong
An Efficient Method for Chip-Level Statistical Capacitance Extraction Considering Process Variations with Spatial Correlation. DATE 2008: 580-585 - [c19]Jinyu Zhang, Wei Xiong, Yan Wang, Zhiping Yu, Min-Chun Tsai:
A highly efficient optimization algorithm for pixel manipulation in inverse lithography technique. ICCAD 2008: 480-487 - [c18]Lei Zhang, Zhiping Yu, Xiangqing He:
A Statistical Characterization of CMOS Process Fluctuations in Subthreshold Current Mirrors. ISQED 2008: 152-155 - [c17]Tao Li, Zhiping Yu:
Full-Chip Leakage Verification for Manufacturing Considering Process Variations. ISQED 2008: 220-223 - 2007
- [c16]Tao Li, Zhiping Yu:
Statistical Analysis of Full-Chip Leakage Power Considering Junction Tunneling Leakage. DAC 2007: 99-102 - [c15]Lei Zhang, Zhiping Yu, Xiangqing He:
Design and Verification of Ultra Low Current Mode Amplifier Aiming at Biosensor Applications. ICECS 2007: 1304-1307 - [c14]Tao Liu, Wenjun Zhang, Jun Ma, Zhiping Yu:
Improvement Techniques for the EM-Based Neural Network Approach in RF Components Modeling. ISNN (1) 2007: 512-518 - 2006
- [j10]Ximeng Guan, Zhiping Yu:
Fast algorithm for bandstructure calculation in silicon nanowires using supercell approach. Int. J. Comput. Sci. Eng. 2(3/4): 129-133 (2006) - [c13]Zuochang Ye, Zhiping Yu:
Parasitics extraction involving 3-D conductors based on multi-layered Green's function. ASP-DAC 2006: 689-693 - [c12]Tao Li, Ximeng Guan, Zhiping Yu, Wei Xue:
Computation of Si Nanowire Bandstructures on Parallel Machines Through Domain Decomposition. International Conference on Computational Science (1) 2006: 250-257 - [c11]Lei Zhang, Zhiping Yu, Xiangqing He:
Hazard Free Sawtooth Oscillator and Its Application in Ultra Low Current Monitoring. ICECS 2006: 252-255 - 2005
- [c10]Chung-Kuan Cheng, Steve Lin, Andrew B. Kahng, Keh-Jeng Chang, Vijay Pitchumani, Toshiyuki Shibuya, Roberto Suaya, Zhiping Yu, Fook-Luen Heng, Don MacMillen:
Panel I: who is responsible for the design for manufacturability issues in the era of nano-technologies? ASP-DAC 2005 - [c9]Zihong Liu, Zhihua Wang, Guolin Li, Zhiping Yu:
A Novel Solid Neuron-Network Chip Based on Both Biological and Artificial Neural Network Theories. ISNN (1) 2005: 479-484 - 2003
- [c8]Hai Lan, Zhiping Yu, Robert W. Dutton:
A CAD-Oriented Modeling Approach of Frequency-Dependent Behavior of Substrate Noise Coupling for Mixed-Signal IC Design. ISQED 2003: 195-200 - 2002
- [j9]Jung-Suk Goo, Hee-Tae Ahn, Donald J. Ladwig, Zhiping Yu, Thomas H. Lee, Robert W. Dutton:
A noise optimization technique for integrated low-noise amplifiers. IEEE J. Solid State Circuits 37(8): 994-1002 (2002) - [c7]Gaofeng Wang
Accurate Model of Metal-Insulator-Semiconductor Interconnects. ISQED 2002: 48-52 - [c6]Tae-young Oh, Zhiping Yu, Robert W. Dutton:
AC Analysis of Thin Gate Oxide MOS with Quantum Mechanical Corrections. ISQED 2002: 326-330 - 2001
- [j8]Yutao Ma, Litian Liu, Lilin Tian, Zhiping Yu, Zhijian Li:
Analytical charge-control and I-V model for submicrometer anddeep-submicrometer MOSFETs fully comprising quantum mechanical effects. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(4): 495-502 (2001) - 2000
- [c5]Xiaoning Qi, Gaofeng Wang
On-chip inductance modeling and RLC extraction of VLSI interconnects for circuit simulation. CICC 2000: 487-490 - [c4]Zhiping Yu, Dan Yergeau, Robert W. Dutton, O. Sam Nakagawa, Norman Chang, Shen Lin, Weize Xie:
Full Chip Thermal Simulation. ISQED 2000: 145-150
1990 – 1999
- 1998
- [j7]Zhiping Yu, Robert W. Dutton:
Second Order Newton Iteration Method and Its Application to MOS Compact Modeling and Circuit Simulation. VLSI Design 6(1-4): 141-145 (1998) - [j6]Edwin C. Kan, Gyoyoung Jin, Zhiping Yu, Robert W. Dutton:
Observation of Anomalous Negative Differential Resistance in Diode Breakdown Simulation Using Carrier Temperature Dependent Impact Ionization. VLSI Design 6(1-4): 299-302 (1998) - 1995
- [j5]Edwin C. Kan, Zhiping Yu, Robert W. Dutton, Datong Chen, Umberto Ravaioli:
Formulation of Macroscopic Transport Models for Numerical Simulation of Semiconductor Devices. VLSI Design 3(2): 211-224 (1995) - [c3]Boris Troyanovsky, Zhiping Yu, Lydia So, Robert W. Dutton:
Relaxation-based harmonic balance technique for semiconductor device simulation. ICCAD 1995: 700-703 - 1994
- [j4]Ronald J. G. Goossens, Stephen G. Beebe, Zhiping Yu, Robert W. Dutton:
An automatic biasing scheme for tracing arbitrarily shaped I-V curves. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13(3): 310-317 (1994) - 1993
- [b1]Robert W. Dutton, Zhiping Yu:
Technology CAD - computer simulation of IC processes and devices. The Kluwer international series in engineering and computer science 243, Kluwer 1993, ISBN 978-0-7923-9379-5, pp. I-XVI, 1-373 - [j3]Datong Chen, Satoshi Sugino, Zhiping Yu, Robert W. Dutton:
Modeling of the charge balance condition on floating gates and simulation of EEPROMs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(10): 1499-1502 (1993) - 1991
- [c2]Lifeng Wu, Zhilian Yang, Zhiping Yu, Zhijian Li:
GOALSERVER: A Multiobjective Design Optimization Tool for IC Fabrication Process. DAC 1991: 585-590 - 1990
- [j2]Chiaki Takano, Zhiping Yu, Robert W. Dutton:
A nonequilibrium one-dimensional quantum-mechanical simulation for AlGaAs/GaAs HEMT structures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(11): 1217-1224 (1990)
1980 – 1989
- 1989
- [c1]Zhiping Yu, Weijian Zhao, Zhilian Yang, Y. Edmund Lien:
A Novel Algorithm for Improving Convergence Behavior of Circuit Simulators. DAC 1989: 626-629 - 1987
- [j1]Zhiping Yu, Robert W. Dutton, Massimo Vanzi:
An Extension to Newton's Method in Device Simulators--On An Efficient Algorithm to Evaluate Small-Signal Parameters and to Predict Initial Guess. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 6(1): 41-45 (1987)
Coauthor Index
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