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Mauricio Alvarez-Mesa
Person information
- affiliation: Heinrich Hertz Institute, Berlin, Germany
Other persons with the same name
- Mauricio Alvarez 0002 — University of Sheffield, Department of Computer Science, UK
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2020 – today
- 2020
- [c25]Philipp Habermann, Bernardus Juurlink, C. C. Chi, Mauricio Alvarez-Mesa:
Efficient Wavefront Parallel Processing for HEVC CABAC Decoding. PDP 2020: 339-343
2010 – 2019
- 2019
- [c24]Philipp Habermann, Chi Ching Chi, Mauricio Alvarez-Mesa, Ben H. H. Juurlink:
A Bin-Based Bitstream Partitioning Approach for Parallel CABAC Decoding in Next Generation Video Coding. IPDPS 2019: 1053-1062 - 2018
- [j14]Biao Wang, Diego F. de Souza, Mauricio Alvarez-Mesa, Chi Ching Chi, Ben H. H. Juurlink, Aleksandar Ilic
, Nuno Roma
Highly parallel HEVC decoding for heterogeneous systems with CPU and GPU. Signal Process. Image Commun. 62: 93-105 (2018) - [c23]Krzysztof Kurowski, Maciej Glowiak, Bogdan Ludwiczak, Maciej Strozyk, Milosz Ciznicki
PSNC advanced multimedia and visualization infrastructures, services and applications. Web3D 2018: 34:1-34:2 - 2017
- [j13]Philipp Habermann, Chi Ching Chi, Mauricio Alvarez-Mesa, Bernardus Juurlink:
Application-Specific Cache and Prefetching for HEVC CABAC Decoding. IEEE Multim. 24(1): 72-85 (2017) - [j12]Biao Wang, Diego F. de Souza, Mauricio Alvarez-Mesa, Chi Ching Chi, Ben H. H. Juurlink, Aleksandar Ilic
GPU Parallelization of HEVC In-Loop Filters. Int. J. Parallel Program. 45(6): 1515-1535 (2017) - [c22]Matthias Göbel, Ahmed Elhossini, Chi Ching Chi, Mauricio Alvarez-Mesa, Ben H. H. Juurlink:
A Quantitative Analysis of the Memory Architecture of FPGA-SoCs. ARC 2017: 241-252 - [c21]Philipp Habermann, Chi Ching Chi, Mauricio Alvarez-Mesa, Ben H. H. Juurlink:
Syntax Element Partitioning for high-throughput HEVC CABAC decoding. ICASSP 2017: 1308-1312 - 2016
- [c20]Biao Wang, Mauricio Alvarez-Mesa, Chi Ching Chi, Ben H. H. Juurlink, Diego F. de Souza, Aleksandar Ilic
Efficient HEVC decoder for heterogeneous CPU with GPU systems. MMSP 2016: 1-6 - [c19]Angela Pohl, Biagio Cosenza
An evaluation of current SIMD programming models for C++. WPMVP@PPoPP 2016: 3:1-3:8 - 2015
- [j11]Sergio Sanz Rodríguez
A parallel H.264/SVC encoder for high definition video conferencing. Signal Process. Image Commun. 30: 89-106 (2015) - [j10]Jan Lucas, Michael Andersch, Mauricio Alvarez-Mesa, Ben H. H. Juurlink:
Spatiotemporal SIMT and Scalarization for Improving GPU Efficiency. ACM Trans. Archit. Code Optim. 12(3): 32:1-32:26 (2015) - [j9]Biao Wang, Mauricio Alvarez-Mesa, Chi Ching Chi, Ben H. H. Juurlink:
Parallel H.264/AVC Motion Compensation for GPUs Using OpenCL. IEEE Trans. Circuits Syst. Video Technol. 25(3): 525-531 (2015) - [j8]Chi Ching Chi, Mauricio Alvarez-Mesa, Benjamin Bross, Ben H. H. Juurlink, Thomas Schierl:
SIMD Acceleration for HEVC Decoding. IEEE Trans. Circuits Syst. Video Technol. 25(5): 841-855 (2015) - [c18]Jerónimo Castrillón, Lothar Thiele, Lars Schor, Weihua Sheng, Ben H. H. Juurlink, Mauricio Alvarez-Mesa, Angela Pohl, Ralph Jessenberger, Victor Reyes, Rainer Leupers:
Multi/many-core programming: where are we standing? DATE 2015: 1708-1717 - [c17]Matthias Göbel, Chi Ching Chi, Mauricio Alvarez-Mesa, Ben H. H. Juurlink:
High Performance Memory Accesses on FPGA-SoCs: A Quantitative Analysis. FCCM 2015: 32 - [c16]Philipp Habermann, Chi Ching Chi, Mauricio Alvarez-Mesa, Ben H. H. Juurlink:
Optimizing HEVC CABAC Decoding with a Context Model Cache and Application-Specific Prefetching. ISM 2015: 429-434 - [c15]Michael Andersch, Jan Lucas, Mauricio Alvarez-Mesa, Ben H. H. Juurlink:
On latency in GPU throughput microarchitectures. ISPASS 2015: 169-170 - [c14]Gabriel Cebrián-Márquez
Reducing HEVC encoding complexity using two-stage motion estimation. VCIP 2015: 1-4 - 2014
- [j7]Chi Ching Chi, Mauricio Alvarez-Mesa, Ben H. H. Juurlink:
Low-Power High-Efficiency Video Decoding using General-Purpose Processors. ACM Trans. Archit. Code Optim. 11(4): 56:1-56:25 (2014) - [c13]Sohan Lal, Jan Lucas, Michael Andersch, Mauricio Alvarez-Mesa, Ahmed Elhossini, Ben H. H. Juurlink:
GPGPU workload characteristics and performance analysis. ICSAMOS 2014: 115-124 - 2013
- [j6]Chi Ching Chi, Mauricio Alvarez-Mesa, Jan Lucas, Ben H. H. Juurlink, Thomas Schierl:
Parallel HEVC Decoding on Multi- and Many-core Architectures - A Power and Performance Analysis. J. Signal Process. Syst. 71(3): 247-260 (2013) - [c12]Benjamin Bross, Valeri George, Mauricio Alvarez-Mesa, Tobias Mayer, Chi Ching Chi, Jens Brandenburg, Thomas Schierl, Detlev Marpe, Ben H. H. Juurlink:
HEVC performance and complexity for 4K video. ICCE-Berlin 2013: 44-47 - [c11]Sergio Sanz Rodríguez, Tobias Mayer, Mauricio Alvarez-Mesa, Thomas Schierl:
A low-complexity parallel-friendly rate control algorithm for ultra-low delay high definition video coding. ICME Workshops 2013: 1-4 - [c10]Jan Lucas, Sohan Lal, Michael Andersch, Mauricio Alvarez-Mesa, Ben H. H. Juurlink:
How a single chip causes massive power bills GPUSimPow: A GPGPU power simulator. ISPASS 2013: 97-106 - 2012
- [b2]Ben H. H. Juurlink, Mauricio Alvarez-Mesa, Chi Ching Chi, Arnaldo Azevedo, Cor Meenderinck, Alex Ramírez:
Scalable Parallel Programming Applied to H.264/AVC Decoding. Springer Briefs in Computer Science, Springer 2012, ISBN 978-1-4614-2229-7, pp. i-xiii, 1-101 - [j5]Chi Ching Chi, Mauricio Alvarez-Mesa, Ben H. H. Juurlink, Gordon Clare, Félix Henry, Stéphane Pateux, Thomas Schierl:
Parallel Scalability and Efficiency of HEVC Parallelization Approaches. IEEE Trans. Circuits Syst. Video Technol. 22(12): 1827-1838 (2012) - [c9]Biao Wang, Mauricio Alvarez-Mesa, Chi Ching Chi, Ben H. H. Juurlink:
An Optimized Parallel IDCT on Graphics Processing Units. Euro-Par Workshops 2012: 155-164 - [c8]Mauricio Alvarez-Mesa, Chi Ching Chi, Ben H. H. Juurlink, Valeri George, Thomas Schierl:
Parallel video decoding in the emerging HEVC standard. ICASSP 2012: 1545-1548 - [c7]Chi Ching Chi, Mauricio Alvarez-Mesa, Ben H. H. Juurlink, Valeri George, Thomas Schierl:
Improving the parallelization efficiency of HEVC decoding. ICIP 2012: 213-216 - 2011
- [b1]Mauricio Alvarez-Mesa:
Parallel video decoding. Polytechnic University of Catalonia, Spain, 2011 - [j4]Arnaldo Azevedo, Ben H. H. Juurlink, Cor Meenderinck, Andrei Sergeevich Terechko
A Highly Scalable Parallel Implementation of H.264. Trans. High Perform. Embed. Archit. Compil. 4: 111-134 (2011) - 2010
- [j3]Alex Ramírez, Felipe Cabarcas
The SARC Architecture. IEEE Micro 30(5): 16-29 (2010)
2000 – 2009
- 2009
- [j2]Mauricio Alvarez, Alex Ramírez, Mateo Valero, Arnaldo Azevedo, Cor Meenderinck:
Evaluación del rendimiento paralelo en el nivel macro bloque del decodificador H.264 en una arquitectura multiprocesador cc-NUMA. Rev. Avances en Sistemas Informática 6(1): 219-228 (2009) - [j1]Cor Meenderinck, Arnaldo Azevedo, Ben H. H. Juurlink, Mauricio Alvarez, Alex Ramírez:
Parallel Scalability of Video Decoders. J. Signal Process. Syst. 57(2): 173-194 (2009) - [c6]Arnaldo Azevedo, Cor Meenderinck, Ben H. H. Juurlink, Andrei Sergeevich Terechko
Parallel H.264 Decoding on an Embedded Multicore Processor. HiPEAC 2009: 404-418 - [c5]Mauricio Alvarez-Mesa, Alex Ramírez, Arnaldo Azevedo, Cor Meenderinck, Ben H. H. Juurlink, Mateo Valero
Scalability of Macroblock-level Parallelism for H.264 Decoding. ICPADS 2009: 236-243 - 2008
- [c4]Arnaldo Azevedo, Cor Meenderinck, Ben H. H. Juurlink, Mauricio Alvarez, Alex Ramírez:
Analysis of video filtering on the cell processor. ISCAS 2008: 488-491 - 2007
- [c3]Mauricio Alvarez, Esther Salamí
HD-VideoBench. A Benchmark for Evaluating High Definition Digital Video Applications. IISWC 2007: 120-125 - [c2]Mauricio Alvarez, Esther Salamí
Performance Impact of Unaligned Memory Operations in SIMD Extensions for Video Codec Applications. ISPASS 2007: 62-71 - 2005
- [c1]Friman Sánchez, Mauricio Alvarez, Esther Salamí
On the Scalability of 1- and 2-Dimensional SIMD Extensions for Multimedia Applications. ISPASS 2005: 167-176
Coauthor Index
aka: Bernardus Juurlink
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