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Michael Nicolaidis
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2020 – today
- 2023
- [j39]Panagiota Papavramidou, Michael Nicolaidis:
Reducing Power Dissipation in Memory Repair for High Fault Rates. IEEE Trans. Very Large Scale Integr. Syst. 31(12): 2112-2125 (2023) - 2021
- [j38]Michael G. Dimopoulos, Michael Nicolaidis:
The Quest of the Ideal Error Detecting Architecture: The GRAAL Architecture. IEEE Trans. Sustain. Comput. 6(3): 493-506 (2021) - 2020
- [j37]Panagiota Papavramidou, Michael Nicolaidis:
Iterative Diagnosis Approach for ECC-Based Memory Repair. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(2): 464-477 (2020) - [j36]Amir Charif, Alexandre Coelho, Nacer-Eddine Zergainoh, Michael Nicolaidis:
A Dynamic Sufficient Condition of Deadlock-Freedom for High-Performance Fault-Tolerant Routing in Networks-on-Chips. IEEE Trans. Emerg. Top. Comput. 8(3): 642-654 (2020) - [c130]Panagiota Papavramidou, Michael Nicolaidis, Patrick Girard:
An ECC-Based Repair Approach with an Offset-Repair CAM for Mitigating the MBUs Affecting Repair CAM. IOLTS 2020: 1-6
2010 – 2019
- 2018
- [j35]Thierry Bonnoit, Nacer-Eddine Zergainoh, Michael Nicolaidis:
Reducing Rollback Cost in VLSI Circuits to Improve Fault Tolerance. IEEE Trans. Very Large Scale Integr. Syst. 26(8): 1438-1451 (2018) - [c129]Thierry Bonnoit, Fraidy Bouesse, Nacer-Eddine Zergainoh, Michael Nicolaidis:
Designing reliable processor cores in ultimate CMOS and beyond: A double sampling solution. DATE 2018: 905-908 - 2017
- [j34]Amir Charif, Alexandre Coelho, Nacer-Eddine Zergainoh, Michael Nicolaidis:
A Framework for Scalable TSV Assignment and Selection in Three-Dimensional Networks-on-Chips. VLSI Design 2017: 9427678:1-9427678:15 (2017) - [c128]Amir Charif, Alexandre Coelho, Nacer-Eddine Zergainoh, Michael Nicolaidis:
Detailed and highly parallelizable cycle-accurate network-on-chip simulation on GPGPU. ASP-DAC 2017: 672-677 - [c127]Amir Charif, Nacer-Eddine Zergainoh, Alexandre Coelho, Michael Nicolaidis:
Rout3D: A lightweight adaptive routing algorithm for tolerating faulty vertical links in 3D-NoCs. ETS 2017: 1-6 - [c126]Thierry Bonnoit, Nacer-Eddine Zergainoh, Michael Nicolaidis, Raoul Velazco:
Low cost rollback to improve fault-tolerance in VLSI circuits. LASCAS 2017: 1-4 - [c125]Amir Charif, Alexandre Coelho, Nacer-Eddine Zergainoh, Michael Nicolaidis:
MINI-ESPADA: A low-cost fully adaptive routing mechanism for Networks-on-Chips. LATS 2017: 1-4 - 2016
- [j33]Panagiota Papavramidou, Michael Nicolaidis:
Test Algorithms for ECC-Based Memory Repair in Ultimate CMOS and Post-CMOS. IEEE Trans. Computers 65(7): 2284-2298 (2016) - [c124]Amir Charif, Nacer-Eddine Zergainoh, Michael Nicolaidis:
A new approach to deadlock-free fully adaptive routing for high-performance fault-tolerant NoCs. DFT 2016: 121-126 - [c123]Amir Charif, Nacer-Eddine Zergainoh, Michael Nicolaidis:
Addressing transient routing errors in fault-tolerant Networks-on-Chips. ETS 2016: 1-6 - [c122]Michael Nicolaidis, Michael G. Dimopoulos:
Advanced double-sampling architectures. IOLTS 2016: 130-132 - 2015
- [c121]Amir Charif, Nacer-Eddine Zergainoh, Michael Nicolaidis:
MUGEN: A high-performance fault-tolerant routing algorithm for unreliable Networks-on-Chip. IOLTS 2015: 71-76 - [c120]Panagiota Papavramidou, Michael Nicolaidis:
Low-power memory repair for high defect densities. IOLTS 2015: 171-173 - [c119]Michael Nicolaidis, Panagiota Papavramidou:
Memory repair for high defect densities. VTS 2015: 1-4 - 2014
- [j32]Michael G. Dimopoulos, Yi Gang, Lorena Anghel, Mounir Benabdenbi, Nacer-Eddine Zergainoh, Michael Nicolaidis:
Fault-tolerant adaptive routing under an unconstrained set of node and link failures for many-core systems-on-chip. Microprocess. Microsystems 38(6): 620-635 (2014) - [c118]Fabien Chaix, Nacer-Eddine Zergainoh, Michael Nicolaidis:
A generic and high-level model of large unreliable NoCs for fault tolerance and performance analysis. ETS 2014: 1-2 - [c117]Dimiter Avresky, Fabien Chaix, Michael Nicolaidis:
Congestion-Aware Adaptive Routing in 2D-Mesh Multicores. NCA 2014: 50-58 - 2013
- [j31]Enrico Costenaro, Dan Alexandrescu, Kader Belhaddad, Michael Nicolaidis:
A Practical Approach to Single Event Transient Analysis for Highly Complex Design. J. Electron. Test. 29(3): 301-315 (2013) - [j30]Thierry Bonnoit, Michael Nicolaidis, Nacer-Eddine Zergainoh:
Using Error Correcting Codes Without Speed Penalty in Embedded Memories: Algorithm, Implementation and Case Study. J. Electron. Test. 29(3): 383-400 (2013) - [c116]Said Hamdioui, Michael Nicolaidis, Dimitris Gizopoulos, Arnaud Grasset, Guido Groeseneken, Philippe Bonnot:
Reliability challenges of real-time systems in forthcoming technology nodes. DATE 2013: 129-134 - [c115]Gilles Bizot, Fabien Chaix, Nacer-Eddine Zergainoh, Michael Nicolaidis:
Variability-aware and fault-tolerant self-adaptive applications for many-core chips. ETS 2013: 1 - [c114]Panagiota Papavramidou, Michael Nicolaidis:
Reducing power dissipation in memory repair for high defect densities. ETS 2013: 1-7 - [c113]Michael G. Dimopoulos, Yi Gang, Mounir Benabdenbi, Lorena Anghel, Nacer-Eddine Zergainoh, Michael Nicolaidis:
Fault-tolerant adaptive routing under permanent and temporary failures for many-core systems-on-chip. IOLTS 2013: 7-12 - [c112]Gilles Bizot, Fabien Chaix, Nacer-Eddine Zergainoh, Michael Nicolaidis:
Variability-aware and fault-tolerant self-adaptive applications for many-core chips. IOLTS 2013: 37-42 - [c111]Michael Nicolaidis, Panagiota Papavramidou:
Transparent BIST for ECC-based memory repair. IOLTS 2013: 216-223 - [c110]Adrian Evans, Michael Nicolaidis, Shi-Jie Wen, Thiago Asis:
Clustering techniques and statistical fault injection for selective mitigation of SEUs in flip-flops. ISQED 2013: 727-732 - [c109]Adrian Evans, Michael Nicolaidis, Rob Aitken, Burcin Aktan, Olivier Lauzeral:
Hot topic session 4A: Reliability analysis of complex digital systems. VTS 2013: 1 - [c108]Panagiota Papavramidou, Michael Nicolaidis:
An iterative diagnosis approach for ECC-based memory repair. VTS 2013: 1-6 - 2012
- [j29]Michael Nicolaidis:
Biologically Inspired Robust Tera-Device Processors. IEEE Des. Test 29(5): 94-99 (2012) - [j28]Vladimir Pasca, Lorena Anghel, Michael Nicolaidis, Mounir Benabdenbi:
CSL: Configurable Fault Tolerant Serial Links for Inter-die Communication in 3D Systems. J. Electron. Test. 28(1): 137-150 (2012) - [c107]Michael Nicolaidis, Lorena Anghel, Nacer-Eddine Zergainoh, Yervant Zorian, Tanay Karnik, Keith A. Bowman, James W. Tschanz, Shih-Lien Lu, Carlos Tokunaga, Arijit Raychowdhury, Muhammad M. Khellah, Jaydeep Kulkarni, Vivek De, Dimiter Avresky:
Design for test and reliability in ultimate CMOS. DATE 2012: 677-682 - [c106]Michael Nicolaidis, Vladimir Pasca, Lorena Anghel:
Through-silicon-via built-in self-repair for aggressive 3D integration. IOLTS 2012: 91-96 - [c105]Adrian Evans, Michael Nicolaidis, Shi-Jie Wen, Dan Alexandrescu, Enrico Costenaro:
RIIF - Reliability information interchange format. IOLTS 2012: 103-108 - [c104]Panagiota Papavramidou, Michael Nicolaidis:
Test algorithms for ECC-based memory repair in nanotechnologies. VTS 2012: 228-233 - 2011
- [c103]Fabien Chaix, Dimiter Avresky, Nacer-Eddine Zergainoh, Michael Nicolaidis:
A fault-tolerant deadlock-free adaptive routing for on chip interconnects. DATE 2011: 909-912 - [c102]Michael Nicolaidis, Thierry Bonnoit, Nacer-Eddine Zergainoh:
Eliminating speed penalty in ECC protected memories. DATE 2011: 1614-1619 - [c101]Dan Alexandrescu, Enrico Costenaro, Michael Nicolaidis:
A Practical Approach to Single Event Transients Analysis for Highly Complex Designs. DFT 2011: 155-163 - [c100]Hai Yu, Michael Nicolaidis, Lorena Anghel, Nacer-Eddine Zergainoh:
Efficient Fault Detection Architecture Design of Latch-Based Low Power DSP/MCU Processor. ETS 2011: 93-98 - [c99]Michael Nicolaidis, Vladimir Pasca, Lorena Anghel:
I-BIRAS: Interconnect Built-In Self-Repair and Adaptive Serialization in 3D Integrated Systems. ETS 2011: 208 - [c98]Thierry Bonnoit, Michael Nicolaidis, Nacer-Eddine Zergainoh:
Towards a tool for implementing delay-free ECC in embedded memories. ICCD 2011: 441-442 - [c97]Fabien Chaix, Gilles Bizot, Michael Nicolaidis, Nacer-Eddine Zergainoh:
Variability-aware task mapping strategies for many-cores processor chips. IOLTS 2011: 55-60 - [c96]Aymen Fradi, Michael Nicolaidis, Lorena Anghel:
Memory BIST with address programmability. IOLTS 2011: 79-85 - [c95]Gilles Bizot, Dimiter Avresky, Fabien Chaix, Nacer-Eddine Zergainoh, Michael Nicolaidis:
Self-Recovering Parallel Applications in Multi-core Systems. NCA 2011: 51-58 - 2010
- [c94]Jean Arlat, Cristian Constantinescu, Ravishankar K. Iyer, Johan Karlsson, Michael Nicolaidis:
Fourth workshop on dependable and secure nanocomputing. DSN 2010: 619-620 - [c93]Michael Nicolaidis, Vladimir Pasca, Lorena Anghel:
Interconnect Built-In Self-Repair and Adaptive-Serialization (I-BIRAS) for 3D integrated systems. IOLTS 2010: 218 - [c92]Fabien Chaix, Dimiter Avresky, Nacer-Eddine Zergainoh, Michael Nicolaidis:
Fault-Tolerant Deadlock-Free Adaptive Routing for Any Set of Link and Node Failures in Multi-cores Systems. NCA 2010: 52-59
2000 – 2009
- 2009
- [c91]Jean Arlat, Cristian Constantinescu, Ravishankar K. Iyer, Johan Karlsson, Michael Nicolaidis:
Third workshop on dependable and secure nanocomputing. DSN 2009: 596-597 - [c90]Eleftherios Kolonis, Michael Nicolaidis, Dimitris Gizopoulos, Mihalis Psarakis, Jacques Henri Collet, Piotr Zajac:
Enhanced self-configurability and yield in multicore grids. IOLTS 2009: 75-80 - [c89]Gilles Bizot, Nacer-Eddine Zergainoh, Michael Nicolaidis:
Variability and reliability-aware application tasks scheduling and power control (Voltage and Frequency Scaling) in the future nanoscale multiprocessors system on chip. IOLTS 2009: 155 - [c88]Hai Yu, Michael Nicolaidis, Lorena Anghel:
An effective approach to detect logic soft errors in digital circuits based on GRAAL. ISQED 2009: 236-240 - 2008
- [j27]Eleftherios Kolonis, Michael Nicolaidis:
Towards a holistic CAD platform for nanotechnologies. Microelectron. J. 39(8): 1032-1040 (2008) - [c87]Jean Arlat, Cristian Constantinescu, Ravishankar K. Iyer, Michael Nicolaidis:
Second workshop on dependable and secure nanocomputing. DSN 2008: 546-547 - [c86]Michael Nicolaidis:
Special Session 2: Benchmarking and Standardization in Software-Based SER Characterization: Towards an IEEE Task Force? IOLTS 2008: 105-106 - [c85]Michael Nicolaidis, Renaud Perez, Dan Alexandrescu:
Low-Cost Highly-Robust Hardened Cells Using Blocking Feedback Transistors. VTS 2008: 371-376 - 2007
- [c84]Jean Arlat, Ravishankar K. Iyer, Michael Nicolaidis:
Workshop on Dependable and Secure Nanocomputing. DSN 2007: 809-810 - [c83]Michael Nicolaidis:
GRAAL: A Fault-Tolerant Architecture for Enabling Nanometric Technologies. IOLTS 2007: 255 - [c82]Michael Nicolaidis:
GRAAL: a new fault tolerant design paradigm for mitigating the flaws of deep nanometric technologies. ITC 2007: 1-10 - [c81]Lorena Anghel, Michael Nicolaidis:
Defects Tolerant Logic Gates for Unreliable Future Nanotechnologies. IWANN 2007: 422-429 - 2006
- [c80]Slimane Boutobza, Michael Nicolaidis, Kheiredine M. Lamara, Andrea Costa:
A Transparent based Programmable Memory BIST. ETS 2006: 89-96 - [c79]Lorena Anghel, Michael Nicolaidis, Nadine Buard:
From Nuclear Reaction to System Failures: Can We Address All Levels of Soft Errors Accurately? IOLTS 2006: 85 - [c78]Michael Nicolaidis:
A Low-Cost Single-Event Latchup Mitigation Sscheme. IOLTS 2006: 111-118 - [c77]Lorena Anghel, Cristiano Lazzari, Michael Nicolaidis:
Multiple Defect Tolerant Devices for Unreliable Future Nanotechnologies. LATW 2006: 186-191 - [c76]Michael Nicolaidis:
Session Abstract. VTS 2006: 286-287 - 2005
- [j26]Michael Nicolaidis, Lorena Anghel, Nadir Achouri:
Memory Defect Tolerance Architectures for Nanotechnologies. J. Electron. Test. 21(4): 445-455 (2005) - [c75]Balkaran S. Gill, Michael Nicolaidis, Francis G. Wolff, Christos A. Papachristou, Steven L. Garverick:
An Efficient BICS Design for SEUs Detection and Correction in Semiconductor Memories. DATE 2005: 592-597 - [c74]Lorena Anghel, Michael Nicolaidis:
Simulation and Mitigation of Single Event Effects. IOLTS 2005: 81 - [c73]Michael Nicolaidis:
Design for Mitigation of Single Event Effects. IOLTS 2005: 95-96 - [c72]Balkaran S. Gill, Michael Nicolaidis, Christos A. Papachristou:
Radiation Induced Single-Word Multiple-Bit Upsets Correction in SRAM. IOLTS 2005: 266-271 - [c71]Slimane Boutobza, Michael Nicolaidis, Kheiredine M. Lamara, Andrea Costa:
Programmable memory BIST. ITC 2005: 10 - 2004
- [j25]Dan Alexandrescu, Lorena Anghel, Michael Nicolaidis:
Simulating Single Event Transients in VDSM ICs for Ground Level Radiation. J. Electron. Test. 20(4): 413-421 (2004) - [c70]Lorena Anghel, Nadir Achouri, Michael Nicolaidis:
Evaluation of Memory Built-in Self Repair Techniques for High Defect Density Technologie. PRDC 2004: 315-320 - [c69]Michael Nicolaidis, Nadir Achouri, Lorena Anghel:
A Diversified Memory Built-In Self-Repair Approach for Nanotechnologies. VTS 2004: 313-318 - 2003
- [j24]Michael Nicolaidis:
Carry checking/parity prediction adders and ALUs. IEEE Trans. Very Large Scale Integr. Syst. 11(1): 121-128 (2003) - [c68]Michael Nicolaidis, Nadir Achouri, Slimane Boutobza:
Optimal Reconfiguration Functions for Column or Data-bit Built-In Self-Repair. DATE 2003: 10590-10595 - [c67]Michael Nicolaidis, Nadir Achouri, Lorena Anghel:
A Memory Built-In Self-Repair for High Defect Densities Based on Error Polarities. DFT 2003: 459-466 - [c66]Michael Nicolaidis, Nadir Achouri, Slimane Boutobza:
Dynamic Data-bit Memory Built-In Self- Repair. ICCAD 2003: 588-594 - [c65]Michael Nicolaidis, Nadir Achouri, Lorena Anghel:
Memory Built-In Self-Repair for Nanotechnologies. IOLTS 2003: 94- - [c64]Michael Nicolaidis:
Reliability Threats in VDSM - Shortcomings in Conventional Test and Fault-Tolerance Alternatives. ITC 2003: 1282 - 2002
- [j23]Eric Dupont, Michael Nicolaidis, Peter Rohr:
Embedded Robustness IPs for Transient-Error-Free ICs. IEEE Des. Test Comput. 19(3): 56-70 (2002) - [j22]Dimitris Nikolos, John P. Hayes, Michael Nicolaidis, Cecilia Metra:
Guest Editorial. J. Electron. Test. 18(3): 259-260 (2002) - [c63]Michael Nicolaidis:
IP for Embedded Robustness. DATE 2002: 240-241 - [c62]Eric Dupont, Michael Nicolaidis, Peter Rohr:
Embedded Robustness Ips. DATE 2002: 244-245 - [c61]Dan Alexandrescu, Lorena Anghel, Michael Nicolaidis:
New Methods for Evaluating the Impact of Single Event Transients in VDSM ICs. DFT 2002: 99-107 - [c60]Eric Dupont, Michael Nicolaidis:
Robustness IPs for Reliability and Security of SoCs. ITC 2002: 357-364 - [c59]Dan Alexandrescu, Lorena Anghel, Michael Nicolaidis:
Simulating Single Event Transients in VDSM ICs for Ground Level Radiation. LATW 2002: 126-129 - [c58]Michael Nicolaidis:
Soft Error Protection for Embedded Memories. MTDT 2002 - 2001
- [c57]Eleftherios Kolonis, Michael Nicolaidis:
Fail-Safe Synchronization Circuit for Duplicated Systems. DFT 2001: 412-417 - [c56]Michael Nicolaidis, Slimane Boutobza, Nadir Achouri, R. D. Shawn Blanton, Julie Segal, David Y. Lepejian, Ben Chu, Tony Singh, Harvey Berman:
Designing and Implementing Efficient BISR Techniques for Embedded RAMs. LATW 2001: 248-252 - [c55]Jim Chung, N. Derhacobian, Jean Gasiot, Michael Nicolaidis, David Towne, Raoul Velazco:
Soft Errors and Tolerance for Soft Errors. VTS 2001: 279-280 - 2000
- [c54]Yervant Zorian, Michael Nicolaidis, Peter Muhmenthaler, David Y. Lepejian, Chris W. H. Strolenberg, Kees Veelenturf:
Tutorial Statement. DATE 2000: 66 - [c53]Lorena Anghel, Michael Nicolaidis:
Cost Reduction and Evaluation of a Temporary Faults Detecting Technique. DATE 2000: 591-598 - [c52]Michael Nicolaidis, N. Zaidan, Th. Calin, D. Bied-Charreton:
ISIS: A Fail-Safe Interface Realized in Smart Power Technology. IOLTW 2000: 191- - [c51]Jaime Velasco-Medina, Iyad Rayane, Michael Nicolaidis:
On-Line BIST for Testing Analog Circuits. LATW 2000: 193-195 - [c50]Lorena Anghel, Dan Alexandrescu, Michael Nicolaidis:
Evaluation of a Soft Error Tolerance Technique Based on Time and/or Space Redundancy. SBCCI 2000: 237-242 - [c49]Lorena Anghel, Michael Nicolaidis, Issam Alzaher-Noufal:
Self-Checking Circuits versus Realistic Faults in Very Deep Submicron. VTS 2000: 55-66
1990 – 1999
- 1999
- [j21]Michael Nicolaidis, Ricardo de Oliveira Duarte:
Fault-Secure Parity Prediction Booth Multipliers. IEEE Des. Test Comput. 16(3): 90-101 (1999) - [j20]Michael Nicolaidis, Rob Roy:
Guest Editorial. J. Electron. Test. 15(1-2): 9 (1999) - [c48]Issam Alzaher-Noufal, Michael Nicolaidis:
A CAD Framework for Generating Self-Checking 1 Multipliers Based on Residue Codes. DATE 1999: 122- - [c47]Michael Nicolaidis, Yervant Zorian:
Scaling Deeper to Submicron: On-Line Testing to the Rescue. DATE 1999: 432- - [c46]Iyad Rayane, Jaime Velasco-Medina, Michael Nicolaidis:
A One-Bit-Signature BIST for Embedded Operational Amplifiers in Mixed-Signal Circuits Based on the Slew-Rate Detection. DATE 1999: 792- - [c45]Haridimos T. Vergos, Dimitris Nikolos, Y. Tsiatouhas, Th. Haniotakis, Michael Nicolaidis:
On Path Delay Fault Testing of Multiplexer - Based Shifters. Great Lakes Symposium on VLSI 1999: 20-23 - [c44]Jaime Velasco-Medina, Iyad Rayane, Michael Nicolaidis:
On-Line BIST for Testing Analog Circuits. ICCD 1999: 330- - [c43]Fabien Clermidy, Thierry Collette, Michael Nicolaidis:
A New Placement Algorithm Dedicated to Parallel Computers: Bases and Application. PRDC 1999: 242- - [c42]Michael Nicolaidis:
Time Redundancy Based Soft-Error Tolerance to Rescue Nanometer Technologies. VTS 1999: 86-94 - [c41]Th. Calin, Lorena Anghel, Michael Nicolaidis:
Built-In Current Sensor for IDDQ Testing in Deep Submicron CMOS. VTS 1999: 135-142 - [c40]Iyad Rayane, Jaime Velasco-Medina, Michael Nicolaidis:
A Digital BIST for Operational Amplifiers Embedded in Mixed-Signal Circuits. VTS 1999: 304-310 - 1998
- [j19]Ramesh Karri, Michael Nicolaidis:
Guest Editors' Introduction: Online VLSI Testing. IEEE Des. Test Comput. 15(4): 12-16 (1998) - [j18]Michael Nicolaidis, Yervant Zorian:
On-Line Testing for VLSI - A Compendium of Approaches. J. Electron. Test. 12(1-2): 7-20 (1998) - [j17]Ricardo de Oliveira Duarte, Michael Nicolaidis, Hakim Bederr, Yervant Zorian:
Efficient Totally Self-Checking Shifter Design. J. Electron. Test. 12(1-2): 29-39 (1998) - [j16]Michael Nicolaidis:
On-line testing for VLSI: state of the art and trends. Integr. 26(1-2): 197-209 (1998) - [j15]Michael Nicolaidis:
Fail-Safe Interfaces for VLSI: Theoretical Foundations and Implementation. IEEE Trans. Computers 47(1): 62-77 (1998) - [c39]Jaime Velasco-Medina, Marcelo Lubaszewski, Michael Nicolaidis:
An Approach to the On-Line Testing of Operational Amplifiers. Asian Test Symposium 1998: 290-295 - [c38]Michael Nicolaidis, Ricardo de Oliveira Duarte:
Design of Fault-Secure Parity-Prediction Booth Multipliers. DATE 1998: 7-14 - [c37]Jaime Velasco-Medina, Th. Calin, Michael Nicolaidis:
Fault Detection for Linear Analog Circuits Using Current Injection. DATE 1998: 987-988 - [c36]Jaime Velasco-Medina, Michael Nicolaidis:
Current-based testing for analog and mixed-signal circuits. ICCD 1998: 576-581 - [c35]Michael Nicolaidis:
Scaling Deeper to Submicron: On-Line Testing to the Rescue. ITC 1998: 1139 - [c34]Michael Nicolaidis:
Design for soft-error robustness to rescue deep submicron scaling. ITC 1998: 1140 - 1997
- [j14]Michael Nicolaidis, Ricardo de Oliveira Duarte, Salvador Manich, Joan Figueras:
Fault-Secure Parity Prediction Arithmetic Operators. IEEE Des. Test Comput. 14(2): 60-71 (1997) - [c33]Ricardo de Oliveira Duarte, Michael Nicolaidis, Hakim Bederr, Yervant Zorian:
Fault-secure shifter design: results and implementations. ED&TC 1997: 335-341 - [c32]Michael Nicolaidis:
On-Line Testing for VLSI. ITC 1997: 1042 - 1996
- [j13]Michael Nicolaidis:
Theory of Transparent BIST for RAMs. IEEE Trans. Computers 45(10): 1141-1156 (1996) - [c31]Michael Nicolaidis, Rubin A. Parekhji, M. Boudjit:
E-Groups: A New Technique for Fast Backward Propagation in System Level Test Generation. Asian Test Symposium 1996: 34-41 - [c30]Michael Nicolaidis, Salvador Manich, Joan Figueras:
Achieving Fault Secureness in Parity Prediction Arithmetic Operators: General Conditions and Implementations. ED&TC 1996: 186-194 - [c29]Salvador Manich, Michael Nicolaidis, Joan Figueras:
Enhancing realistic fault secureness in parity prediction array arithmetic operators by IDDQ monitoring. VTS 1996: 124-129 - [c28]R. L. Campbell, P. Kuekes, David Y. Lepejian, Wojciech P. Maly, Michael Nicolaidis, Alex Orailoglu:
Can Defect-Tolerant Chips Better Meet the Quality Challenge? VTS 1996: 362-363 - 1995
- [j12]Michael Nicolaidis:
Efficient UBIST implementation for microprocessor sequencing parts. J. Electron. Test. 6(3): 295-312 (1995) - [j11]Jien-Chung Lo, James C. Daly, Michael Nicolaidis:
A strongly code disjoint built-in current sensor for strongly fault-secure static CMOS realizations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(11): 1402-1407 (1995) - [j10]Michael Nicolaidis, Vladimir Castro Alves, Hakim Bederr:
Testing complex couplings in multiport memories. IEEE Trans. Very Large Scale Integr. Syst. 3(1): 59-71 (1995) - [c27]Hakim Bederr, Michael Nicolaidis, Alain Guyot:
Analytic approach for error masking elimination in on-line multipliers. IEEE Symposium on Computer Arithmetic 1995: 30-37 - [c26]O. Kebichi, Yervant Zorian, Michael Nicolaidis:
Area versus detection latency trade-offs in self-checking memory design. ED&TC 1995: 358-362 - [c25]O. Kebichi, Michael Nicolaidis, Vyacheslav N. Yarmolik:
Exact Aliasing Computation for RAM BIST. ITC 1995: 13-22 - [c24]Th. Calin, F. L. Vargas, Michael Nicolaidis:
Upset-Tolerant CMOS SRAM Using Current Monitoring: Prototype and Test Experiments. ITC 1995: 45-53 - [c23]Fabian Vargas, Michael Nicolaidis, Yervant Zorian:
An Approach for Designing Total-Dose Tolerant MCMs Based on Current Monitoring. ITC 1995: 345-354 - [c22]B. Hamdi, Hakim Bederr, Michael Nicolaidis:
A tool for automatic generation of self-checking data paths. VTS 1995: 460-466 - 1994
- [j9]Michael Nicolaidis, O. Kebichi, Vladimir Castro Alves:
Trade-offs in scan path and BIST implementations for RAMs. J. Electron. Test. 5(2-3): 273-283 (1994) - [j8]O. Kebichi, Vyacheslav N. Yarmolik, Michael Nicolaidis:
Zero aliasing ROM BIST. J. Electron. Test. 5(4): 377-388 (1994) - [j7]Michael Nicolaidis:
Fault secure property versus strongly code disjoint checkers. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13(5): 651-658 (1994) - [c21]Michael Nicolaidis, Hakim Bederr:
Efficient Implementations of Self-Checking Multiply and Divide Arrays. EDAC-ETC-EUROASIC 1994: 574-579 - [c20]Ricardo de Oliveira Duarte, Michael Nicolaidis:
A Test Methodology Applied to Cellular Logic Programmable Gate Arrays. FPL 1994: 11-22 - [c19]F. L. Vargas, Michael Nicolaidis:
SEU-Tolerant SRAM Design Based on Current Monitoring. FTCS 1994: 106-115 - [c18]Vyacheslav N. Yarmolik, Michael Nicolaidis, O. Kebichi:
Aliasing-free Signature Analysis for RAM BIST. ITC 1994: 368-377 - [c17]Michael Nicolaidis:
Efficient UBIST for RAMs. VTS 1994: 158-166 - [c16]Hakim Bederr, Michael Nicolaidis, Alain Guyot:
Design for testability of on-line multipliers. VTS 1994: 408-414 - 1993
- [c15]Michael Nicolaidis:
Efficient Implementations of Self-Checking Adders and ALUs. FTCS 1993: 586-595 - [c14]F. L. Vargas, Michael Nicolaidis, Bernard Courtois:
Quiescent Current Monitoring to Improve the Reliability of Electronic Systems in Space Radiation Environments. ICCD 1993: 596-600 - [c13]Fabian Luis Vargas, Michael Nicolaidis, B. Hamdi:
Quiescent current estimation based on quality requirements. VTS 1993: 33-39 - [c12]Michael Nicolaidis:
Finitely self-checking circuits and their application on current sensors. VTS 1993: 66-69 - 1992
- [j6]Jien-Chung Lo, Suchai Thanawastien, T. R. N. Rao, Michael Nicolaidis:
An SFS Berger check prediction ALU and its application to self-checking processor designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11(4): 525-540 (1992) - [c11]Jien-Chung Lo, James C. Daly, Michael Nicolaidis:
Design of Static CMOS Self-Checking Circuits using Built-In Current Sensing. FTCS 1992: 104-111 - [c10]O. Kebichi, Michael Nicolaidis:
A Tool for Automatic Generation of BISTed and Transparent BISTed Rams. ICCD 1992: 570-575 - [c9]Michael Nicolaidis:
Transparent BIST for RAMs. ITC 1992: 598-607 - [c8]Michael Nicolaidis:
Improving the theory of truth table verification of iterative logic arrays. VTS 1992: 339-344 - 1991
- [j5]Michael Nicolaidis:
Shorts in self-checking circuits. J. Electron. Test. 1(4): 257-273 (1991) - [j4]Michael Nicolaidis, Kholdoun Torki, Ahmed Amine Jerraya, Bernard Courtois:
Silicon compilation of hierarchical control sections with unified BIST testability. Microprocess. Microsystems 15(5): 257-269 (1991) - [c7]Kholdoun Torki, Michael Nicolaidis, Antônio Otávio Fernandes:
A self-checking PLA automatic generator tool based on unordered codes encoding. EURO-DAC 1991: 510-515 - [c6]Vladimir Castro Alves, Michael Nicolaidis, P. Lestrat, Bernard Courtois:
Built-In Self-Test for Multi-Port RAMs. ICCAD 1991: 248-251 - [c5]Michael Nicolaidis, M. Boudjit:
New Implementations, Tools, and Experiments for Decreasing Self-Checking PLAs Area Overhead. ICCD 1991: 275-281 - 1990
- [c4]Michael Nicolaidis:
Efficient UBIST implementation for microprocessor sequencing parts. ITC 1990: 316-326
1980 – 1989
- 1989
- [j3]Michael Nicolaidis, Bernard Courtois:
Self-checking logic arrays. Microprocess. Microsystems 13(4): 281-290 (1989) - [j2]Michael Nicolaidis:
Self-exercising checkers for unified built-in self-test (UBIST). IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(3): 203-218 (1989) - [c3]Michael Nicolaidis, Serge Noraz, Bernard Courtois:
A generalized theory of fail-safe systems. FTCS 1989: 398-406 - 1988
- [j1]Michael Nicolaidis, Bernard Courtois:
Strongly Code Disjoint Checkers. IEEE Trans. Computers 37(6): 751-756 (1988) - [c2]Michael Nicolaidis:
A unified built-in-test scheme: UBIST. FTCS 1988: 157-163 - [c1]Kholdoun Torki, Michael Nicolaidis, Ahmed Amine Jerraya, Bernard Courtois:
UBIST version of the SYCO's control section compiler. ICCD 1988: 392-396
Coauthor Index
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