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Shu-Yen Lin
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2020 – today
- 2024
- [j18]Shu-Yen Lin
, Chun-Kuan Tsai, Wen-Chun Kao:
Dynamic Precision-Scalable Thermal Mapping Algorithm for Three Dimensional Systolic-Array Based Neural Network Accelerator. IEEE Trans. Consumer Electron. 70(1): 757-769 (2024) - [c29]Po-Ying Feng, Shih-Nung Lee, Yong-Chi Chang, Hsuan-Yu Chiang, Shu-Yen Lin:
Systolic Array-Based Accelerator Architecture Combining Iterative Variable-Width Approximate Multipliers. GCCE 2024: 98-99 - [c28]Chieh-Wei Wu, Li-Chieh Wang, Wei-Xun Chen, Yu-Xiang Hong, Shu-Yen Lin:
A Low-area Hardware and Architecture Design of Truncation- and Rounding-Based Approximate Multiplier for Artificial Intelligence Applications. ICCE-Taiwan 2024: 561-562 - 2023
- [j17]Shu-Yen Lin
Low-area architecture design of multi-mode activation functions with controllable maximum absolute error for neural network applications. Microprocess. Microsystems 103: 104952 (2023) - [j16]Jin-Yi Lin
Temperature-Prediction Based Rate-Adjusted Time and Space Mapping Algorithm for 3D CNN Accelerator Systems. IEEE Trans. Computers 72(10): 2767-2780 (2023) - [c27]Kuan-Yi Li, Shu-Yen Lin:
Object-Location Prediction based on CIE Color Difference for Deep Reinforcement Learning. GCCE 2023: 392-393 - [c26]Hari Chandhana Varma M, Advaidh Swaminathan, Shu-Yen Lin:
Multi-Mode AI Accelerator Architecture for Thermal-Aware 3D Stacked Deep Neural Network Design. ICCE-Taiwan 2023: 637-638 - 2022
- [j15]Shu-Yen Lin, Shao-Cheng Wang:
Thermal-constrained memory management for three-dimensional DRAM-PCM memory with deep neural network applications. Microprocess. Microsystems 89: 104444 (2022) - [c25]Chia-Yueh Chang
The Corpus of Emotional Valences for 33, 669 Chinese Words Based on Big Data. HCI (26) 2022: 141-152 - [c24]Ching-Hui Chen
Building a "Corpus of 7 Types Emotion Co-occurrences Words" of Chinese Emotional Words with Big Data Corpus. HCI (26) 2022: 163-181 - [c23]Shu-Yen Lin, Guang-Fong Liu:
Dynamic Thermal-Predicted Workload Movement with Three-Dimensional DRAM-RRAM Hybrid Memories for Convolutional Neural Network Applications. ICCE-TW 2022: 7-8 - 2020
- [j14]Yu-Hsuan Lee, Cheng-Hung Lin, Chao-Chyun Chen, Shu-Yen Lin, Bo-Siang Huang:
Correction to: the Video Spatial Error Concealment Algorithm Using Separately-Directional Interpolation Technique. J. Signal Process. Syst. 92(4): 461 (2020) - [c22]Shu-Yen Lin, Kuan-Han Lin, Chun-Kuan Tsai, Po-Hsiang Tseng:
Reconfigurable MAC Systolic Array Architecture Design for Three-Dimensional Convolution Neural Network. ICCE-TW 2020: 1-2
2010 – 2019
- 2019
- [c21]Shu-Yen Lin, Jin-Yi Lin:
Dynamic Thermal-Aware Inter-Layer Perpendicular Downward Mapping for Three-Dimensional Convolutional Neural Network Accelerator. GCCE 2019: 527-528 - [c20]Shu-Yen Lin, Meng-Ru Tsai:
Non-contact Heart Rate Monitoring with Mobile Phone Camera. ICCE-TW 2019: 1-2 - 2017
- [j13]Shu-Yen Lin
Thermal- and Performance-Aware Address Mapping for the Multi-Channel Three-Dimensional DRAM Systems. IEEE Access 5: 5566-5577 (2017) - [j12]Cheng-Hung Lin
Design and Implementation of Operation-Reduced LDPC Decoder Based on a Check Node Stopping Scheme. J. Circuits Syst. Comput. 26(2): 1750028:1-1750028:19 (2017) - [j11]Yu-Hsuan Lee, Cheng-Hung Lin, Chao-Chyun Chen, Shu-Yen Lin, Bo-Siang Huang:
The Video Spatial Error Concealment Algorithm Using Separately-Directional Interpolation Technique. J. Signal Process. Syst. 88(1): 13-27 (2017) - [c19]Shu-Yen Lin, Hao-Te Lin:
Disease checking method of ECG signals with variable output resolutions for wearable devices. GCCE 2017: 1-2 - 2016
- [c18]Shu-Yen Lin, Jin-Yi Lin, Cheng-Hung Lin:
A reconfigurable near-data systolic array accelerator for the three-dimensional DRAM systems. GCCE 2016: 1-2 - [c17]Chen-Pei Song, Cheng-Hung Lin, Shu-Yen Lin:
Partially-stopped probabilistic min-sum algorithm for LDPC decoding. GCCE 2016: 1-2 - 2015
- [j10]En-Jui Chang
Regional ACO-Based Cascaded Adaptive Routing for Traffic Balancing in Mesh-Based Network-on-Chip Systems. IEEE Trans. Computers 64(3): 868-875 (2015) - [c16]Shu-Yen Lin, Jin-Yi Lin, Kai-Wei Chang, Cheng-Hung Huang:
Real-time data compression for thermal-controlled three-dimensional DRAM systems. GCCE 2015: 48-49 - [c15]Shu-Yen Lin, Cheng-Hung Lin, Ho-Yun Su:
Block-based SRAM architecture and thermal-aware memory mappings for three-dimensional channel decoding systems. GCCE 2015: 277-278 - [c14]Cheng-Hung Lin, Chih-Hsuan Chiang, Shu-Wei Quo, Shu-Yen Lin:
An enhanced single-binary turbo decoding scheme for turbo MIMO systems. GCCE 2015: 537-538 - 2014
- [j9]En-Jui Chang
Path-Congestion-Aware Adaptive Routing With a Contention Prediction Scheme for Network-on-Chip Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(1): 113-126 (2014) - [j8]Hsiu-Chuan Shih, Pei-Wen Luo, Jen-Chieh Yeh, Shu-Yen Lin, Ding-Ming Kwai, Shih-Lien Lu, Andre Schaefer, Cheng-Wen Wu
DArT: A Component-Based DRAM Area, Power, and Timing Modeling Tool. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(9): 1356-1369 (2014) - [c13]Yuen-Hsien Tseng, Lung-Hao Lee, Shu-Yen Lin, Bo-Shun Liao, Mei-Jun Liu, Hsin-Hsi Chen, Oren Etzioni, Anthony Fader:
Chinese Open Relation Extraction for Knowledge Acquisition. EACL 2014: 12-16 - [c12]Shu-Yen Lin, Cheng-Hung Lin, Ho-Yun Su:
Thermal-aware kernel mapping for three-dimensional multi-mode channel decoding. GCCE 2014: 630-631 - [c11]Yuan-Syun Wu, Cheng-Hung Lin, Shu-Yen Lin:
Ultra-low complexity early termination scheme for layered LDPC decoding. GCCE 2014: 711-712 - [c10]Shu-Yen Lin, Jin-Yi Lin:
Thermal-aware architecture and mapping for multi-channel three-dimensional DRAM systems. GCCE 2014: 713-714 - 2013
- [j7]Chih-Hao Chao, Kun-Chih Chen
Transport-layer-assisted routing for runtime thermal management of 3D NoC systems. ACM Trans. Embed. Comput. Syst. 13(1): 11:1-11:22 (2013) - [j6]Kun-Chih Chen
Topology-Aware Adaptive Routing for Nonstationary Irregular Mesh in Throttled 3D NoC Systems. IEEE Trans. Parallel Distributed Syst. 24(10): 2109-2120 (2013) - [c9]Kun-Chih Chen
Design of thermal management unit with vertical throttling scheme for proactive thermal-aware 3D NoC systems. VLSI-DAT 2013: 1-4 - 2012
- [j5]Chia-Hui Chang, Shu-Yen Lin, Meng-Feng Tsai, Shu-Ping Li, Hsiang-Mei Liao, Norden E. Huang:
Phonetic Component Ranking and Pronunciation Rules Discovery for Picto-Phonetic Chinese Characters. Int. J. Comput. Linguistics Chin. Lang. Process. 17(3) (2012) - [c8]Kun-Chih Chen
Traffic-Balanced Topology-Aware Multiple Routing Adjustment for Throttled 3D NOC Systems. SiPS 2012: 120-124 - [c7]Kun-Chih Chen
Transport-layer assisted vertical traffic balanced routing for thermal-aware three-dimensional Network-on-Chip systems. VLSI-DAT 2012: 1-4 - 2011
- [j4]Kun-Chih Chen
A scalable built-in self-recovery (BISR) VLSI architecture and design methodology for 2D-mesh based on-chip networks. Des. Autom. Embed. Syst. 15(2): 111-132 (2011) - [c6]Chia-Hui Chang, Shu-Yen Lin:
聲符部件排序與形聲字發音規則探勘 (Pronunciation Rules Discovery for Picto-Phonetic Chinese Characters) [In Chinese]. ROCLING 2011: 166-178 - [c5]Hsien-Kai Hsin, En-Jui Chang
Multi-Pheromone ACO-based routing in Network-on-Chip system inspired by economic phenomenon. SoCC 2011: 273-277 - [c4]Chih-Hao Chao, Tsu-Chu Yin, Shu-Yen Lin, An-Yeu Wu
Transport Layer Assisted Routing for Non-Stationary Irregular mesh of thermal-aware 3D Network-on-Chip systems. SoCC 2011: 284-289 - 2010
- [j3]Chia-Hui Chang, Shu-Yen Lin, Shu-Ying Li, Meng-Feng Tsai, Shu-Ping Li, Hsiang-Mei Liao, Chih-Wen Sun, Norden E. Huang:
Annotating Phonetic Component of Chinese Characters Using Constrained Optimization and Pronunciation Distribution. Int. J. Comput. Linguistics Chin. Lang. Process. 15(2) (2010)
2000 – 2009
- 2009
- [j2]Shu-Yen Lin, Cheng-Chao Su, Yu-Da Lai, Li-Chin Yang, Shu-Kai Hsieh:
Assessing Text Readability Using Hierarchical Lexical Relations Retrieved from WordNet. Int. J. Comput. Linguistics Chin. Lang. Process. 14(1) (2009) - [c3]Shu-Yen Lin, Chan-Cheng Hsu, An-Yeu Wu
A Scalable Built-in Self-test/Self-diagnosis Architecture for 2D-Mesh based Chip Multiprocessor Systems. ISCAS 2009: 2317-2320 - 2008
- [j1]Shu-Yen Lin, Chun-Hsiang Huang, Chih-Hao Chao, Keng-Hsien Huang, An-Yeu Wu
Traffic-Balanced Routing Algorithm for Irregular Mesh-Based On-Chip Networks. IEEE Trans. Computers 57(9): 1156-1168 (2008) - [c2]Shu-Yen Lin, Cheng-Chao Su, Yu-Da Lai, Li-Chin Yang, Shu-Kai Hsieh:
Measuring Text Readability by Lexical Relations Retrieved from Wordnet. ROCLING 2008 - [c1]Ting-Jung Lin
Traffic-balanced IP mapping algorithm for 2D-mesh On-Chip-Networks. SiPS 2008: 200-203
Coauthor Index
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