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IEEE Transactions on Circuits and Systems - Part I: Regular Papers, Volume 59-I
Volume 59-I, Number 1, January 2012
- Gabriele Manganaro
:
Incoming Editorial. 1-2 - Massimo Alioto:
Ultra-Low Power VLSI Circuit Design Demystified and Explained: A Tutorial. 3-29 - Edward A. Keehr, Ali Hajimiri
A Wide-Swing Low-Noise Transconductance Amplifier and the Enabling of Large-Signal Handling Direct-Conversion Receivers. 30-43 - David G. Nairn:
Cascode Loads and Amplifier Settling Behavior. 44-51 - Ahmad Mirzaei, Hooman Darabi, David Murphy:
Architectural Evolution of Integrated M-Phase High-Q Bandpass Filters. 52-65 - Sadok Aouini, Kun Chuai, Gordon W. Roberts:
Anti-Imaging Time-Mode Filter Design Using a PLL Structure With Transfer Function DFT. 66-79 - Pierluigi Nuzzo, Claudio Nani, Costantino Armiento, Alberto L. Sangiovanni-Vincentelli
A 6-Bit 50-MS/s Threshold Configuring SAR ADC in 90-nm Digital CMOS. 80-92 - Yingwu Miao, Yuxing Zhang:
Distortion Modeling of Feedback Two-Stage Amplifier Compensated With Miller Capacitor and Nulling Resistor. 93-105 - Adilson J. Cardoso, Lucas G. de Carli, Carlos Galup-Montoro
Analysis of the Rectifier Circuit Valid Down to Its Low-Voltage Limit. 106-112 - Song Sun, Madhu Monga, Phillip H. Jones, Joseph Zambreno:
An I/O Bandwidth-Sensitive Sparse Matrix-Vector Multiplication Engine on FPGAs. 113-123 - Jaewon Lee, Woojae Lee, SeongHwan Cho:
A 2.5-Gb/s On-Chip Interconnect Transceiver With Crosstalk and ISI Equalizer in 130 nm CMOS. 124-136 - Ikbal Ali, Abhijit Banerjee, Arindum Mukherjee
Study of Injection Locking With Amplitude Perturbation and Its Effect on Pulling of Oscillator. 137-147 - Hyongsuk Kim
Neural Synaptic Weighting With a Pulse-Based Memristor Circuit. 148-158 - Elio Consoli, Gianluca Giustolisi
An Accurate Ultra-Compact I-V Model for Nanometer MOS Transistors With Applications on Digital Circuits. 159-169 - Zhi-Hong Guan, Yonghong Wu, Gang Feng
Consensus Analysis Based on Impulsive Systems in Multiagent Networks. 170-178 - Moosa Ayati
Designing a Novel Adaptive Impulsive Observer for Nonlinear Continuous Systems Using LMIs. 179-187 - Xiaoheng Chen, Shu Lin, Venkatesh Akella:
Efficient Configurable Decoder Architecture for Nonbinary Quasi-Cyclic LDPC Codes. 188-197 - Yushan Li, Kevin R. Vannorsdel, Art J. Zirger, Mark Norris, Dragan Maksimovic:
Current Mode Control for Boost Converters With Constant Power Loads. 198-206 - Damian Giaouris, Soumitro Banerjee
Complex Interaction Between Tori and Onset of Three-Frequency Quasi-Periodicity in a Current Mode Controlled Boost Converter. 207-214 - Enric Rodriguez, Abdelali El Aroudi, Francisco Guinjoan, Eduard Alarcón:
A Ripple-Based Design-Oriented Approach for Predicting Fast-Scale Instability in DC-DC Switching Power Supplies. 215-227
Volume 59-I, Number 2, February 2012
- Joël M. H. Karel
Implementing Wavelets in Continuous-Time Analog Circuits With Dynamic Range Optimization. 229-242 - Ming Gu, Shantanu Chakrabartty:
Synthesis of Bias-Scalable CMOS Analog Computational Circuits Using Margin Propagation. 243-254 - Ayden Maralani, Michael S. Mazzola:
The Design of an Operational Amplifier Using Silicon Carbide JFETs. 255-265 - Junfeng Zhou, Wim Dehaene:
Fully Integrated CMOS EME-Suppressing Current Regulator for Automotive Electronics. 266-275 - Lingli Xia, Jingguang Wang, Will Beattie, Jacob Postman, Patrick Yin Chiang:
Sub-2-ps, Static Phase Error Calibration Technique Incorporating Measurement Uncertainty Cancellation for Multi-Gigahertz Time-Interleaved T/H Circuits. 276-284 - J. Gerardo García-Sánchez, José M. de la Rosa:
Multirate Downsampling Hybrid CT/DT Cascade Sigma-Delta Modulators. 285-294 - Nan Sun:
High-Order Mismatch-Shaped Segmented Multibit ΔΣ DACs With Arbitrary Unit Weights. 295-304 - Ke-Hou Chen, Shen-Iuan Liu:
Inductorless Wideband CMOS Low-Noise Amplifiers Using Noise-Canceling Technique. 305-314 - I-Ting Lee, Shen-Iuan Liu:
G-Band Injection-Locked Frequency Dividers Using π-type LC Networks. 315-323 - Yong-Il Kwon, Sang-Gyu Park, Ta-Joon Park, Koon-Shik Cho, Hai-Young Lee:
An Ultra Low-Power CMOS Transceiver Using Various Low-Power Techniques for LR-WPAN Applications. 324-336 - Stefano D'Amico
A 255 MHz Programmable Gain Amplifier and Low-Pass Filter for Ultra Low Power Impulse-Radio UWB Receivers. 337-345 - Julio C. G. Pimentel, Emad Gad
High-Order A-Stable and L-Stable State-Space Discrete Modeling of Continuous Systems. 346-359 - Daniel Ferreira Coutinho
Nonlinear State Feedback Design With a Guaranteed Stability Domain for Locally Stabilizable Unstable Quadratic Systems. 360-370 - Xinsong Yang
Stochastic Synchronization of Complex Networks With Nonidentical Nodes Via Hybrid Adaptive and Impulsive Control. 371-384 - Yeong-Luh Ueng
An Efficient Layered Decoding Architecture for Nonbinary QC-LDPC Codes. 385-398 - Wen Fan, Oliver Chiu-sing Choy:
Robust, Low-Complexity, and Energy Efficient Downlink Baseband Receiver Design for MB-OFDM UWB System. 399-408 - Ali Hagh Ghadam, Sascha Burglechner, Ahmet Hasim Gokceoglu
Implementation and Performance of DSP-Oriented Feedforward Power Amplifier Linearizer. 409-425 - Dunisha Wijeratne, Gerry Moschopoulos:
Quadratic Power Conversion for Power Electronics: Principles and Circuits. 426-438 - Yang-Ching Lin, Yean-Kuo Luo, Ke-Horng Chen
Liquid Crystal Display (LCD) Supplied by Highly Integrated Dual-Side Dual-Output Switched-Capacitor DC-DC Converter With Only Two Flying Capacitors. 439-446
Volume 59-I, Number 3, March 2012
- Sujiang Rong, Howard C. Luong
Analysis and Design of Transformer-Based Dual-Band VCO for Software-Defined Radios. 449-462 - Karim M. Hussein, Emad Hegazi
An All-Analog Method to Enhance Amplitude Stability in Pierce Crystal Oscillators. 463-470 - Mohamed Bouhamame, Luca Lo Coco, Sébastien Amiot, Serge Toutain:
A 60 dB Harmonic Rejection Mixer for Digital Terrestrial TV Tuner. 471-478 - Mark S. Oude Alink
A CMOS-Compatible Spectrum Analyzer for Cognitive Radio Exploiting Crosscorrelation to Improve Linearity and Noise Performance. 479-492 - Xiaolong Li
On the Design of Broadband Power-to-Current Low Noise Amplifiers. 493-504 - Wei-Zen Chen, Tai-You Lu, Wei-Wen Ou, Shun-Tien Chou, Song-Yu Yang:
A 2.4 GHz Reference-Less Receiver for 1 Mbps QPSK Demodulation. 505-514 - Ulf Gustavsson
An RF Carrier Bursting System Using Partial Quantization Noise Cancellation. 515-528 - Jean-François Bousquet
A 4-GHz Active Scatterer in 130-nm CMOS for Phase Sweep Amplify-and-Forward. 529-540 - Federico Bizzarri
Steady State Computation and Noise Analysis of Analog Mixed Signal Circuits. 541-554 - George Jie Yuan, Sheung Wai Fung, Kai Yin Chan, Ruoyu Xu:
A 12-bit 20 MS/s 56.3 mW Pipelined ADC With Interpolation-Based Nonlinear Calibration. 555-565 - Bing Liu, George Jie Yuan:
A Quantum-Limited Highly Linear Monolithic CMOS Detector for Computed Tomography. 566-574 - Pang-Jung Liu, Wei-Shan Ye, Jia-Nan Tai, Hsin-Shu Chen
A High-Efficiency CMOS DC-DC Converter With 9-µs Transient Recovery Time. 575-583 - Tony Tae-Hyoung Kim, Wei Zhang, Chris H. Kim:
An SRAM Reliability Test Macro for Fully Automated Statistical Measurements of VMIN Degradation. 584-593 - Yuan-Ho Chen, Tsin-Yuan Chang:
A High-Accuracy Adaptive Conditional-Probability Estimator for Fixed-Width Booth Multipliers. 594-603 - Claudio Favi, Theo Kluter, Christian Mester
Optically-Clocked Instruction Set Extensions for High Efficiency Embedded Processors. 604-615 - Ahmed Shahein, Qiang Zhang, Niklas Lotze, Yiannos Manoli:
A Novel Hybrid Monotonic Local Search Algorithm for FIR Filter Coefficients Optimization. 616-627 - Selvaraaju Murugesan, David B. H. Tay:
New Techniques for Rationalizing Orthogonal and Biorthogonal Wavelet Filter Coefficients. 628-637 - Li Xu, Shi Yan, Zhiping Lin, Shin-ya Matsushita:
A New Elementary Operation Approach to Multidimensional Realization and LFR Uncertainty Modeling: The MIMO Case. 638-651 - Nattapol Sitthimahachaikul, Lakshmi P. Rao
Overcoming the Effect of the Summation-Node Parasitic Pole in an Analog Equalizer. 652-663 - Atso Hekkala, Mikko Hiivala, Mika Lasanen, Jari Perttu, Luis C. Vieira
Predistortion of Radio Over Fiber Links: Algorithms, Implementation, and Measurements. 664-672
Volume 59-I, Number 4, April 2012
- Ze-kun Zhou, Yue Shi, Zhi Chao Huang, Pei-Sheng Zhu, Ying-qian Ma, Yong-Chun Wang, Zao Chen, Xin Ming, Bo Zhang
A 1.6-V 25-µ A 5-ppm/°C Curvature-Compensated Bandgap Reference. 677-684 - Nan Sun:
Exploiting Process Variation and Noise in Comparators to Calibrate Interstage Gain Nonlinearity in Pipelined ADCs. 685-695 - Yanjie Wang, Bagher Afshar, Lu Ye, Vincent C. Gaudet
Design of a Low Power, Inductorless Wideband Variable-Gain Amplifier for High-Speed Receiver Systems. 696-707 - Jean-Michel Akre, Jérôme Juillard, Dimitri Galayko
Synchronization Analysis of Networks of Self-Sampled All-Digital Phase-Locked Loops. 708-720 - Wolfgang Macher
Inter-Reciprocity Principles for Linear Network- Waveguides Systems Based on Generalized Scattering, Admittance and Impedance Matrices. 721-734 - David Wolpert, Paul Ampadu:
Exploiting Programmable Temperature Compensation Devices to Manage Temperature-Induced Delay Uncertainty. 735-748 - Rahul Singh, Jong-Kwan Woo, Hyunjoong Lee, SoYoung Kim, Suhwan Kim:
Power-Gating Noise Minimization by Three-Step Wake-Up Partitioning. 749-762 - Igor Tomovski, Ljupco Kocarev:
Simple Algorithm for Virus Spreading Control on Complex Networks. 763-771 - Mauro Di Marco
Convergence of a Class of Cooperative Standard Cellular Neural Network Arrays. 772-783 - Huaqing Li
A Unified Approach to Chaos Suppressing and Inducing in a Periodically Forced Family of Nonlinear Oscillators. 784-795 - Ramin Vali, Stevan M. Berber
Analysis of Chaos-Based Code Tracking Using Chaotic Correlation Statistics. 796-805 - Jaeyoon Kim, Paul Michael Solomon, Sandip Tiwari:
Adaptive Circuit Design Using Independently Biased Back-Gated Double-Gate MOSFETS. 806-819 - Chi Huang, Daniel W. C. Ho
Partial-Information-Based Distributed Filtering in Two-Targets Tracking Sensor Networks. 820-832 - Kuo-Lung Lian
Derivation of a Small-Signal Harmonic Model for Closed-Loop Power Converters Based on the State-Variable Sensitivity Method. 833-845 - Hyun-Lark Do:
Improved ZVS DC-DC Converter With a High Voltage Gain and a Ripple-Free Input Current. 846-853 - Veda Prakash Galigekere, Marian K. Kazimierczuk:
Analysis of PWM Z-Source DC-DC Converter in CCM for Steady State. 854-863 - Tsorng-Juu Liang, Shih-Ming Chen, Lung-Sheng Yang, Jiann-Fuh Chen, Adrian Ioinovici:
Ultra-Large Gain Step-Up Switched-Capacitor DC-DC Converter With Coupled Inductor for Alternative Sources of Energy. 864-874 - Reza Ahmadi, Mehdi Ferdowsi
Double-Input Converters Based on H-Bridge Cells: Derivation, Small-Signal Modeling, and Power Sharing Analysis. 875-888 - Federico Milano
Impact of Time Delays on Power System Stability. 889-900
Volume 59-I, Number 5, May 2012
- Tor Sverre Lande
Guest Editorial Special Issue on ISCAS 2011. 905 - Yu Lin, Kostas Doris, Hans Hegt, Arthur H. M. van Roermund:
An 11b Pipeline ADC With Parallel-Sampling Technique for Converting Multi-Carrier Signals. 906-914 - Liyuan Liu, Dongmei Li, Liangdong Chen, Yafei Ye, Zhihua Wang:
A 1-V 15-Bit Audio ΔΣ-ADC in 0.18 µm CMOS. 915-925 - Jing Jin, Xiaoming Liu, Tingting Mo, Jianjun Zhou
Quantization Noise Suppression in Fractional-N PLLs Utilizing Glitch-Free Phase Switching Multi-Modulus Frequency Divider. 926-937 - Andrea Bevilacqua
An Analysis of 1/f Noise to Phase Noise Conversion in CMOS Harmonic Oscillators. 938-945 - Shreyas Sen, Debashis Banerjee, Marian Verhelst
A Power-Scalable Channel-Adaptive Wireless Receiver Based on Built-In Orthogonally Tunable LNA. 946-957 - Paul P. Sotiriadis
Direct All-Digital Frequency Synthesis Techniques, Spurs Suppression, and Deterministic Jitter Correction. 958-968 - Victor Rodolfo Gonzalez-Diaz, Aldo Pena-Perez, Franco Maloberti:
Fractional Frequency Synthesizers With Low Order Time-Variant Digital Sigma-Delta Modulator. 969-978 - Mauricio Pardo
An Empirical Phase-Noise Model for MEMS Oscillators Operating in Nonlinear Regime. 979-988 - Soo-Chang Pei, Jong-Jy Shyu, Yun-Da Huang, Cheng-Han Chan:
Improved Methods for the Design of Variable Fractional-Delay IIR Digital Filters. 989-1000 - Mauro Mangia
Rakeness in the Design of Analog-to-Information Conversion of Sparse and Localized Signals. 1001-1014 - Simin Yu
Design and Implementation of Grid Multiwing Hyperchaotic Lorenz System Family via Switching Control and Constructing Super-Heteroclinic Loops. 1015-1028 - Massimiliano de Magistris, Mario di Bernardo
Synchronization of Networks of Non-Identical Chua's Circuits: Analysis and Experiments. 1029-1041 - Yoko Uwate, Yoshifumi Nishio
Synchronization in Several Types of Coupled Polygonal Oscillatory Networks. 1042-1050 - Harika Manem, Jeyavijayan Rajendran, Garrett S. Rose
Stochastic Gradient Descent Inspired Training Technique for a CMOS/Nano Memristive Trainable Threshold Gate Array. 1051-1060 - Chamith Wijenayake
RF Analog Beamforming Fan Filters Using CMOS All-Pass Time Delay Approximations. 1061-1073 - Jordi Bonet-Dalmau
Frequency Domain Analysis of Superregenerative Receivers in the Linear and the Logarithmic Modes. 1074-1084 - Carsten Barth, Ivan R. Linscott, Umran S. Inan
An Image Frequency Rejection Filter for SAW-Less GPS Receivers. 1085-1092 - Shang-Kee Ting, Danijela Cabric
An Algorithm to Compensate the Effects of Spurious PLL Tones in Spectrum Sensing Architectures. 1093-1106 - Paul N. Whatmough, Marcus R. Perrett, Safa Isam, Izzat Darwazeh:
VLSI Architecture for a Reconfigurable Spectrally Efficient FDM Baseband Transmitter. 1107-1118 - Chenchang Zhan, Wing-Hung Ki
An Output-Capacitor-Free Adaptively Biased Low-Dropout Regulator With Subthreshold Undershoot-Reduction for SoC. 1119-1131 - Song Xiong, Siew-Chong Tan
Analysis and Design of a High-Voltage-Gain Hybrid Switched-Capacitor Buck Converter. 1132-1141
Volume 59-I, Number 6, June 2012
- Alessandro Italia, Calogero Marco Ippolito
A 1-mW 1.13-1.9 GHz CMOS LC VCO Using Shunt-Connected Switched-Coupled Inductors. 1145-1155 - Yung Sern Tan, Kiat Seng Yeo
A Dual-Loop Clock and Data Recovery Circuit With Compact Quarter-Rate CMOS Linear Phase Detector. 1156-1167 - Masoud Meghdadi
Analysis and Optimization of SFDR in Differential Active-RC Filters. 1168-1177 - Jonas Fritzin, Christer Svensson, Atila Alvandpour:
Design and Analysis of a Class-D Stage With Harmonic Suppression. 1178-1186 - Paolo Maffezzoni:
An Experimental Method to Extract the Phase-Sensitivity of Oscillators to Noise Perturbations. 1187-1195 - Alex S. Weddell
Photovoltaic Sample-and-Hold Circuit Enabling MPPT Indoors for Low-Power Systems. 1196-1204 - Dan Liu, Philipp Basedau, Markus Helfenstein, James Wei, Thomas Burger, Yangjian Chen:
A Frequency-Based Model for Limit Cycle and Spur Predictions in Bang-Bang All Digital PLL. 1205-1214 - Hwann-Kaeo Chiou, Kuei-Cheng Lin, Wei-Hsien Chen, Ying-Zong Juang:
A 1-V 5-GHz Self-Bias Folded-Switch Mixer in 90-nm CMOS for WLAN Receiver. 1215-1227 - Matteo Bassi
Integrated SFCW Transceivers for UWB Breast Cancer Imaging: Architectures and Circuit Constraints. 1228-1241 - Sumit A. Talwalkar:
Quantization Error Spectra Structure of a DTC Synthesizer via the DFT Axis Scaling Property. 1242-1250 - Wen-Hao Chen, Bor-Sen Chen:
Robust Filter for Linear Stochastic Partial Differential Systems via a Set of Sensor Measurements. 1251-1264 - Chien Hsun Tseng:
Modeling and Visualization of a Time-Dependent Shallow Water System Using Nonlinear Kirchhoff Circuit. 1265-1277 - Ji Xiang
Global Synchronization of Directional Networked Systems With Eventually Dissipative Nodes. 1278-1289 - Yanyan Liu, Jun Zhao:
Generalized Output Synchronization of Dynamical Networks Using Output Quasi-Passivity. 1290-1298 - Kuo-Lung Lian
Steady-State Simulation Methods of Closed-Loop Power Converter Systems - A Systematic Solution Procedure. 1299-1311 - Fang-Xiang Wu
Stability and Bifurcation of Ring-Structured Genetic Regulatory Networks With Time Delays. 1312-1320 - Jiasong Wu, Lu Wang, Guanyu Yang, Lotfi Senhadji
Sliding Conjugate Symmetric Sequency-Ordered Complex Hadamard Transform: Fast Algorithm and Applications. 1321-1334 - Fang-Jhu Jhou, Jonq Juang, Yu-Hao Liang:
Multistate and Multistage Synchronization of Hindmarsh-Rose Neurons With Excitatory Chemical and Electrical Synapses. 1335-1347 - Bo Zhou, Jian Qiao, Rui He, Jinghui Liu, Wei Zhang, Hang Lv, Woogeun Rhee
A Gated FM-UWB System With Data-Driven Front-End Power Control. 1348-1358 - Chuan Zhang, Keshab K. Parhi
A Network-Efficient Nonbinary QC-LDPC Decoder Architecture. 1359-1371
Volume 59-I, Number 7, July 2012
- Francesco Centurelli
Efficient Digital Background Calibration of Time-Interleaved Pipeline Analog-to-Digital Converters. 1373-1383 - Wenbo Liu, Yun Chiu
Time-Interleaved Analog-to-Digital Conversion With Online Adaptive Equalization. 1384-1395 - Jeffrey Fredenburg, Michael P. Flynn:
Statistical Analysis of ENOB and Yield in Binary Weighted ADCs and DACS With Random Element Mismatch. 1396-1408 - Michael D. Bryant, Shouli Yan, Robin M. Tsang, Benito Fernandez, K. Kiran Kumar:
A Mixed Signal (Analog-Digital) Integrator Design. 1409-1417 - Andrea Bonfanti
Flicker Noise Up-Conversion due to Harmonic Distortion in Van der Pol CMOS Oscillators. 1418-1430 - Glen W. Mabey, Tamal Bose, Mei-Qin Chen:
Stability of Shift-Varying 2-D State-Space Digital Filters. 1431-1444 - Haiqing Nan, Ken Choi:
High Performance, Low Cost, and Robust Soft Error Tolerant Latch Designs for Nanoscale CMOS Technology. 1445-1457 - Chien-Cheng Tseng, Su-Ling Lee:
Design of Fractional Delay Filter Using Hermite Interpolation Method. 1458-1471 - Moon Ho Lee, Xiao-Dong Zhang, Wei Song, Xiang-Gen Xia:
Fast Reciprocal Jacket Transform With Many Parameters. 1472-1481 - Golnar Khodabandehloo, Mitra Mirhassani, Majid Ahmadi:
A Prototype CVNS Distributed Neural Network Using Synapse-Neuron Modules. 1482-1490 - Lorenzo Codecasa
Novel Feedback Theory of Electric Circuits - Part I: Cut-Based Decomposition. 1491-1504 - Lorenzo Codecasa
Novel Feedback Theory of Electric Circuits - Part II: Loop Invariants. 1505-1518 - Mei Yen Cheong, Stefan Werner
Adaptive Piecewise Linear Predistorters for Nonlinear Power Amplifiers With Memory. 1519-1532 - Félix O. Fernandez-Rodriguez, Edgar Sánchez-Sinencio:
Advanced Quenching Techniques for Super-Regenerative Radio Receivers. 1533-1545 - Chih-Yu Yang, Chun-Yu Hsieh, Fu-Kuei Feng, Ke-Horng Chen
Highly Efficient Analog Maximum Power Point Tracking (AMPPT) in a Photovoltaic System. 1546-1556 - Mustafa Emre Karagozler, Seth Copen Goldstein, David S. Ricketts:
Analysis and Modeling of Capacitive Power Transfer in Microsystems. 1557-1566 - Huey Chian Foong, Yuanjin Zheng, Yen Kheng Tan, Meng Tong Tan:
Fast-Transient Integrated Digital DC-DC Converter With Predictive and Feedforward Control. 1567-1576 - Srikar Bhagavatula, Byunghoo Jung:
A Low Power Real-time On-Chip Power Sensor in 45-nm SOI. 1577-1587 - Shang-Hsien Yang, Jen-Wei Liu, Chua-Chin Wang:
A Single-Chip 60-V Bulk Charger for Series Li-Ion Batteries With Smooth Charge-Mode Transition. 1588-1597
Volume 59-I, Number 8, August 2012
- Chip-Hong Chang
Guest Editorial Special Section on the 2011 IEEE Custom Integrated Circuits Conference (CICC 2011). 1601-1603 - Samira Zali Asl, Saurabh Saxena
A 12.5-bit 4 MHz 13.8 mW MASH ΔΣ Modulator With Multirated VCO-Based ADC. 1604-1613 - Ramin Zanbaghi, Saurabh Saxena
A 75-dB SNDR, 5-MHz Bandwidth Stage-Shared 2-2 MASH ΔΣ Modulator Dissipating 16 mW Power. 1614-1625 - David Rennie, David Li, Manoj Sachdev, Bharat L. Bhuva, Srikanth Jagannathan, Shi-Jie Wen, Richard Wong:
Performance, Metastability, and Soft-Error Robustness Trade-offs for Flip-Flops in 40 nm CMOS. 1626-1634 - Kousuke Miyaji, Yasuhiro Shinozuka, Shinji Miyano, Ken Takeuchi:
Near Threshold Voltage Word-Line Voltage Injection Self-Convergence Scheme for Local Electron Injected Asymmetric Pass Gate Transistor 6T-SRAM. 1635-1643 - Yu-Shun Wang, Min-Han Hsieh, James Chien-Mo Li, Charlie Chung-Ping Chen:
An At-Speed Test Technique for High-Speed High-order Adder by a 6.4-GHz 64-bit Domino Adder Example. 1644-1655 - Guangji He, Takanobu Sugahara, Yuki Miyamoto, Tsuyoshi Fujinaga, Hiroki Noguchi, Shintaro Izumi, Hiroshi Kawaguchi
A 40 nm 144 mW VLSI Processor for Real-Time 60-kWord Continuous Speech Recognition. 1656-1666 - Ranjit Gharpurey:
Linearity Enhancement Techniques in Radio Receiver Front-Ends. 1667-1679 - John R. Long, Yi Zhao, Wanghua Wu, Marco Spirito
Passive Circuit Technologies for mm-Wave Wireless Systems on Silicon. 1680-1693 - Feng Zhao, Fa Foster Dai:
A 0.6-V Quadrature VCO With Enhanced Swing and Optimized Capacitive Coupling for Phase Noise Reduction. 1694-1705 - Ja-Yol Lee, Mi-Jeong Park, Byung-Hun Min, Seongdo Kim, Mun-Yang Park, Hyun-Kyu Yu:
A 4-GHz All Digital PLL With Low-Power TDC and Phase-Error Compensation. 1706-1719 - Nan Qi, Yang Xu, Baoyong Chi, Yang Xu, Xiaobao Yu, Xing Zhang, Ni Xu, Patrick Chiang, Woogeun Rhee
A Dual-Channel Compass/GPS/GLONASS/Galileo Reconfigurable GNSS Receiver in 65 nm CMOS With On-Chip I/Q Calibration. 1720-1732 - Jon Guerber, Manideep Gande, Un-Ku Moon:
The Analysis and Application of Redundant Multistage ADC Resolution Improvements Through PDF Residue Shaping. 1733-1742 - Nathan M. Neihart, Jeremy Brown, Xiaohua Yu:
A Dual-Band 2.45/6 GHz CMOS LNA Utilizing a Dual-Resonant Transformer-Based Matching Network. 1743-1751 - Shen-Jui Huang, Sau-Gee Chen:
A High-Throughput Radix-16 FFT Processor With Parallel and Normal Input/Output Ordering for IEEE 802.15.3c Systems. 1752-1765 - Tian-Bo Deng, Sorawat Chivapreecha, Kobchai Dejhan:
Bi-Minimax Design of Even-Order Variable Fractional-Delay FIR Digital Filters. 1766-1774 - Chengjun Zhang, Chunyan Wang, M. Omair Ahmad:
A Pipeline VLSI Architecture for Fast Computation of the 2-D Discrete Wavelet Transform. 1775-1785 - Yinhe Wang, Yongqing Fan, Qingyun Wang, Yun Zhang:
Stabilization and Synchronization of Complex Dynamical Networks With Different Dynamics of Nodes Via Decentralized Controllers. 1786-1795 - Dimitri de Jonghe, Georges G. E. Gielen
Characterization of Analog Circuits Using Transfer Function Trajectories. 1796-1804 - Tso-Sheng Chan, Chern-Lin Chen:
A Primary Side Control Method for Wireless Energy Transmission System. 1805-1814 - Mohammad Reza Kakoee, Luca Benini
Robust Near-Threshold Design With Fine-Grained Performance Tunability. 1815-1825
Volume 59-I, Number 9, September 2012
- Radha S. Rajan, Shanthi Pavan:
Device Noise in Continuous-Time Oversampling Converters. 1829-1840 - Luís B. Oliveira
Noise Performance of a Regulated Cascode Transimpedance Amplifier for Radiation Detectors. 1841-1848 - Mona Safi-Harb, Shahriar Mirabbasi, Mohamad Sawan:
A Time-Based Technique for Testing LC-Tank Oscillators. 1849-1859 - Kyungho Ryu, Dong-Hoon Jung, Seong-Ook Jung:
A DLL With Dual Edge Triggered Phase Detector for Fast Lock and Low Jitter Clock Generator. 1860-1870 - Haitao Tong, Shanfeng Cheng, Yung-Chung Lo, Aydin I. Karsilayan
An LC Quadrature VCO Using Capacitive Source Degeneration Coupling to Eliminate Bi-Modal Oscillation. 1871-1879 - Gianluca Giustolisi
Robust Miller Compensation With Current Amplifiers Applied to LDO Voltage Regulators. 1880-1893 - Ramy Saad, Diego Luis Aristizábal-Ramirez, Sebastian Hoyos:
Sensitivity Analysis of Continuous-Time Δ Σ ADCs to Out-of-Band Blockers in Future SAW-Less Multi-Standard Wireless Receivers. 1894-1905 - Yang Shang, Wei Fei, Hao Yu
Analysis and Modeling of Internal State Variables for Dynamic Effects of Nonvolatile Memory Devices. 1906-1918 - Chitaranjan P. Sukumar, Chung-An Shen, Ahmed M. Eltawil
Joint Detection and Decoding for MIMO Systems Using Convolutional Codes: Algorithm and VLSI Architecture. 1919-1931 - Seetharam Narasimhan, Keerthi Kunaparaju, Swarup Bhunia
Healing of DSP Circuits Under Power Bound Using Post-Silicon Operand Bitwidth Truncation. 1932-1941 - Liming Xiu, Kun-Ho Lin, Ming Lin:
The Impact of Input-Mismatch on Flying-Adder Direct Period Synthesizer Output Jitter. 1942-1951 - Hisato Fujisaka, Takeshi Kamio, Chang-Jun Ahn, Masahiro Sakamoto, Kazuhisa Haeiwa:
Sorter-Based Arithmetic Circuits for Sigma-Delta Domain Signal Processing - Part I: Addition, Approximate Transcendental Functions, and Log-Domain Operations. 1952-1965 - Hisato Fujisaka, Masahiro Sakamoto, Chang-Jun Ahn, Takeshi Kamio, Kazuhisa Haeiwa:
Sorter-Based Arithmetic Circuits for Sigma-Delta Domain Signal Processing - Part II: Multiplication and Algebraic Functions. 1966-1979 - Brian Fitzgibbon, Michael Peter Kennedy
Hardware Reduction in Digital Delta-Sigma Modulators via Bus-Splitting and Error Masking - Part II: Non-Constant Input. 1980-1991 - Andrea Calimera
Design Techniques and Architectures for Low-Leakage SRAMs. 1992-2007 - Jayita Das, Syed M. Alam, Sanjukta Bhanja:
Ultra-Low Power Hybrid CMOS-Magnetic Logic Architecture. 2008-2016 - Luis Weruaga, O. Michael Melko:
Asymptotic Cramér-Rao Bound for Noise-Compensated Autoregressive Analysis. 2017-2024 - Sunav Choudhary
A SPT Treatment to the Realization of the Sign-LMS Based Adaptive Filters. 2025-2033 - Chang Hee Lee, PooGyeon Park
Scheduled-Step-Size Affine Projection Algorithm. 2034-2043 - Fu-Chang Lin, Li-Wei Ko, Chun-Hsiang Chuang
Generalized EEG-Based Drowsiness Prediction System by Using a Self-Organizing Neural Fuzzy System. 2044-2055 - Milton Castro-Nunez, Róbinson Castro-Puche:
Advantages of Geometric Algebra Over Complex Numbers in the Analysis of Networks With Nonsinusoidal Sources and Linear Loads. 2056-2064 - Mehdi Kiani, Maysam Ghovanloo:
The Circuit Theory Behind Coupled-Mode Magnetic Resonance-Based Wireless Power Transmission. 2065-2074 - Michael Soudan, Christian Vogel
Correction Structures for Linear Weakly Time-Varying Systems. 2075-2084 - Liang Liu, Johan Löfgren, Peter Nilsson:
Area-Efficient Configurable High-Throughput Signal Detector Supporting Multiple MIMO Modes. 2085-2096 - Mohamad A. Zeidan
Phase-Aware Multitone Digital Signal Based Test for RF Receivers. 2097-2110 - Paul T. Theilmann
A µ W Complementary Bridge Rectifier With Near Zero Turn-on Voltage in SOS CMOS for Wireless Power Supplies. 2111-2124 - Erin M. Thomas, Jason D. Heebl, Carl Pfeiffer, Anthony Grbic:
A Power Link Study of Wireless Non-Radiative Power Transfer Systems Using Resonant Shielded Loops. 2125-2136 - Xiuqin Wei, Shingo Kuroiwa, Tomoharu Nagashima, Marian K. Kazimierczuk, Hiroo Sekiya
Push-Pull Class-EM Power Amplifier for Low Harmonic-Contents and High Output-Power Applications. 2137-2146 - Daniel Diaz, Miroslav Vasic
Three-Level Cell Topology for a Multilevel Power Supply to Achieve High Efficiency Envelope Amplifier. 2147-2160
Volume 59-I, Number 10, October 2012
- Paolo Maffezzoni, Salvatore Levantino
Analysis of VCO Phase Noise in Charge-Pump Phase-Locked Loops. 2165-2175 - Zhiming Chen, Yuanjin Zheng, Foo Chung Choong, Minkyu Je:
A Low-Power Variable-Gain Amplifier With Improved Linearity: Analysis and Design. 2176-2185 - Heechai Kang, Kyungho Ryu, Dong-Hoon Jung, Donghwan Lee, Won Lee, SuHo Kim, JongRyun Choi, Seong-Ook Jung:
Process Variation Tolerant All-Digital 90° Phase Shift DLL for DDR3 Interface. 2186-2196 - Jinyong Jeon, Yong-Joon Jeon, Young-Suk Son, Gyu-Hyeong Cho:
A Double Zeros Compensated Direct Fast Feedback Current Driver for Medium to Large AMOLED Displays. 2197-2209 - Jun Tan, Chun-Huat Heng
Design of Efficient Class-E Power Amplifiers for Short-Distance Communications. 2210-2220 - Federico Bizzarri
Periodic Small Signal Analysis of a Wide Class of Type-II Phase Locked Loops Through an Exhaustive Variational Model. 2221-2231 - Calogero Bona, Franco Fiori:
A New Front-End for Binary Data Recovery in EM Polluted Environment. 2232-2243 - Konstantinos N. Glaros, Emmanuel M. Drakakis:
Self-Biased Logarithmic Photoreceptor With Low Settling Time. 2244-2251 - Nadav Cohen, Shlomo Weiss:
Complex Floating Point - A Novel Data Word Representation for DSP Processors. 2252-2262 - Ramya Muralidharan, Chip-Hong Chang
Area-Power Efficient Modulo 2n-1 and Modulo 2n+1 Multipliers for {2n-1, 2n, 2n+1} Based RNS. 2263-2274 - Jinmo Kwon, Ik Joon Chang, Insoo Lee, Heemin Park, Jongsun Park
Heterogeneous SRAM Cell Sizing for Low-Power H.264 Applications. 2275-2284 - Jongwook Sohn, Earl E. Swartzlander Jr.:
Improved Architectures for a Fused Floating-Point Add-Subtract Unit. 2285-2291 - Gaetano Palumbo, Melita Pennisi, Massimo Alioto:
A Simple Circuit Approach to Reduce Delay Variations in Domino Logic Gates. 2292-2300 - Shunji Nakata
General Stability of Stepwise Waveform of an Adiabatic Charge Recycling Circuit With Any Circuit Topology. 2301-2314 - Rajeev C. Nongpiur, Dale J. Shpak:
Maximizing the Signal-to-Alias Ratio in Non-Uniform Filter Banks for Acoustic Echo Cancellation. 2315-2325 - Romuald Rocher, Daniel Ménard, Pascal Scalart, Olivier Sentieys
Analytical Approach for Numerical Accuracy Estimation of Fixed-Point Systems Based on Smooth Operations. 2326-2339 - Wei Cheng, Mark S. Oude Alink
RF Circuit Linearity Optimization Using a General Weak Nonlinearity Model. 2340-2353 - Hongli Dong, Zidong Wang
Fault Detection for Markovian Jump Systems With Sensor Saturations and Randomly Varying Nonlinearities. 2354-2362 - Lin Xiao
Two New Types of Zhang Neural Networks Solving Systems of Time-Varying Nonlinear Inequalities. 2363-2373 - Zbigniew Galias
Rigorous Study of the Chua's Circuit Spiral Attractor. 2374-2382 - Peiran Gao, Ben Varkey Benjamin, Kwabena Boahen:
Dynamical System Guided Mapping of Quantitative Neuronal Models Onto Neuromorphic Hardware. 2383-2394 - M. D. S. Aliyu, El Kébir Boukas:
H∞} Filtering for Nonlinear Singular Systems. 2395-2404 - Weiran Cai, Torsten Schmidt, Udo Jörges, Frank Ellinger:
A Feedback Spin-Valve Memristive System. 2405-2412 - He Huang, Gang Feng
Stability and Stabilization of Markovian Jump Systems With Time Delay Via New Lyapunov Functionals. 2413-2421 - Hyongsuk Kim
Memristor Emulator for Memristor Circuit Applications. 2422-2431 - You-Jiang Liu, Bin Lu, Tao Cao, Bang-Hua Zhou, Jie Zhou, Yi-Nong Liu:
On the Robustness of Look-Up Table Digital Predistortion in the Presence of Loop Delay Error. 2432-2442 - Marco Crepaldi
A Very Low-Complexity 0.3-4.4 GHz 0.004 mm2 All-Digital Ultra-Wide-Band Pulsed Transmitter for Energy Detection Receivers. 2443-2455 - Ryosuke Miyahara, Xiuqin Wei, Tomoharu Nagashima, Takuji Kousaka, Hiroo Sekiya
Design of Class-EM Oscillator With Second Harmonic Injection. 2456-2467 - Po-Hsiang Lan, Po-Chiun Huang:
A High Efficiency FLL-Assisted Current-Controlled DC-DC Converter Over Light-Loaded Range. 2468-2476
Volume 59-I, Number 11, November 2012
- Liangge Xu, Kari Stadius, Jussi Ryynänen
An All-Digital PLL Frequency Synthesizer With an Improved Phase Digitization Approach and an Optimized Frequency Calibration Technique. 2481-2494 - Ioannis L. Syllaios, Poras T. Balsara:
Linear Time-Variant Modeling and Analysis of All-Digital Phase-Locked Loops. 2495-2506 - Pramod Murali, Ranjit K., Navakanta Bhat, Gaurab Banerjee, Bharadwaj Amrutur, K. N. Bhat, Praveen C. Ramamurthy
A CMOS Gas Sensor Array Platform With Fourier Transform Based Impedance Spectroscopy. 2507-2517 - Won-Young Lee, Lee-Sup Kim:
A 5.4-Gb/s Clock and Data Recovery Circuit Using Seamless Loop Transition Scheme With Minimal Phase Noise Degradation. 2518-2528 - Lakshmi P. Rao
Correcting the Effects of Mismatches in Time-Interleaved Analog Adaptive FIR Equalizers. 2529-2542 - Jason Zheng Jiang, Malcolm C. Smith:
Series-Parallel Six-Element Synthesis of Biquadratic Impedances. 2543-2554 - Manuel de la Guia Solaz, Wei Han, Richard Conway:
A Flexible Low Power DSP With a Programmable Truncated Multiplier. 2555-2568 - Jun Zhou, Senthil Jayapal, Ben Busze, Li Huang, Jan Stuyt:
A 40 nm Dual-Width Standard Cell Library for Near/Sub-Threshold Operation. 2569-2577 - Mohammed Ali-Bakhshian, Gordon W. Roberts:
A Digital Implementation of a Dual-Path Time-to-Time Integrator. 2578-2591 - Pedro Reviriego
Multiple Cell Upset Correction in Memories Using Difference Set Codes. 2592-2599 - Wei-Yu Tsai, Ching-Te Chiu, Jen-Ming Wu, Shawn S. H. Hsu, Yarsun Hsu:
A Novel Low Gate-Count Pipeline Topology With Multiplexer-Flip-Flops for Serial Link. 2600-2610 - Shyam Prasad Adhikari, Hyongsuk Kim
Why Are Memristor and Memistor Different Devices? 2611-2618 - Zdenek Biolek, Dalibor Biolek
Analytical Solution of Circuits Employing Voltage- and Current-Excited Memristors. 2619-2628 - Gao Huang, Shiji Song, Cheng Wu:
Orthogonal Least Squares Algorithm for Training Cascade Neural Networks. 2629-2637 - Sadiye Nergis Tural-Polat
Efficient Simulation of Time-Derivative Cellular Neural Networks. 2638-2645 - Zhi-Hong Guan, Feng-Lan Sun, Yan-Wu Wang, Tao Li:
Finite-Time Consensus for Leader-Following Second-Order Multi-Agent Networks. 2646-2654 - Kaining Wu
Synchronization of Partial Differential Systems via Diffusion Coupling. 2655-2668 - Xin-Rong Yang, Guo-Ping Liu
Necessary and Sufficient Consensus Conditions of Descriptor Multi-agent Systems. 2669-2677 - Yutaro Yamashita, Hiroyuki Torikai:
A Novel PWC Spiking Neuron Model: Neuron-Like Bifurcation Scenarios and Responses. 2678-2691 - Qiang Song, Fang Liu, Jinde Cao, Wenwu Yu:
Pinning-Controllability Analysis of Complex Networks: An M-Matrix Approach. 2692-2701 - Fanglai Zhu, Jian Xu
The Combination of High-Gain Sliding Mode Observers Used as Receivers in Secure Communication. 2702-2712 - Fernando Corinto
A Boundary Condition-Based Approach to the Modeling of Memristor Nanostructures. 2713-2726 - Kiyoshi Nakayama, Norihiko Shinomiya, Hitoshi Watanabe:
An Autonomous Distributed Control Method for Link Failure Based on Tie-Set Graph Theory. 2727-2737 - Bo Wang, Edouard Ngoya:
Integer-N PLLs Verification Methodology: Large Signal Steady State and Noise Analysis. 2738-2748 - Xuchu Hu, Matthew R. Guthaus:
Distributed LC Resonant Clock Grid Synthesis. 2749-2760 - Johan H. C. van den Heuvel, Jean-Paul M. G. Linnartz
Full MIMO Spatial Filtering Approach for Dynamic Range Reduction in Wideband Cognitive Radios. 2761-2773 - Christoph Studer, Schekeb Fateh, Christian Benkeser, Qiuting Huang:
Implementation Trade-Offs of Soft-Input Soft-Output MAP Decoders for Convolutional Codes. 2774-2783 - Xiaoheng Chen, Chung-Li Wang:
High-Throughput Efficient Non-Binary LDPC Decoder Based on the Simplified Min-Sum Algorithm. 2784-2794 - Xiaolong Wang, Fan Ye, Junyan Ren:
Comments on "Estimation of Carrier Frequency Offset With I/Q Mismatch Using Pseudo-Offset Injection in OFDM Systems". 2795-2798
Volume 59-I, Number 12, December 2012
- Sasikanth Manipatruni, Dmitri E. Nikonov
Modeling and Design of Spintronic Integrated Circuits. 2801-2814 - Te-Wen Liao, Chia-Min Chen, Jun-Ren Su, Chung-Chih Hung:
Random Pulsewidth Matching Frequency Synthesizer With Sub-Sampling Charge Pump. 2815-2824 - Joon-Yeong Lee, Hyeon-Min Bae:
Application of Kalman Gain for Minimum Mean-Squared Phase-Error Bound in Bang-Bang CDRs. 2825-2834 - Sergi Gorreta, Daniel Fernández
Pulsed Digital Oscillators for Electrostatic MEMS. 2835-2845 - David T. Lin, Li Li, Shahin Farahani, Michael P. Flynn:
A Flexible 500 MHz to 3.6 GHz Wireless Receiver with Configurable DT FIR and IIR Filter Embedded in a 7b 21 MS/s SAR ADC. 2846-2857 - Won-Young Lee, Kyu-Dong Hwang, Lee-Sup Kim:
A 5.4/2.7/1.62-Gb/s Receiver for DisplayPort Version 1.2 With Multi-Rate Operation Scheme. 2858-2866 - Evgeny V. Ivanov:
Switched-Capacitor Level-Shifting Technique With Sampling Noise Reduction for Rail-to-Rail Input Range Instrumentation Amplifiers. 2867-2880 - Eduard Säckinger:
On the Noise Optimum of FET Broadband Transimpedance Amplifiers. 2881-2889 - Wei-Lin Chen, Chih-Cheng Hsieh:
Exploration of Second-Order Effects in High-Performance Continuous-Time ΣΔ Modulators Using Discrete-Time Models. 2890-2900 - Shen Wang, Vipul Chawla, Dong Sam Ha, Beomsup Kim:
Low-Voltage Low-Power 1.6 GHz Quadrature Signal Generation Through Stacking a Transformer-Based VCO and a Divide-by-Two. 2901-2910 - Jeremy Yung Shern Low, Chip-Hong Chang
A VLSI Efficient Programmable Power-of-Two Scaler for 2n-1, 2n, 2n+1 RNS. 2911-2919 - Francesco Comaschi, Bart A. G. Genuit, Alberto Oliveri
FPGA Implementations of Piecewise Affine Functions Based on Multi-Resolution Hyperrectangular Partitions. 2920-2933 - Philip A. Marshall, Vincent C. Gaudet
Deeply Pipelined Digit-Serial LDPC Decoding. 2934-2944 - Manas Ranjan Meher, Ching-Chuen Jong
An Area and Energy Efficient Inner-Product Processor for Serial-Link Bus Architecture. 2945-2955 - Jeffrey O. Coleman:
Chebyshev Stopbands for CIC Decimation Filters and CIC-Implemented Array Tapers in 1D and 2D. 2956-2968 - Zahid Ullah, Kim Ilgon, Sanghyeon Baeg:
Hybrid Partitioned SRAM-Based Ternary Content Addressable Memory. 2969-2979 - Milton Castro-Nunez, Róbinson Castro-Puche:
The IEEE Standard 1459, the CPC Power Theory, and Geometric Algebra in Circuits With Nonsinusoidal Sources and Linear Loads. 2980-2990 - Hamid Soleimani, Arash Ahmadi
Biologically Inspired Spiking Neurons: Piecewise Linear Models and Digital Implementation. 2991-3004 - Rafael Suzuki Bayma, Zi-Qiang Lang:
A New Method for Determining the Generalised Frequency Response Functions of Nonlinear Systems. 3005-3014 - Qiang Jia
Consensus of Nonlinear Agents in Directed Network With Switching Topology and Communication Delay. 3015-3023 - Charles Baylis, Robert J. Marks II:
Evaluation of Harmonic Coupling Weights in Nonlinear Periodicity Preservation Systems. 3024-3033 - Charles Baylis, Robert J. Marks II:
Small Perturbation Harmonic Coupling in Nonlinear Periodicity Preservation Circuits. 3034-3045 - Fei Li, Arindam Basu
Dynamical Systems Guided Design and Analysis of Silicon Oscillators for Central Pattern Generators. 3046-3059 - Vandana Bassoo, Lance Linton, Michael Faulkner
Analysis of Non-Uniform Polar Quantisers in a Sigma Delta Transmitter Architecture. 3060-3070 - Chengwu Tao, Ayman A. Fayed
A Low-Noise PFM-Controlled Buck Converter for Low-Power Applications. 3071-3080 - Martin Scharrer, Mark Halton
Efficient Bi-Directional Digital Communication Scheme for Isolated Switch Mode Power Converters. 3081-3089 - Chung-Chieh Fang
Closed-Form Critical Conditions of Instabilities for Constant On-Time Controlled Buck Converters. 3090-3097 - Paul D. Mitcheson, Tim C. Green
Maximum Effectiveness of Electrostatic Energy Harvesters When Coupled to Interface Circuits. 3098-3111 - Hamed Molla-Ahmadian, Ali Karimpour
Hybrid Modeling of a DC-DC Series Resonant Converter: Direct Piecewise Affine Approach. 3112-3120
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