default search action
Tor M. Aamodt
Person information
- affiliation: University of Toronto, Canada
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
showing all ?? records
2020 – today
- 2024
- [j19]Deval Shah
, Zi Yu Xue
Characterizing and Improving Resilience of Accelerators to Memory Errors in Autonomous Robots. ACM Trans. Cyber Phys. Syst. 8(3): 34:1-34:33 (2024) - [c61]Ishita Chaturvedi, Bhargav Reddy Godala, Yucan Wu, Ziyang Xu, Konstantinos Iliakis, Panagiotis-Eleftherios Eleftherakis, Sotirios Xydis, Dimitrios Soudris, Tyler Sorensen, Simone Campanoni, Tor M. Aamodt, David I. August:
GhOST: a GPU Out-of-Order Scheduling Technique for Stall Reduction. ISCA 2024: 1-16 - [c60]Deval Shah, Tor M. Aamodt:
Collision Prediction for Robotics Accelerators. ISCA 2024: 566-581 - [c59]Davit Grigoryan, Yuan-Hsi Chou
Zatel: Sample Complexity-Aware Scale-Model Simulation for Ray Tracing. ISPASS 2024: 156-166 - 2023
- [c58]Deval Shah, Tor M. Aamodt:
Learning Label Encodings for Deep Regression. ICLR 2023 - [c57]Lufei Liu
LumiBench: A Benchmark Suite for Hardware Ray Tracing. IISWC 2023: 1-14 - [c56]Deval Shah
Energy-Efficient Realtime Motion Planning. ISCA 2023: 57:1-57:17 - [c55]Yuan-Hsi Chou
Treelet Prefetching For Ray Tracing. MICRO 2023: 742-755 - [e4]Tor M. Aamodt, Natalie D. Enright Jerger, Michael M. Swift:
Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2, ASPLOS 2023, Vancouver, BC, Canada, March 25-29, 2023. ACM 2023, ISBN 978-1-4503-9916-6 [contents] - [e3]Tor M. Aamodt, Natalie D. Enright Jerger, Michael M. Swift:
Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 3, ASPLOS 2023, Vancouver, BC, Canada, March 25-29, 2023. ACM 2023, ISBN 978-1-4503-9918-0 [contents] - [e2]Tor M. Aamodt, Michael M. Swift, Natalie D. Enright Jerger:
Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 4, ASPLOS 2023, Vancouver, BC, Canada, March 25-29, 2023. ACM 2023 [contents] - [i12]Deval Shah, Tor M. Aamodt:
Learning Label Encodings for Deep Regression. CoRR abs/2303.02273 (2023) - 2022
- [c54]Deval Shah, Zi Yu Xue, Tor M. Aamodt:
Label Encoding for Regression Networks. ICLR 2022 - [c53]Jonathan S. Lew, Yunpeng Liu, Wenyi Gong, Negar Goli, R. David Evans, Tor M. Aamodt:
Anticipating and eliminating redundant computations in accelerated sparse training. ISCA 2022: 536-551 - [c52]Mohammadreza Saed, Yuan-Hsi Chou
Vulkan-Sim: A GPU Architecture Simulator for Ray Tracing. MICRO 2022: 263-281 - [e1]Tor M. Aamodt, Natalie D. Enright Jerger, Michael M. Swift:
Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 1, ASPLOS 2023, Vancouver, BC, Canada, March 25-29, 2023. ACM 2022, ISBN 978-1-4503-9915-9 [contents] - [i11]Deval Shah, Zi Yu Xue, Tor M. Aamodt:
Label Encoding for Regression Networks. CoRR abs/2212.01927 (2022) - 2021
- [c51]Lufei Liu
Intersection Prediction for Accelerated GPU Ray Tracing. MICRO 2021: 709-723 - [c50]Vijay Kandiah, Scott Peverelle, Mahmoud Khairy, Junrui Pan, Amogh Manjunath, Timothy G. Rogers
AccelWattch: A Power Modeling Framework for Modern GPUs. MICRO 2021: 738-753 - [c49]R. David Evans, Tor M. Aamodt:
AC-GC: Lossy Activation Compression with Guaranteed Convergence. NeurIPS 2021: 27434-27448 - [i10]Deval Shah, Zi Yu Xue, Karthik Pattabiraman, Tor M. Aamodt:
Characterizing and Improving the Resilience of Accelerators in Autonomous Robots. CoRR abs/2110.08906 (2021) - 2020
- [j18]Milad Mohammadi
Energy Efficient On-Demand Dynamic Branch Prediction Models. IEEE Trans. Computers 69(3): 453-465 (2020) - [c48]Jiho Kim, Sanghun Cho
Bandwidth Bottleneck in Network-on-Chip for High-Throughput Processors. PACT 2020: 157-158 - [c47]Negar Goli, Tor M. Aamodt:
ReSprop: Reuse Sparsified Backpropagation. CVPR 2020: 1545-1555 - [c46]Mahmoud Khairy, Zhesheng Shen, Tor M. Aamodt, Timothy G. Rogers
Accel-Sim: An Extensible Simulation Framework for Validated GPU Modeling. ISCA 2020: 473-486 - [c45]R. David Evans, Lufei Liu
JPEG-ACT: Accelerating Deep Learning via Transform-based Lossy Compression. ISCA 2020: 860-873 - [c44]Yuan-Hsi Chou
Deterministic Atomic Buffering. MICRO 2020: 981-995 - [c43]Md Aamir Raihan, Tor M. Aamodt:
Sparse Weight Activation Training. NeurIPS 2020 - [i9]Md Aamir Raihan, Tor M. Aamodt:
Sparse Weight Activation Training. CoRR abs/2001.01969 (2020)
2010 – 2019
- 2019
- [c42]Tayler Hicklin Hetherington, Maria Lubeznov, Deval Shah, Tor M. Aamodt:
EDGE: Event-Driven GPU Execution. PACT 2019: 337-353 - [c41]Ayub A. Gubran, Tor M. Aamodt:
Emerald: graphics modeling for SoC systems. ISCA 2019: 169-182 - [c40]Md Aamir Raihan, Negar Goli, Tor M. Aamodt:
Modeling Deep Learning Accelerator Enabled GPUs. ISPASS 2019: 79-92 - [c39]Mahmoud Khairy, Akshay Jain, Tor M. Aamodt, Timothy G. Rogers:
A Detailed Model for Contemporary GPU Memory Systems. ISPASS 2019: 141-142 - [c38]Jonathan S. Lew, Deval A. Shah, Suchita Pati, Shaylin Cattell, Mengchi Zhang
Analyzing Machine Learning Workloads Using a Detailed GPU Simulator. ISPASS 2019: 151-152 - [i8]Ayub A. Gubran, Felix Huang, Tor M. Aamodt:
Surface Compression Using Dynamic Color Palettes. CoRR abs/1903.06658 (2019) - [i7]Francois Demoullin, Ayub A. Gubran, Tor M. Aamodt:
Hash-Based Ray Path Prediction: Skipping BVH Traversal Computation by Exploiting Ray Locality. CoRR abs/1910.01304 (2019) - 2018
- [b1]Tor M. Aamodt, Wilson Wai Lun Fung, Timothy G. Rogers
General-Purpose Graphics Processor Architectures. Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers 2018, ISBN 978-3-031-00631-9 - [j17]Andreas Moshovos, Jorge Albericio, Patrick Judd, Alberto Delmas Lascorz, Sayeh Sharify, Zissis Poulos, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger
Exploiting Typical Values to Accelerate Deep Learning. Computer 51(5): 18-30 (2018) - [j16]Andreas Moshovos, Jorge Albericio, Patrick Judd, Alberto Delmas Lascorz, Sayeh Sharify, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger
Value-Based Deep-Learning Acceleration. IEEE Micro 38(1): 41-55 (2018) - [j15]Patrick Judd
Proteus: Exploiting precision variability in deep neural networks. Parallel Comput. 73: 40-51 (2018) - [c37]Ahmed ElTantawy, Tor M. Aamodt:
Warp Scheduling for Fine-Grained Synchronization. HPCA 2018: 375-388 - [c36]Andreas Moshovos, Jorge Albericio, Patrick Judd, Alberto Delmas, Sayeh Sharify, Mostafa Mahmoud, Tayler H. Hetherington, Milos Nikolic, Dylan Malone Stuart, Kevin Siu, Zissis Poulos, Tor M. Aamodt, Natalie D. Enright Jerger
Identifying and Exploiting Ineffectual Computations to Enable Hardware Acceleration of Deep Learning. NEWCAS 2018: 356-360 - [i6]Mahmoud Khairy, Akshay Jain, Tor M. Aamodt, Timothy G. Rogers:
Exploring Modern GPU Memory System Design Challenges through Accurate Modeling. CoRR abs/1810.07269 (2018) - [i5]Md Aamir Raihan, Negar Goli, Tor M. Aamodt:
Modeling Deep Learning Accelerator Enabled GPUs. CoRR abs/1811.08309 (2018) - [i4]Jonathan S. Lew, Deval Shah, Suchita Pati, Shaylin Cattell, Mengchi Zhang, Amruth Sandhupatla, Christopher Ng, Negar Goli, Matthew D. Sinclair, Timothy G. Rogers, Tor M. Aamodt:
Analyzing Machine Learning Workloads Using a Detailed GPU Simulator. CoRR abs/1811.08933 (2018) - 2017
- [j14]Milad Mohammadi, Tor M. Aamodt, William J. Dally:
CG-OoO: Energy-Efficient Coarse-Grain Out-of-Order Execution Near In-Order Energy with Near Out-of-Order Performance. ACM Trans. Archit. Code Optim. 14(4): 39:1-39:26 (2017) - [c35]Shadi Assadikhomami, Jennifer Ongko, Tor M. Aamodt:
A state machine block for high-level synthesis. FPT 2017: 80-87 - [i3]Yatish Turakhia, Subhasis Das, Tor M. Aamodt, William J. Dally:
HoLiSwap: Reducing Wire Energy in L1 Caches. CoRR abs/1701.03878 (2017) - 2016
- [j13]Dongdong Li, Tor M. Aamodt:
Inter-Core Locality Aware Memory Scheduling. IEEE Comput. Archit. Lett. 15(1): 25-28 (2016) - [j12]Subhasis Das, Tor M. Aamodt, William J. Dally:
Reuse Distance-Based Probabilistic Cache Replacement. ACM Trans. Archit. Code Optim. 12(4): 33:1-33:22 (2016) - [c34]Patrick Judd, Jorge Albericio, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger
Proteus: Exploiting Numerical Precision Variability in Deep Neural Networks. ICS 2016: 23:1-23:12 - [c33]Jorge Albericio, Patrick Judd, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger
Cnvlutin: Ineffectual-Neuron-Free Deep Neural Network Computing. ISCA 2016: 1-13 - [c32]Ahmed ElTantawy, Tor M. Aamodt:
MIMD synchronization on SIMT architectures. MICRO 2016: 11:1-11:14 - [c31]Patrick Judd, Jorge Albericio, Tayler H. Hetherington, Tor M. Aamodt, Andreas Moshovos:
Stripes: Bit-serial deep neural network computing. MICRO 2016: 19:1-19:12 - [i2]Milad Mohammadi, Tor M. Aamodt, William J. Dally:
CG-OoO: Energy-Efficient Coarse-Grain Out-of-Order Execution. CoRR abs/1606.01607 (2016) - 2015
- [j11]Milad Mohammadi
On-Demand Dynamic Branch Prediction. IEEE Comput. Archit. Lett. 14(1): 50-53 (2015) - [c30]Tayler H. Hetherington, Mike O'Connor
MemcachedGPU: scaling-up scale-out key-value stores. SoCC 2015: 43-57 - [c29]Subhasis Das, Tor M. Aamodt, William J. Dally:
SLIP: reducing wire energy in the memory hierarchy. ISCA 2015: 349-361 - [i1]Patrick Judd, Jorge Albericio, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger, Raquel Urtasun, Andreas Moshovos:
Reduced-Precision Strategies for Bounded Memory in Deep Neural Nets. CoRR abs/1511.05236 (2015) - 2014
- [j10]Timothy G. Rogers
Learning your limit: managing massively multithreaded caches through scheduling. Commun. ACM 57(12): 91-98 (2014) - [j9]Inderpreet Singh, Arrvindh Shriraman, Wilson W. L. Fung, Mike O'Connor
Cache Coherence for GPU Architectures. IEEE Micro 34(3): 69-79 (2014) - [c28]Ahmed ElTantawy, Jessica Wenjie Ma, Mike O'Connor
A scalable multi-path microarchitecture for efficient GPU control flow. HPCA 2014: 248-259 - [c27]Tor M. Aamodt:
Scaling usable computing capability. ICSAMOS 2014: i - 2013
- [j8]Timothy G. Rogers
Cache-Conscious Thread Scheduling for Massively Multithreaded Processors. IEEE Micro 33(3): 78-85 (2013) - [j7]Ali Bakhoda, John Kim
Designing on-chip networks for throughput accelerators. ACM Trans. Archit. Code Optim. 10(3): 21:1-21:35 (2013) - [c26]Hadi Jooybar, Wilson W. L. Fung, Mike O'Connor
GPUDet: a deterministic GPU architecture. ASPLOS 2013: 1-12 - [c25]Vitaly Zakharenko, Tor M. Aamodt, Andreas Moshovos:
Characterizing the performance benefits of fused CPU/GPU systems using FusionSim. DATE 2013: 685-688 - [c24]Inderpreet Singh, Arrvindh Shriraman, Wilson W. L. Fung, Mike O'Connor
Cache coherence for GPU architectures. HPCA 2013: 578-590 - [c23]Jingwen Leng, Tayler H. Hetherington, Ahmed ElTantawy, Syed Zohaib Gilani, Nam Sung Kim, Tor M. Aamodt, Vijay Janapa Reddi:
GPUWattch: enabling energy optimizations in GPGPUs. ISCA 2013: 487-498 - [c22]Timothy G. Rogers
Divergence-aware warp scheduling. MICRO 2013: 99-110 - [c21]Wilson W. L. Fung, Tor M. Aamodt:
Energy efficient GPU transactional memory via space-time optimizations. MICRO 2013: 408-420 - 2012
- [j6]Wilson Wai Lun Fung, Inderpreet Singh, Andrew Brownsword, Tor M. Aamodt:
Kilo TM: Hardware Transactional Memory for GPU Architectures. IEEE Micro 32(3): 7-16 (2012) - [j5]Xi E. Chen, Tor M. Aamodt:
Modeling Cache Contention and Throughput of Multiprogrammed Manycore Processors. IEEE Trans. Computers 61(7): 913-927 (2012) - [j4]Marcel Gort, Flavio M. de Paula, Johnny J. W. Kuan, Tor M. Aamodt, Alan J. Hu, Steven J. E. Wilton, Jin Yang:
Formal-Analysis-Based Trace Computation for Post-Silicon Debug. IEEE Trans. Very Large Scale Integr. Syst. 20(11): 1997-2010 (2012) - [c20]Jimmy Kwa, Tor M. Aamodt:
Small virtual channel routers on FPGAs through block RAM sharing. FPT 2012: 71-79 - [c19]Tayler H. Hetherington, Timothy G. Rogers
Characterizing and evaluating a key-value store application on heterogeneous CPU-GPU systems. ISPASS 2012: 88-98 - [c18]Timothy G. Rogers
Cache-Conscious Wavefront Scheduling. MICRO 2012: 72-83 - [c17]Johnny J. W. Kuan, Tor M. Aamodt:
Progressive-BackSpace: Efficient Predecessor Computation for Post-Silicon Debug. MTV 2012: 70-75 - 2011
- [j3]Xi E. Chen, Tor M. Aamodt:
Hybrid analytical modeling of pending cache hits, data prefetching, and MSHRs. ACM Trans. Archit. Code Optim. 8(3): 10:1-10:28 (2011) - [c16]Wilson W. L. Fung, Tor M. Aamodt:
Thread block compaction for efficient SIMT control flow. HPCA 2011: 25-36 - [c15]Wilson W. L. Fung, Inderpreet Singh, Andrew Brownsword, Tor M. Aamodt:
Hardware transactional memory for GPU architectures. MICRO 2011: 296-307 - 2010
- [c14]Ali Bakhoda, John Kim
On-chip network design considerations for compute accelerators. PACT 2010: 535-536 - [c13]Aaron Ariel, Wilson W. L. Fung, Andrew E. Turner, Tor M. Aamodt:
Visualizing complex dynamics in many-core accelerator architectures. ISPASS 2010: 164-174 - [c12]Johnny J. W. Kuan, Steven J. E. Wilton, Tor M. Aamodt:
Accelerating trace computation in post-silicon debug. ISQED 2010: 244-249 - [c11]Ali Bakhoda, John Kim
Throughput-Effective On-Chip Networks for Manycore Accelerators. MICRO 2010: 421-432
2000 – 2009
- 2009
- [j2]Wilson W. L. Fung, Ivan Sham, George L. Yuan, Tor M. Aamodt:
Dynamic warp formation: Efficient MIMD control flow on SIMD graphics hardware. ACM Trans. Archit. Code Optim. 6(2): 7:1-7:37 (2009) - [c10]Xi E. Chen, Tor M. Aamodt:
A first-order fine-grained multithreaded throughput model. HPCA 2009: 329-340 - [c9]Ali Bakhoda, George L. Yuan, Wilson W. L. Fung, Henry Wong, Tor M. Aamodt:
Analyzing CUDA workloads using a detailed GPU simulator. ISPASS 2009: 163-174 - [c8]George L. Yuan, Ali Bakhoda, Tor M. Aamodt:
Complexity effective memory access scheduling for many-core accelerator architectures. MICRO 2009: 34-44 - 2008
- [j1]Tor M. Aamodt, Paul Chow:
Compile-time and instruction-set methods for improving floating- to fixed-point conversion accuracy. ACM Trans. Embed. Comput. Syst. 7(3): 26:1-26:27 (2008) - [c7]Henry Wong, Anne Bracy, Ethan Schuchman, Tor M. Aamodt, Jamison D. Collins, Perry H. Wang, Gautham N. Chinya, Ankur Khandelwal Groen, Hong Jiang, Hong Wang:
Pangaea: a tightly-coupled IA32 heterogeneous chip multiprocessor. PACT 2008: 52-61 - [c6]Xi E. Chen, Tor M. Aamodt:
Hybrid analytical modeling of pending cache hits, data prefetching, and MSHRs. MICRO 2008: 59-70 - 2007
- [c5]Tor M. Aamodt, Paul Chow:
Optimization of data prefetch helper threads with path-expression based statistical modeling. ICS 2007: 210-221 - [c4]Wilson W. L. Fung, Ivan Sham, George L. Yuan, Tor M. Aamodt:
Dynamic Warp Formation and Scheduling for Efficient GPU Control Flow. MICRO 2007: 407-420 - 2004
- [c3]Tor M. Aamodt, Paul Chow, Per Hammarlund, Hong Wang, John Paul Shen:
Hardware Support for Prescient Instruction Prefetch. HPCA 2004: 84-95 - 2003
- [c2]Tor M. Aamodt, Pedro Marcuello, Paul Chow, Antonio González
A framework for modeling and optimization of prescient instruction prefetch. SIGMETRICS 2003: 13-24 - 2000
- [c1]Tor M. Aamodt, Paul Chow:
Embedded ISA support for enhanced floating-point to fixed-point ANSI-C compilation. CASES 2000: 128-137
Coauthor Index
Wilson W. L. Fung
aka: Wilson Wai Lun Fung
aka: Wilson Wai Lun Fung
Tayler H. Hetherington
aka: Tayler Hicklin Hetherington
aka: Tayler Hicklin Hetherington
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from ,
, and
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and
to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-10-07 21:22 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by: