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IEEE Transactions on Circuits and Systems - Part II: Express Briefs, Volume 60-II
Volume 60-II, Number 1, January 2013
- Jae-Yong Ihm:
Stability Analysis of Bang-Bang Phase-Locked Loops for Clock and Data Recovery Systems. 1-5 - Sunkwon Kim, Jong-Kwan Woo, Woo-Yeol Shin, Gi-Moon Hong, Hyongmin Lee, Hyunjoong Lee, Suhwan Kim:
A 10-Mbps 0.8-pJ/bit Referenceless Clock and Data Recovery Circuit for Optically Controlled Neural Interface System. 6-10 - Yong Chen
, Pui-In Mak
A Fifth-Order 20-MHz Transistorized-LC-Ladder LPF With 58.2-dB SFDR, 68-µW/Pole/MHz Efficiency, and 0.13-mm2 Die Size in 90-nm CMOS. 11-15 - Ivan R. Padilla-Cantoya
Low-Power High Parallel Load Resistance Current-Mode Grounded and Floating Capacitor Multiplier. 16-20 - Won-Young Lee, Jiehwan Oh, Lee-Sup Kim:
A LOG-Induced SSN-Tolerant Transceiver for On-Chip Interconnects in COG-Packaged Source Driver IC for TFT-LCD. 21-25 - Jiwon Lee, Inkyu Baek, Kyounghoon Yang:
Memoryless Wide-Dynamic-Range CMOS Image Sensor Using Nonfully Depleted PPD-Storage Dual Capture. 26-30 - Shih-Lun Chen:
VLSI Implementation of a Low-Cost High-Quality Image Scaling Processor. 31-35 - Yi Wang
FPGA-Based 40.9-Gbits/s Masked AES With Area Optimization for Storage Area Network. 36-40 - Reza Azarderakhsh, Arash Reyhani-Masoleh:
High-Performance Implementation of Point Multiplication on Koblitz Curves. 41-45 - Jian-Feng Gu, S. C. Chan, Wei-Ping Zhu
Joint DOA Estimation and Source Signal Tracking With Kalman Filtering and Regularized QRD RLS Algorithm. 46-50 - Kruno Milicevic
Initiation of Characteristic Ferroresonance States Based on Flux Reflection Model. 51-55 - Ali Zemouche, Mohamed Boutayeb:
Comments on "A Note on Observers for Discrete-Time Lipschitz Nonlinear Systems". 56-60
Volume 60-II, Number 2, February 2013
- Jian Luo, Andreas Kortke, Wilhelm Keusgen, Mikko Valkama
A Novel Adaptive Calibration Scheme for Frequency-Selective I/Q Imbalance in Broadband Direct-Conversion Transmitters. 61-65 - Marco Sosio, Antonio Liscidini
An Intuitive Current-Driven Passive Mixer Model Based on Switched-Capacitor Theory. 66-70 - Joo-Myoung Kim, Seungjin Kim, In-Young Lee, Seok-Kyun Han, Sang-Gug Lee:
A Low-Noise Four-Stage Voltage-Controlled Ring Oscillator in Deep-Submicrometer CMOS Technology. 71-75 - Tom Redant, Wim Dehaene:
Joint Estimation of Propagation Delay Dispersion and Time of Arrival in a 40-nm CMOS Comparator Bank for Time-Based Receivers. 76-80 - Shanthi Pavan:
A Time-Domain Perspective of the Signal Transfer Function of a Continuous-Time ΔΣ Modulator. 81-85 - Francesco Centurelli
Improved Digital Background Calibration of Time-Interleaved Pipeline A/D Converters. 86-90 - Seon-Kyoo Lee
A QDR-Based 6-GB/s Parallel Transceiver With Current-Regulated Voltage-Mode Output Driver and Byte CDR for Memory Interface. 91-95 - Xi Qu, Ze-kun Zhou, Bo Zhang
An Ultralow-Power Fast-Transient Capacitor-Free Low-Dropout Regulator With Assistant Push-Pull Output Stage. 96-100 - Moon-Kyu Song, Seong-Eun Kim, Young-Seok Choi, Woo-Jin Song:
Selective Normalized Subband Adaptive Filter With Subband Extension. 101-105 - Biao Min, Ray C. C. Cheung
A Flexible and Customizable Architecture for the Relaxation Labeling Algorithm. 106-110 - Takuya Noguchi, Hiroyuki Torikai:
Ghost Stochastic Resonance From an Asynchronous Cellular Automaton Neuron Model. 111-115
Volume 60-II, Number 3, March 2013
- Sunwoo Kong, Choul-Young Kim
A K-Band UWB Low-Noise CMOS Mixer With Bleeding Path Gm-Boosting Technique. 117-121 - Yeo Myung Kim, Hong Gul Han, Tae Wook Kim:
A 0.6-V +4 dBm IIP3 LC Folded Cascode CMOS LNA With gm Linearization. 122-126 - Wei Fei, Hao Yu
A 96-GHz Oscillator by High-Q Differential Transmission Line loaded with Complementary Split-Ring Resonator in 65-nm CMOS. 127-131 - Xianhe Huang, Yan Wang, Wei Fu:
Design of a Wide-Tuning-Range Lithium Tantalate Low-Phase-Noise Voltage-Controlled Oscillator. 132-136 - Frank Herzel, Arzu Ergintav, Yaoming Sun:
Phase Noise Modeling for Integrated PLLs in FMCW Radar. 137-141 - Yunjae Suh, Jongmi Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 10-bit 25-MS/s 1.25-mW Pipelined ADC With a Semidigital Gm-Based Amplifier. 142-146 - Kareem Ragab, Mücahit Kozak, Nan Sun:
Thermal Noise Analysis of a Programmable-Gain Switched-Capacitor Amplifier With Input Offset Cancellation. 147-151 - Ivan R. Padilla-Cantoya
Capacitor Multiplier With Wide Dynamic Range and Large Multiplication Factor for Filter Applications. 152-156 - Svetozar S. Broussev, Nikolay T. Tchamov:
Two-Phase Self-Assisted Zero-Voltage Switching DC-DC Converter. 157-161 - Bongjin Kim, Injae Yoo, In-Cheol Park
Low-Complexity Parallel QPP Interleaver Based on Permutation Patterns. 162-166 - Yanming Wang, Jiguang Yue, Yongqing Su, Hao Liu:
Design of Two-Dimensional Zero-Phase FIR Digital Filter by McClellan Transformation and Interval Global Optimization. 167-171 - Yongxiang Xia, David J. Hill
Dynamic Braess's Paradox in Complex Communication Networks. 172-176
Volume 60-II, Number 4, April 2013
- Nejdat Demirel, Yenny Pinto, Christophe Calvez, Diane Titz, Cyril Luxey, Christian Person, Daniel Gloria, Didier Belot, Denis Pache, Eric Kerherve
Codesign of a PA-Antenna Block in Silicon Technology for 80-GHz Radar Application. 177-181 - Qiyang Wu, Tony Quach, Aji Mattamana, Salma Elabd, Pompei L. Orlando, Steven R. Dooley, Jamin J. McCue, Gregory L. Creech, Waleed Khalil:
Frequency Tuning Range Extension in LC-VCOs Using Negative-Capacitance Circuits. 182-186 - Yi-Chun Shih, Brian P. Otis:
An On-Chip Tunable Frequency Generator for Crystal-Less Low-Power WBAN Radio. 187-191 - Bogdan Georgescu, Roghoyeh Salmeh, Michel Fattouche, Fadhel M. Ghannouchi:
Two-Tone Phase Delay Control of Center Frequency and Bandwidth in Low-Noise-Amplifier RF Front Ends. 192-196 - Habib Adrang, Hossein Miar Naimi:
Nonlinear Analysis of BBCDR Jitter Generation Using VOLTERRA Series. 197-201 - Shailesh Kulkarni, Dixian Zhao, Patrick Reynaert
Design of an Optimal Layout Polyphase Filter for Millimeter-Wave Quadrature LO Generation. 202-206 - Dongsheng Yu, Yan Liang, Hao Chen, Herbert H. C. Iu:
Design of a Practical Memcapacitor Emulator Without Grounded Restriction. 207-211 - Xinmiao Zhang:
An Efficient Interpolation-Based Chase BCH Decoder. 212-216 - Jianfeng Zhu, Leibo Liu
Low-Power Reconfigurable Processor Utilizing Variable Dual VDD. 217-221 - Feiran Yang
A Computationally Efficient Delayless Frequency-Domain Adaptive Filter Algorithm. 222-226 - Dongkun Han, Graziano Chesi
Synchronization Conditions for Multiagent Systems With Intrinsic Nonlinear Dynamics. 227-231 - Hua Yang, Guo-Ping Jiang:
Reference-Modulated DCSK: A Novel Chaotic Communication Scheme. 232-236
Volume 60-II, Number 5, May 2013
- Marco Crepaldi
A 130-nm CMOS 0.007-mm2 Ring-Oscillator-Based Self-Calibrating IR-UWB Transmitter Using an Asynchronous Logic Duty-Cycled PLL. 237-241 - Imad ud Din, Johan Wernehag, Stefan Back Andersson, Sven Mattisson, Henrik Sjöland
Wideband SAW-Less Receiver Front-End With Harmonic Rejection Mixer in 65-nm CMOS. 242-246 - Wonhoon Jang, Nelson Silva, Arnaldo S. R. Oliveira
Designing Harmonic-Controlled Drivers for Switching Power Amplifiers. 247-251 - Yan-Yu Lin, Shen-Iuan Liu:
4-Gb/s Parallel Receivers With Adaptive Far-End Crosstalk Cancellation. 252-256 - Byoungho Kim
Capacitor-Coupled Built-Off Self-Test in Analog and Mixed-Signal Embedded Systems. 257-261 - Terry N. Guo:
Unique Measurement and Modeling of Total Phase Noise in RF Receiver. 262-266 - Fei Xiao:
Direct Synthesis Technique for Dual-Passband Filters: Superposition Approach. 267-271 - Xi Chen, Guanghui He, Jun Ma:
VLSI Implementation of a High-Throughput Iterative Fixed-Complexity Sphere Decoder. 272-276 - Sangmin Kim
Scaling, Offset, and Balancing Techniques in FFT-Based BP Nonbinary LDPC Decoders. 277-281 - Doru-Florin Chiper
A Novel VLSI DHT Algorithm for a Highly Modular and Parallel Architecture. 282-286 - Shen-Fu Hsiao, Jun-Hong Zhang Jian, Ming-Chih Chen:
Low-Cost FIR Filter Designs Based on Faithfully Rounded Truncated Multiple Constant Multiplication/Accumulation. 287-291 - Yao Chen, Wenwu Yu, Fangfei Li, Shasha Feng:
Synchronization of Complex Networks With Impulsive Control and Disconnected Topology. 292-296
Volume 60-II, Number 6, June 2013
- Arash Zargaran-Yazd, Shahriar Mirabbasi:
12.5-Gb/s Full-Rate CDR With Wideband Quadrature Phase Shifting in Data Path. 297-301 - Kyu-Dong Hwang, Lee-Sup Kim:
A 6.5-Gb/s 1-mW/Gb/s/CH Simple Capacitive Crosstalk Compensator in a 130-nm Process. 302-306 - Pere Palà-Schönwälder
A Low In-Band Radiation Superregenerative Oscillator. 307-310 - Kwang-Chun Choi, Sung-Geun Kim, Seung-Woo Lee, Bhum-Cheol Lee, Woo-Young Choi:
A 990-µW 1.6-GHz PLL Based on a Novel Supply-Regulated Active-Loop-Filter VCO. 311-315 - Hyouk-Kyu Cha, Dongning Zhao
A CMOS High-Voltage Transmitter IC for Ultrasound Medical Imaging Applications. 316-320 - Rares Bodnar, William Redman-White:
High-Accuracy Current Memory in HV CMOS Technology. 321-325 - Young-Il Kim, Sang-Sun Lee:
A Capacitorless LDO Regulator With Fast Feedback Technique and Low-Quiescent Current Error Amplifier. 326-330 - Hoon Ki Kim, Young-Jae Min, Chan-Hui Jeong, Kyu-Young Kim, Chulwoo Kim, Soo-Won Kim:
A 1-mW Solar-Energy-Harvesting Circuit Using an Adaptive MPPT With a SAR and a Counter. 331-335 - Sherif H. Abdelhalem, Prasad S. Gudem, Lawrence E. Larson:
An RF-DC Converter with Wide-Dynamic-Range Input Matching for Power Recovery Applications. 336-340 - Suat U. Ay:
Boosted CMOS APS Pixel Readout for Ultra Low-Voltage and Low-Power Operation. 341-345 - Sang Yoon Park, Pramod Kumar Meher:
Low-Power, High-Throughput, and Low-Area Adaptive FIR Filter Based on Distributed Arithmetic. 346-350 - Achiranshu Garg, Tony Tae-Hyoung Kim:
SRAM Array Structures for Energy Efficiency Enhancement. 351-355 - Imen Mansouri, Pascal Benoit, Lionel Torres, Fabien Clermidy:
Fine-Grain Dynamic Energy Tracking for System on Chip. 356-360 - Choon Ki Ahn
l2 - l∞ Elimination of Overflow Oscillations in 2-D Digital Filters Described by Roesser Model With External Interference. 361-365 - Zeynab Vahidpoor, Ali Fotowat-Ahmady, Keyvan Forooraghi, Zahra Atlasbaf:
A New Spectrum Sensing Method Using Output Analysis of the PFD. 366-370 - He Huang, Tingwen Huang
Guaranteed H∞ Performance State Estimation of Delayed Static Neural Networks. 371-375
Volume 60-II, Number 7, July 2013
- Donggu Im:
A +9-dBm Output P1dB Active Feedback CMOS Wideband LNA for SAW-Less Receivers. 377-381 - Mehdi Kiani, Maysam Ghovanloo:
A 20-Mb/s Pulse Harmonic Modulation Transceiver for Wideband Near-Field Data Transmission. 382-386 - Ameya Bhide, Omid Esmailzadeh Najari, Behzad Mesgarzadeh, Atila Alvandpour:
An 8-GS/s 200-MHz Bandwidth 68-mW ΔΣ DAC in 65-nm CMOS. 387-391 - Jingyu Wang, Zhongbo Zhu, Changzhi Li
PLL-Based Self-Adaptive Resonance Tuning for a Wireless-Powered Potentiometer. 392-396 - Coro Garcia-Alberdi, Jesús Aguado Ruiz, Antonio J. López-Martín
Micropower Class-AB VGA With Gain-Independent Bandwidth. 397-401 - Jian Xu, Tony Wu, Zhi Yang:
A New System Architecture for Future Long-Term High-Density Neural Recording. 402-406 - Mark E. Halpern
Maximum Reduction in Peak Voltage Using Stepped Currents to Deliver Charge to RC Circuits. 407-411 - Won-Hwa Shin, Young-Hyun Jun, Bai-Sun Kong:
A DFE Receiver With Equalized VREF for Multidrop Single-Ended Signaling. 412-416 - Fabricio G. S. Silva, Robson Nunes de Lima
A Switchless Multiband Impedance Matching Technique Based on Multiresonant Circuits. 417-421 - Ramen Dutta, Eric A. M. Klumperink, Xiang Gao, Zhiyu Ru, Ronan A. R. van der Zee
Flip-Flops for Accurate Multiphase Clocking: Transmission Gate Versus Current Mode Logic. 422-426 - Peichen Jiang, Zhijian Lu, Rui Guan, Jianjun Zhou
All-Digital Adaptive Module for Automatic Background IIP2 Calibration in CMOS Downconverters With Fast Convergence. 427-431 - Pedro Reviriego, Salvatore Pontarelli
Reducing the Cost of Implementing Error Correction Codes in Content Addressable Memories. 432-436 - Graham M. Megson, José O. Cadenas, Robert Simon Sherratt
A Parallel Quantum Histogram Architecture. 437-441 - Insun Song, PooGyeon Park
A Normalized Least Mean Squares Algorithm With a Step-Size Scaler Against Impulsive Measurement Noise. 442-445 - Ahmad Beirami, Hamid Nejati:
A Framework for Investigating the Performance of Chaotic-Map Truly Random Number Generators. 446-450 - Kaining Wu
Robust H∞ Synchronization of Coupled Partial Differential Systems With Spatial Coupling Delay. 451-455 - Moon-Kyu Song, Seong-Eun Kim, Young-Seok Choi, Woo-Jin Song:
Correction to "Selective Normalized Subband Adaptive Filter With Subband Extension". 456
Volume 60-II, Number 8, August 2013
- Sandeep D'Souza, Frank Hsiao, Adrian Tang, Sai-Wang Tam, Roc Berenguer
A 10-Bit 2-GS/s DAC-DDFS-IQ-Controller Baseband Enabling a Self-Healing 60-GHz Radio-on-Chip. 457-461 - Wei-Han Yu
A Nonrecursive Digital Calibration Technique for Joint Elimination of Transmitter and Receiver I/Q Imbalances With Minimized Add-On Hardware. 462-466 - Won Namgoong:
Digital Equalization of a Polyphase Harmonic Mixer. 467-471 - Amir Babaie-Fishani, Bjorn Van Keymeulen, Pieter Rombouts
Analytical Expressions for the Distortion of Asynchronous Sigma-Delta Modulators. 472-476 - Jaspal Singh Shah, David Nairn, Manoj Sachdev:
An Energy-Efficient Offset-Cancelling Sense Amplifier. 477-481 - Orlando Lazaro, Gabriel A. Rincón-Mora:
Inductively Coupled 180-nm CMOS Charger With Adjustable Energy-Investment Capability. 482-486 - Ahmed S. Elwakil
A Simple Model of Double-Loop Hysteresis Behavior in Memristive Elements. 487-491 - Bijoy Kumar Upadhyaya, Salil Kumar Sanyal:
Efficient FPGA Implementation of Address Generator for WiMAX Deinterleaver. 492-496 - Zhen Gao, Pedro Reviriego
Efficient Arithmetic-Residue-Based SEU-Tolerant FIR Filter Design. 497-501 - Yusong Hu, Ching-Chuen Jong
A Memory-Efficient Scalable Architecture for Lifting-Based Discrete Wavelet Transform. 502-506 - Sayed Ahmad Salehi, Rassoul Amirfattahi, Keshab K. Parhi
Pipelined Architectures for Real-Valued FFT and Hermitian-Symmetric IFFT With Real Datapaths. 507-511 - Pedro Reviriego
An Efficient Technique to Protect Serial Shift Registers Against Soft Errors. 512-516 - An Wang, Man Chen, Zongyue Wang, Xiaoyun Wang:
Fault Rate Analysis: Breaking Masked AES Hardware Implementations Efficiently. 517-521 - Ya Jun Yu, Wei Jing Xu:
Investigation on the Optimization Criteria for the Design of Variable Fractional Delay Filters. 522-526 - Jelena R. Djordjevic-Kozarov
An Analytical Method for the Multiplierless 2-D FIR Filter Functions and Hilbert Transform in z2 Domain. 527-531 - Wen-Chung Shen, Hsiao-I Jen, An-Yeu Wu
New Ping-Pong Scheduling for Low-Latency EMD Engine Design in Hilbert-Huang Transform. 532-536
Volume 60-II, Number 9, September 2013
- Wei Zhang, Xican Chen, Fei Chen, Woogeun Rhee
A Phase-Domain ΔΣ Ranging Method for FMCW Radar Receivers. 537-541 - Lianhong Zhou, Muthukumaraswamy Annamalai Arasu, Jeongwook Koh, Minkyu Je, Libin Yao, Chun-Huat Heng
A Crystal-Less Temperature-Independent Reconfigurable Transmitter Targeted for High-Temperature Wireless Acoustic Telemetry Applications. 542-546 - I-Ting Lee, Kai-Hui Zeng, Shen-Iuan Liu:
A 4.8-GHz Dividerless Subharmonically Injection-Locked All-Digital PLL With a FOM of -252.5 dB. 547-551 - Metin Sengül
Design of Practical Broadband Matching Networks With Lumped Elements. 552-556 - Chang-Kyo Lee, Wan Kim
A Replica-Driving Technique for High Performance SC Circuits and Pipelined ADC Design. 557-561 - Seung-Yeob Baek, Jae-Kyum Lee, Seung-Tak Ryu:
An 88-dB Max-SFDR 12-bit SAR ADC With Speed-Enhanced ADEC and Dual Registers. 562-566 - Maarten De Bock, Xinpeng Xing, Ludo Weyten
Calibration of DAC Mismatch Errors in ΣΔ ADCs Based on a Sine-Wave Measurement. 567-571 - Seyed Kasra Garakoui, Eric A. M. Klumperink, Bram Nauta
Frequency Limitations of First-Order gm - RC All-Pass Delay Circuits. 572-576 - Anvesha Amaravati, Marshnil Vipin Dave, Maryam Shojaei Baghini, Dinesh Kumar Sharma:
800-nA Process-and-Voltage-Invariant 106-dB PSRR PTAT Current Reference. 577-581 - Ze-kun Zhou, Pei-Sheng Zhu, Yue Shi, Xi Qu, Hui-ying Wang, Xiao-Min Zhang, Shi Qiu, Nie Li, Chao Gou, Zhuo Wang, Bo Zhang
A Resistorless CMOS Voltage Reference Based on Mutual Compensation of VT and VTH. 582-586 - Mostafa Shaterian
An MTL-Based Configurable Block for Current-Mode Nonlinear Analog Computation. 587-591 - Katharina Hausmair, Peter Singerl, Christian Vogel
Multiplierless Implementation of an Aliasing-Free Digital Pulsewidth Modulator. 592-596 - Keshab K. Parhi
Hierarchical Folding and Synthesis of Iterative Data Flow Graphs. 597-601 - Zhao Chuan Lee, Kam Chew Leong, Zhi-Hui Kong, Tony Tae-Hyoung Kim:
NBTI/PBTI-Aware WWL Voltage Control for Half-Selected Cell Stability Improvement. 602-606 - Irena Orovic
A Suitable Hardware Realization for the Cohen Class Distributions. 607-611 - Xueyun He, Rongfang Song, Wei-Ping Zhu
Pilot Allocation for Sparse Channel Estimation in MIMO-OFDM Systems. 612-616
Volume 60-II, Number 10, October 2013
- Yunzhi Dong, Kenneth W. Martin:
A 4-Gbps POF Receiver Using Linear Equalizer With Multi-Shunt-Shunt Feedbacks in 65-nm CMOS. 617-621 - Yan-Yu Lin, Shen-Iuan Liu:
4-Gb/s Parallel Receivers With Adaptive FEXT Cancellation by Pulse Width and Amplitude Calibrations. 622-626 - Seong-Ryong Ryu, Hars Vardhan, Bhaskar Banerjee, Ravi Prakash
Continuous Active Phase Shifter Design and Analysis for Millimeter-Wave Circuits. 627-631 - Giovanni Marucci, Salvatore Levantino
Exploiting Stochastic Resonance to Enhance the Performance of Digital Bang-Bang PLLs. 632-636 - Xiongchuan Huang, Guido Dolmans, Harmke de Groot, John R. Long:
Noise and Sensitivity in RF Envelope Detection Receivers. 637-641 - Yan Lu
A ±0.5% Precision On-Chip Frequency Reference With Programmable Switch Array for Crystal-Less Applications. 642-646 - Manoj Kumar Yadav, Mario R. Casu
LAURA-NoC: Local Automatic Rate Adjustment in Network-on-Chips With a Simple DVFS. 647-651 - Manohar Ayinala, Yingjie Lao, Keshab K. Parhi
An In-Place FFT Architecture for Real-Valued Signals. 652-656 - Domingo Garcia, Mohamed Mansour, Murtaza Ali
A Flexible Hardware Architecture for Wavelet Packet Transform With Arbitrary Tree Structure. 657-661 - Ren-Der Chen, Pei-Yin Chen
Design of an Area-Efficient One-Dimensional Median Filter. 662-666 - Costas Efstathiou, Zaher Owda, Yiorgos Tsiatouhas
New High-Speed Multioutput Carry Look-Ahead Adders. 667-671 - Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Jian Zhang, Giovanni De Micheli:
Power-Gated Differential Logic Style Based on Double-Gate Controllable-Polarity Transistors. 672-676 - Shien-Chun Luo, Ching-Ji Huang, Yuan-Hua Chu:
An Adaptive Pulse-Triggered Flip-Flop for a High-Speed and Voltage-Scalable Standard Cell Library. 677-681 - Xuan Zhu, Xuejun Yang, Chunqing Wu, Nong Xiao, Junjie Wu, Xun Yi:
Performing Stateful Logic on Memristor Memory. 682-686 - Zheng Zhang
Efficient Uncertainty Quantification for the Periodic Steady State of Forced and Autonomous Circuits. 687-691 - Du-Qu Wei, Bo Zhang, Xiao-Shu Luo, Shang You Zeng, Dong Yuan Qiu:
Effects of Couplings on the Collective Dynamics of Permanent-Magnet Synchronous Motors. 692-696 - Saeed Manaffam
Synchronization Probability in Large Complex Networks. 697-701 - Toni Draganov Stojanovski, Ljupco Kocarev:
Construction of Markov Partitions in PL1D Maps. 702-706 - Hyung-Min Lee
A Power-Efficient Wireless Capacitor Charging System Through an Inductive Link. 707-711 - Ji-Soo Chang, Hyoung-Seok Oh, Young-Hyun Jun, Bai-Sun Kong:
Fast Output Voltage-Regulated PWM Buck Converter With an Adaptive Ramp Amplitude Control. 712-716
Volume 60-II, Number 11, November 2013
- Malihe Zarre Dooghabadi, Håkon A. Hjortland
An IR-UWB Transmitter for Ranging Systems. 721-725 - ZiJie Hu, Koen Mouthaan
A 1- to 10-GHz RF and Wideband IF Cross-Coupled Gilbert Mixer in 0.13-µm CMOS. 726-730 - Chun-hsiang Chang, Marvin Onabajo:
IIP3 Enhancement of Subthreshold Active Mixers. 731-735 - Nagarajan Mahalingam, Kaixue Ma, Kiat Seng Yeo
K-band High-PAE Wide-Tuning-Range VCO Using Triple-Coupled LC Tanks. 736-740 - Sebastian Höppner, Stefan Hänzsche, Georg Ellguth, Dennis Walter, Holger Eisenreich, René Schüffny:
A Fast-Locking ADPLL With Instantaneous Restart Capability in 28-nm CMOS Technology. 741-745 - Mohsen Hassanpourghadi, Mohammad Sharifkhani:
Fast Static Characterization of Residual-Based ADCs. 746-750 - Tom Redant, Pieter A. J. Nuyts, Patrick Reynaert
Presilicon Circuit-Aware Linear Least Squares Spectral Analysis for Time-Based Data Converters. 751-755 - Sergio Callegari
Noise Weighting in the Design of ΔΣ Modulators (With a Psychoacoustic Coder as an Example). 756-760 - Yong Chen
A Single-Branch Third-Order Pole-Zero Low-Pass Filter With 0.014-mm2 Die Size and 0.8-kHz (1.25-nW) to 0.94-GHz (3.99-mW) Bandwidth-Power Scalability. 761-765 - Fatemeh Aezinia, Behraad Bahreyni:
An Interface Circuit With Wide Dynamic Range for Differential Capacitive Sensing Applications. 766-770 - Li Lu, Scott T. Block, David E. Duarte, Changzhi Li
A 0.45-V MOSFETs-Based Temperature Sensor Front-End in 90 nm CMOS With a Noncalibrated ± 3.5°C 3σ Relative Inaccuracy From -55°C to 105°C. 771-775 - Sang-Yun Kim, Jong-Min Baek, Dong-Jin Seo, Jae-Koo Park, Jung-Hoon Chun, Kee-Won Kwon:
Power-Efficient Fast Write and Hidden Refresh of ReRAM Using an ADC-Based Sense Amplifier. 776-780 - Matcha Surya Prakash
Low-Area and High-Throughput Architecture for an Adaptive Filter Using Distributed Arithmetic. 781-785 - Salvador Manich
A Highly Time Sensitive XOR Gate for Probe Attempt Detectors. 786-790 - Guiming Wu, Xianghui Xie, Yong Dou, Miao Wang:
High-Performance Architecture for the Conjugate Gradient Solver on FPGAs. 791-795 - Amirhossein Alimohammad, Saeed Fouladi Fard:
FPGA Implementation of Isotropic and Nonisotropic Fading Channels. 796-800 - Aiwu Ruan, Junhao Yang, Li Wan, Bairui Jie, Zhiqiang Tian:
Insight Into a Generic Interconnect Resource Model for Xilinx Virtex and Spartan Series FPGAs. 801-805 - Shin-Chi Lai, Meng-Kun Lee, An-Kai Li, Ching-Hsing Luo, Sheau-Fang Lei:
An Innovative Fast Algorithm and Structure Design for Analysis and Synthesis Quadrature Mirror Filterbanks on the SBR in DRM. 806-810 - Shiyuan Wang, Jiuchao Feng, Chi Kong Tse
Kernel Affine Projection Sign Algorithms for Combating Impulse Interference. 811-815 - Yang Yi, Wei Xing Zheng, Lei Guo:
Improved Results on Statistic Information Control With a Dynamic Neural Network Identifier. 816-820
Volume 60-II, Number 12, December 2013
- Dennis Sylvester:
Introduction to the Special Section on Circuits and Systems for Energy-Autonomous Microsystems. 825-826 - Ye-Sing Luo, Jiun-Ru Wang, Wei-Jen Huang, Je-Yu Tsai, Yi-Fang Liao, Wan-Ting Tseng, Chen-Tung Yen
Ultrasonic Power/Data Telemetry and Neural Stimulator With OOK-PM Signaling. 827-831 - Khadar Shaik, Travis Kleeburg, Rajeevan Amirtharajah
Ultralow-Power Optical CDR for Integrated Photovoltaic Energy-Harvesting Sensors. 832-836 - Yu-Hsuan Chiang, Shen-Iuan Liu:
A Submicrowatt 1.1-MHz CMOS Relaxation Oscillator With Temperature Compensation. 837-841 - Yoonmyung Lee
Achieving Ultralow Standby Power With an Efficient SCCMOS Bias Generator. 842-846 - Abbas Rahimi
Spatial Memoization: Concurrent Instruction Reuse to Correct Timing Errors in SIMD Architectures. 847-851 - R. R. Manikandan, Bharadwaj Amrutur:
Experimental Study on Substrate Noise Effects of a Pulsed Clocking Scheme on PLL Performance. 852-856 - Ehsan Zhian Tabasy, Mahmoud Kamarei, Shahin Jafarabadi-Ashtiani
Sequential Correlated Level Shifting: A Switched-Capacitor Approach for High-Accuracy Systems. 857-861 - Vahideh Sadat Sadeghi, Hossein Miar Naimi, Michael Peter Kennedy
The Role of Charge Pump Mismatch in the Generation of Integer Boundary Spurs in Fractional-N Frequency Synthesizers: Why Worse Can Be Better. 862-866 - Jikai Chen, Rizwan Bashirullah:
A 12.4-mW 4.5-Gb/s Receiver With Majority-Voting 1-Tap Speculative DFE in 0.13- µm CMOS. 867-871 - Hoyoung Yoo
Area-Efficient Multimode Encoding Architecture for Long BCH Codes. 872-876 - Héctor Pettenghi
Method to Design General RNS Reverse Converters for Extended Moduli Sets. 877-881 - Rance Rodrigues, Arunachalam Annamalai, Israel Koren, Sandip Kundu:
A Study on the Use of Performance Counters to Estimate Power in Microprocessors. 882-886 - Stavros G. Stavrinides
A Digital Nonautonomous Chaotic Oscillator Suitable for Information Transmission. 887-891 - Ivan H. H. Jørgensen, Peter Pracný, Erik Bruun
Hardware-Efficient Implementation of Half-Band IIR Filter for Interpolation and Decimation. 892-896 - Hai Huyen Dam, Sven Nordholm
Design of Robust Broadband Beamformers With Discrete Coefficients and Least Squared Criterion. 897-901 - Bo Shen, Steven X. Ding, Zidong Wang
Finite-Horizon H∞ Fault Estimation for Uncertain Linear Discrete Time-Varying Systems With Known Inputs. 902-906
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