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Signed/unsigned short vector defs are flipped #40

@paging-turner

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@paging-turner

While messing around with v4!ushort in cepl, I kept getting an error that it couldn't coerce the given values into (signed-byte 16). After poking around rtg-math a bit, I found that the vector defs for shorts have the types flipped.

(def-v! v!short (unsigned-byte 16))
(def-v! v!ushort (signed-byte 16))

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