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fix: Update x86/6.1 MSR baselines with RFDS_NO
#4537
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Codecov ReportAll modified and coverable lines are covered by tests ✅
Additional details and impacted files@@ Coverage Diff @@
## main #4537 +/- ##
=======================================
Coverage 82.02% 82.03%
=======================================
Files 253 253
Lines 31046 31048 +2
=======================================
+ Hits 25467 25469 +2
Misses 5579 5579
Flags with carried forward coverage won't be shown. Click here to find out more. ☔ View full report in Codecov by Sentry. |
roypat
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wearyzen
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April 3, 2024 09:20
Done, thanks! |
Since Amazon Linux commit amazonlinux/linux/b2e92ab17e440a97c716b701ecd897eebca11ac0, KVM passes through bit 27 of the `MSR_IA32_ARCH_CAPABILITIES` MSR (0x10A) to the guest, to let them know whether the processor they're running on is affected by RFDS. According to Intel, only Atom processors are affected [[1]], and accordingly, for all instances in our CI this bit is reported to be 1. Thus, update the baselines. [1]: https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/advisory-guidance/register-file-data-sampling.html Signed-off-by: Patrick Roy <roypat@amazon.co.uk>
Passthrough in T2CL template, set to 1 in T2S template. Signed-off-by: Patrick Roy <roypat@amazon.co.uk>
zulinx86
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Apr 3, 2024
kalyazin
approved these changes
Apr 3, 2024
wearyzen
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Apr 3, 2024
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Changes
Since Amazon Linux commit
amazonlinux/linux@b2e92ab, KVM passes through bit 27 of the
MSR_IA32_ARCH_CAPABILITIES
MSR (0x10A) to the guest, to let them know whether the processor they're running on is affected by RFDS. According to Intel, only Atom processors are affected [1], and accordingly, for all instances in our CI this bit is reported to be 1. Thus, update the baselines.Reason
integration_tests/functional/test_cpu_template_helper.py::test_guest_cpu_config_change
failing on x86/6.1License Acceptance
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