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Stars

FPGA

109 repositories

Kactus2 is a graphical EDA tool based on the IP-XACT standard.

C++ 240 44 Updated Dec 19, 2025

Implementation of a Tensor Processing Unit for embedded systems and the IoT.

VHDL 527 68 Updated Jan 5, 2019
C 2 Updated Oct 4, 2022

Configurable AES-GCM IP (128, 192, 256 bits)

Python 38 15 Updated Aug 27, 2025

A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.

VHDL 693 55 Updated Dec 25, 2025

👇 Add capacitive touch buttons to any FPGA!

VHDL 102 10 Updated Mar 4, 2022

Project Apicula 🐝: bitstream documentation for Gowin FPGAs

Verilog 608 83 Updated Dec 21, 2025

A voxel game/Minecraft clone for the iCE40 UP5K FPGA

C++ 211 11 Updated Oct 28, 2025

Pipelined implementation of Sobel Edge Detection on OV7670 camera and on still images

Verilog 66 6 Updated Nov 2, 2021

Open Source Verification Bundle for VHDL and System Verilog

Python 48 9 Updated Jan 12, 2024

Universal utility for programming FPGA

C++ 1,501 309 Updated Dec 25, 2025

This repository is an excuse to learn about Convolutional Neural Networks by implementing one in FPGA. The main goal is to learn, and to make good use of the tools I enjoy the most for digital desi…

Python 12 1 Updated Jul 12, 2020

This is an example of how TerosHDL can generate your documentation project from the command line. So you can integrate it in your CI workflow.

Python 10 4 Updated Jan 13, 2022

A FPGA core for a simple SDRAM controller.

VHDL 122 27 Updated Nov 13, 2021

FPGA ULX2/3 JTAG programmer

C 41 9 Updated Nov 2, 2022

Rust Test Bench - write HDL tests in Rust.

Rust 23 3 Updated Nov 28, 2022

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: FPGA, hardware

Verilog 820 283 Updated Sep 23, 2025

A huge VHDL library for FPGA and digital ASIC development

VHDL 417 78 Updated Dec 15, 2025

Pre-packaged testbenching tools and reusable bus interfaces for cocotb

Python 71 48 Updated Dec 22, 2025

Miscellaneous ULX3S examples (advanced)

Makefile 81 16 Updated Jun 26, 2025

Serial utility for flashing, provisioning, and interacting with Espressif SoCs

Python 6,161 1,461 Updated Dec 23, 2025

ulx3s ghdl examples

VHDL 14 4 Updated Mar 6, 2021

Standard and Curated cores, tested and working.

VHDL 11 2 Updated Dec 29, 2022

An Open-Source Library for Training Binarized Neural Networks

Python 723 86 Updated Aug 12, 2024

A curated list of awesome resources for HDL design and verification

Shell 166 21 Updated Dec 19, 2025

FPGA implementation of deflate (de)compress RFC 1950/1951

Verilog 63 6 Updated May 2, 2019

PCB for ULX3S FPGA R&D board

OpenSCAD 417 65 Updated Apr 27, 2025

Opensource software/hardware platform to build edge AI solutions deployed on FPGA or custom ASIC hardware.

VHDL 281 45 Updated Apr 6, 2025

A JSON library implemented in VHDL.

VHDL 80 17 Updated Dec 16, 2025