This is mainly a simulation library of xilinx primitives that are verilator compatible.

Lib(X)SVF - A library for implementing SVF and XSVF JTAG players, forked from http://svn.clifford.at/libxsvf/

Commodore 64 PLA replacement

MCPU - A Minimal 8Bit CPU in a 32 Macrocell CPLD

xc3sprog is a suite of utilities for programming Xilinx FPGAs, CPLDs, and EEPROMs with the Xilinx Parallel Cable and other JTAG adapters under Linux. Used to program the FPGA of the MATRIX Creator/…

Build your hardware, easily!

current focus on Colorlight i5 and i9 & i9plus module

Reverse engineering the XC2064 FPGA

Various iCE40 cores / projects to play around with (mostly targeted at the icebreaker)

Small and low cost FPGA educational and development board

i8080 precise replica in Verilog, based on reverse engineering of real die

Documenting the Xilinx 7-series bit-stream format.

Open FPGA tools

Verilog to Routing -- Open Source CAD Flow for FPGA Research

Use ECP5 JTAG port to interact with user design

Tiny tips for Colorlight i5 FPGA board

A Grako-based parser for IEEE 1149.1 Boundary-Scan Description Language (BSDL) files

Project Apicula 🐝: bitstream documentation for Gowin FPGAs

FPGA SoC code and application example for Hackaday Supercon 2019 badge

A Full Hardware Real-Time Ray-Tracer

FPGA-версия платы МС1201.02 и ЭВМ ДВК-3

Experimental flows using nextpnr for Xilinx devices

nextpnr portable FPGA place and route tool

public domain tools for FPGAs

Linsn RV901T HUB75 LED "Receiver Card" Reverse Engineering

C code to parse xilinx bitstream. See http://lastweek.io/fpga/bitstream/