Skip to content
View levinit's full-sized avatar

Block or report levinit

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Maximum 250 characters. Please don't include any personal information such as legal names or email addresses. Markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse
Stars

EDA

11 repositories

KLayout Main Sources

C++ 1,013 254 Updated Dec 11, 2025

A seamless python to Cadence Virtuoso Skill interface

Python 244 50 Updated Feb 26, 2025

Render waveforms inside VSCode with WaveDrom

TypeScript 38 7 Updated Nov 21, 2025

Cadence Virtuoso Git Integration written in SKILL++

Shell 159 48 Updated Sep 3, 2022

Open-source repository for a standard-cell library characterizer using complete open-source tools

Python 41 16 Updated Jul 29, 2025

A Python library for designing chips (Photonics, Analog, Quantum, MEMS), PCBs, and 3D-printable objects. We aim to make hardware design accessible, intuitive, and fun—empowering everyone to build t…

Python 797 333 Updated Dec 15, 2025

Gdstk (GDSII Tool Kit) is a C++/Python library for creation and manipulation of GDSII and OASIS files.

C++ 430 101 Updated Dec 9, 2025

OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.

Python 1,650 412 Updated Sep 15, 2025

Verilator open-source SystemVerilog simulator and lint system

SystemVerilog 3,234 729 Updated Dec 15, 2025

Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server

C++ 1,713 263 Updated Dec 12, 2025

SystemVerilog compiler and language services

C++ 896 191 Updated Dec 15, 2025