DUEL - A high level language for debugging C programs (by Michael Golan)

Anti80 is design exercise in a more compiler friendly architecture in roughly the same implementation budget as the Z80

A version of John McCarthy's tiny Lisp (in C) with added CDR-coding

Stuff I did for Matt Venn's Zero-to-ASIC course

Sandbox for ways to visualize waves in the terminal

Unadulted git mirror of the SESC CVS repo on https://sourceforge.net/p/sesc/code/sesc

A very simple example of how to use Verilator

A quick little design to experiment with memory inference and timing impact

Verilog simulation workload extracted from Reduceron

Simple OrangeCrab Verilog design using LED and serial IO

Full mirror of the Previous NeXT computer emulator's SVN repository http://previous.alternative-system.com (including SVN's awkward branches)

Small example design for BeMicro CV-A9 using JTAGUART and LEDs

3D printed case for the BeMicroCV-A9 FPGA development board

Proof of concept dynamic code generation

Quick hack to test html serving from github

crt0 and Makefile to enable SDCC to produce code for Nascom 2

A "hello world" style designs for the Cyclone V based $49 Arrow BeMicro CV

Bug-fixed version of the official specification of the Dirac wavelet based video codec