Features

• Low Voltage and Standard Voltage Operation

– 5.0 (VCC = 4.5V to 5.5V)
– 2.7 (VCC = 2.7V to 5.5V)
– 1.8 (VCC = 1.8V to 3.6V)
• Internally Organized 16,384 x 8 and 32,768 x 8
• 2-Wire Serial Interface
• Schmitt Trigger, Filtered Inputs for Noise Suppression
• Bidirectional Data Transfer Protocol
• 1 MHz (5V), 400 kHz (2.7V) and 100 kHz (1.8V) Compatibility
•
•
Write Protect Pin for Hardware and Software Data Protection
64-Byte Page Write Mode (Partial Page Writes Allowed)
2-Wire Serial
• Self-Timed Write Cycle (5 ms typical)
• High Reliability EEPROMs
– Endurance: 100,000 Write Cycles
– Data Retention: 40 Years 128K (16,384 x 8)
– ESD Protection: > 4000V
• Automotive Grade and Extended Temperature Devices Available 256K (32,768 x 8)
• 8-Pin JEDEC PDIP, 8-Pin JEDEC and EIAJ SOIC, 14-Pin TSSOP, and
8-Pin Leadless Array Packages

Description AT24C128
The AT24C128/256 provides 131,072/262,144 bits of serial electrically erasable and
programmable read only memory (EEPROM) organized as 16,384/32,768 words of 8
AT24C256
bits each. The device’s cascadable feature allows up to 4 devices to share a common
2-wire bus. The device is optimized for use in many industrial and commercial applica-
tions where low power and low voltage operation are essential. The devices are avail-
able in space-saving 8-pin JEDEC PDIP, 8-pin EIAJ, 8-pin JEDEC SOIC, 14-pin
TSSOP, and 8-pin LAP packages. In addition, the entire family is available in 5.0V
(4.5V to 5.5V), 2.7V (2.7V to 5.5V) and 1.8V (1.8V to 3.6V) versions.

Pin Configurations 8-Pin PDIP

Pin Name Function
A0 1 8 VCC
A0 to A1 Address Inputs A1 2 7 WP
NC 3 6 SCL
SDA Serial Data
GND 4 5 SDA
SCL Serial Clock Input
WP Write Protect
NC No Connect 8-Pin SOIC

A0 1 8 VCC
A1 2 7 WP
14-Pin TSSOP NC 3 6 SCL
GND 4 5 SDA
A0 1 14 VCC
A1 2 13 WP
NC 3 12 NC
NC 4 11 NC 8-Pin Leadless Array
NC 5 10 NC
NC 6 9 SCL VCC 8 1 A0
GND 7 8 SDA WP 7 2 A1
SCL 6 3 NC
SDA 5 4 GND Rev. 0670C–08/98

Bottom View

1
Absolute Maximum Ratings*
Operating Temperature .................................. -55°C to +125°C *NOTICE: Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
Storage Temperature ..................................... -65°C to +150°C age to the device. This is a stress rating only and
functional operation of the device at these or any
Voltage on Any Pin other conditions beyond those indicated in the
with Respect to Ground .....................................-1.0V to +7.0V operational sections of this specification is not
implied. Exposure to absolute maximum rating
Maximum Operating Voltage........................................... 6.25V conditions for extended periods may affect device
reliability.
DC Output Current........................................................ 5.0 mA

Block Diagram

Pin Description
SERIAL CLOCK (SCL): The SCL input is used to positive WRITE PROTECT (WP): The write protect input, when tied
edge clock data into each EEPROM device and negative to GND, allows normal write operations. When WP is tied
edge clock data out of each device. high to VCC, all write operations to the memory are inhib-
SERIAL DATA (SDA): The SDA pin is bidirectional for ited. If left unconnected, WP is internally pulled down to
serial data transfer. This pin is open-drain driven and may GND. Switching WP to VCC prior to a write operation cre-
be wire-ORed with any number of other open-drain or open ates a software write protect function.
collector devices.
DEVICE/PAGE ADDRESSES (A1, A0): The A1 and A0 Memory Organization
pins are device address inputs that are hardwired or left not AT24C128/256, 128K/256K SERIAL EEPROM: The
connected for hardware compatibility with AT24C32/64. 128K/256K is internally organized as 256/512 pages of 64-
When the pins are hardwired, as many as four 128K/256K bytes each. Random word addressing requires a 14/15-bit
devices may be addressed on a single bus system (device data word address.
addressing is discussed in detail under the Device
Addressing section). When the pins are not hardwired, the
default A1 and A0 are zero.

2 AT24C128/256
 AT24C128/256

Pin Capacitance(1)
Applicable over recommended operating range from TA = 25°C, f = 1.0 MHz, VCC = +1.8V.

Symbol Test Condition Max Units Conditions

CI/O Input/Output Capacitance (SDA) 8 pF VI/O = 0V
CIN Input Capacitance (A0, A1, SCL) 6 pF VIN = 0V
Note: This parameter is characterized and is not 100% tested.

DC Characteristics
Applicable over recommended operating range from: TAI = -40°C to +85°C, VCC = +1.8V to +5.5V, TAC = 0°C to +70°C,
VCC = +1.8V to +5.5V (unless otherwise noted).

Symbol Parameter Test Condition Min Typ Max Units

VCC1 Supply Voltage 1.8 3.6 V
VCC2 Supply Voltage 2.7 5.5 V
VCC3 Supply Voltage 4.5 5.5 V
ICC1 Supply Current VCC = 5.0V READ at 400 kHz 1.0 2.0 mA
ICC2 Supply Current VCC = 5.0V WRITE at 400 kHz 2.0 3.0 mA

Standby Current VCC = 1.8V 0.2 µA

ISB1 VIN = VCC or VSS
(1.8V option) VCC = 3.6V 2.0

Standby Current VCC = 2.7V 0.5 µA

ISB2 VIN = VCC or VSS
(2.7V option) VCC = 5.5V 6.0
Standby Current
ISB3 VCC = 4.5 - 5.5V VIN = VCC or VSS 6.0 µA
(5.0V option)
ILI Input Leakage Current VIN = VCC or VSS 0.10 3.0 µA
ILO Output Leakage Current VOUT = VCC or VSS 0.05 3.0 µA
VIL Input Low Level(Note:) -0.6 VCC x 0.3 V
VIH Input High Level(Note:) VCC x 0.7 VCC + 0.5 V
VOL2 Output Low Level VCC = 3.0V IOL = 2.1 mA 0.4 V
VOL1 Output Low Level VCC = 1.8V IOL = 0.15 mA 0.2 V
Note: VIL min and VIH max are reference only and are not tested

3
AC Characteristics
Applicable over recommended operating range from TA = -40°C to +85°C, VCC = +1.8V to +5.5V, CL = 100 pF (unless oth-
erwise noted). Test conditions are listed in Note 2.

1.8-volt 2.7-volt 5.0-volt

Symbol Parameter Min Max Min Max Min Max Units
fSCL Clock Frequency, SCL 100 400 1000 kHz
tLOW Clock Pulse Width Low 4.7 1.3 0.6 µs
tHIGH Clock Pulse Width High 4.0 1.0 0.4 µs
tAA Clock Low to Data Out Valid 0.1 4.5 0.05 0.9 0.05 0.55 µs
Time the bus must be free before a new
tBUF 4.7 1.3 0.5 µs
transmission can start(1)
tHD.STA Start Hold Time 4.0 0.6 0.25 µs
tSU.STA Start Set-up Time 4.7 0.6 0.25 µs
tHD.DAT Data In Hold Time 0 0 0 µs
tSU.DAT Data In Set-up Time 200 100 100 ns
tR Inputs Rise Time (1)
1.0 0.3 0.3 µs
(1)
tF Inputs Fall Time 300 300 100 ns
tSU.STO Stop Set-up Time 4.7 0.6 0.25 µs
tDH Data Out Hold Time 100 50 50 ns
tWR Write Cycle Time 20 10 10 ms
Write
Endurance(1) 5.0V, 25°C, Page Mode 100K 100K 100K
Cycles
Notes: 1. This parameter is characterized and is not 100% tested.
2. AC measurement conditions:
RL (connects to VCC): 1.3KΩ (2.7V, 5V), 10KΩ (1.8V)
Input pulse voltages: 0.3VCC to 0.7VCC
Input rise and fall times: ≤50ns
Input and output timing reference voltages: 0.5VCC

Device Operation
CLOCK and DATA TRANSITIONS: The SDA pin is nor- ACKNOWLEDGE: All addresses and data words are seri-
mally pulled high with an external device. Data on the SDA ally transmitted to and from the EEPROM in 8-bit words.
pin may change only during SCL low time periods (refer to The EEPROM sends a zero during the ninth clock cycle to
Data Validity timing diagram). Data changes during SCL acknowledge that it has received each word.
high periods will indicate a start or stop condition as defined STANDBY MODE: The AT24C128/256 features a low
below. power standby mode which is enabled: a) upon power-up
START CONDITION: A high-to-low transition of SDA with and b) after the receipt of the STOP bit and the completion
SCL high is a start condition which must precede any other of any internal operations.
command (refer to Start and Stop Definition timing dia- MEMORY RESET: After an interruption in protocol, power
gram). loss or system reset, any 2-wire part can be reset by follow-
STOP CONDITION: A low-to-high transition of SDA with ing these steps: (a) Clock up to 9 cycles, (b) look for SDA
SCL high is a stop condition. After a read sequence, the high in each cycle while SCL is high and then (c) create a
stop command will place the EEPROM in a standby power start condition as SDA is high.
mode (refer to Start and Stop Definition timing diagram).

4 AT24C128/256
 AT24C128/256

Bus Timing (SCL: Serial Clock, SDA: Serial Data I/O)

Write Cycle Timing (SCL: Serial Clock, SDA: Serial Data I/O)

SCL

SDA 8th BIT ACK

WORD n (1)
tWR

STOP START
CONDITION CONDITION
Note: 1. The write cycle time tWR is the time from a valid stop condition of a write sequence to the end of the internal clear/write
cycle.

5
Data Validity

Start and Stop Definition

Output Acknowledge

6 AT24C128/256
 AT24C128/256

Device Addressing data word address will “roll over” and previous data will be
overwritten. The address “roll over” during write is from the
The 128K/256K EEPROM requires an 8-bit device address
last byte of the current page to the first byte of the same
word following a start condition to enable the chip for a read
page.
or write operation (refer to Figure 1). The device address
word consists of a mandatory one, zero sequence for the ACKNOWLEDGE POLLING: Once the internally-timed
first five most significant bits as shown. This is common to write cycle has started and the EEPROM inputs are dis-
all 2-wire EEPROM devices. abled, acknowledge polling can be initiated. This involves
sending a start condition followed by the device address
The 128K/256K uses the two device address bits A1, A0 to
word. The read/write bit is representative of the operation
allow as many as four devices on the same bus. These bits
desired. Only if the internal write cycle has completed will
must compare to their corresponding hardwired input pins.
the EEPROM respond with a zero, allowing the read or
The A1 and A0 pins use an internal proprietary circuit that
write sequence to continue.
biases them to a logic low condition if the pins are allowed
to float.
Read Operations
The eighth bit of the device address is the read/write opera-
tion select bit. A read operation is initiated if this bit is high Read operations are initiated the same way as write opera-
and a write operation is initiated if this bit is low. tions with the exception that the read/write select bit in the
device address word is set to one. There are three read
Upon a compare of the device address, the EEPROM will operations: current address read, random address read
output a zero. If a compare is not made, the device will and sequential read.
return to a standby state.
CURRENT ADDRESS READ: The internal data word
DATA SECURITY: The AT24C128/256 has a hardware address counter maintains the last address accessed dur-
data protection scheme that allows the user to write protect ing the last read or write operation, incremented by one.
the whole memory when the WP pin is at VCC. This address stays valid between operations as long as the
chip power is maintained. The address “roll over” during
Write Operations read is from the last byte of the last memory page, to the
BYTE WRITE: A write operation requires two 8-bit data first byte of the first page.
word addresses following the device address word and Once the device address with the read/write select bit set
acknowledgment. Upon receipt of this address, the to one is clocked in and acknowledged by the EEPROM,
EEPROM will again respond with a zero and then clock in the current address data word is serially clocked out. The
the first 8-bit data word. Following receipt of the 8-bit data microcontroller does not respond with an input zero but
word, the EEPROM will output a zero. The addressing does generate a following stop condition (refer to Figure 4).
device, such as a microcontroller, then must terminate the
RANDOM READ: A random read requires a “dummy” byte
write sequence with a stop condition. At this time the
write sequence to load in the data word address. Once the
EEPROM enters an internally-timed write cycle, tWR, to the
device address word and data word address are clocked in
nonvolatile memory. All inputs are disabled during this
and acknowledged by the EEPROM, the microcontroller
write cycle and the EEPROM will not respond until the write
must generate another start condition. The microcontroller
is complete (refer to Figure 2).
now initiates a current address read by sending a device
PAGE WRITE: The 128K/256K EEPROM is capable of 64- address with the read/write select bit high. The EEPROM
byte page writes. acknowledges the device address and serially clocks out
A page write is initiated the same way as a byte write, but the data word. The microcontroller does not respond with a
the microcontroller does not send a stop condition after the zero but does generate a following stop condition (refer to
first data word is clocked in. Instead, after the EEPROM Figure 5).
acknowledges receipt of the first data word, the microcon- SEQUENTIAL READ: Sequential reads are initiated by
troller can transmit up to 63 more data words. The either a current address read or a random address read.
EEPROM will respond with a zero after each data word After the microcontroller receives a data word, it responds
received. The microcontroller must terminate the page with an acknowledge. As long as the EEPROM receives an
write sequence with a stop condition (refer to Figure 3). acknowledge, it will continue to increment the data word
The data word address lower 6 bits are internally incre- address and serially clock out sequential data words. When
mented following the receipt of each data word. The higher the memory address limit is reached, the data word
data word address bits are not incremented, retaining the address will “roll over” and the sequential read will con-
memory page row location. When the word address, inter- tinue. The sequential read operation is terminated when
nally generated, reaches the page boundary, the following the microcontroller does not respond with a zero but does
byte is placed at the beginning of the same page. If more generate a following stop condition (refer to Figure 6).
than 64 data words are transmitted to the EEPROM, the

7
Figure 1. Device Address

Figure 2. Byte Write

Figure 3. Page Write

(* = DON’T CARE bit)

(† = DON’T CARE bit for the 128K)
Figure 4. Current Address Read

8 AT24C128/256
 AT24C128/256

Figure 5. Random Read

(* = DON’T CARE bit)

(† = DON’T CARE bit for the 128K)
Figure 6. Sequential Read

9
AT24C128 Ordering Information
tWR (max) ICC (max) ISB (max) fMAX
(ms) µA)
(µ µA)
(µ (kHz) Ordering Code Package Operation Range
10 3000 6.0 1000 AT24C128-10PC 8P3 Commercial
AT24C128N-10SC 8S1 (0°C to 70°C)
AT24C128W-10SC 8S2
AT24C128-10CC 8C
AT24C128C1-10CC 8C1
AT24C128T1-10TC 14T
3000 6.0 1000 AT24C128-10PI 8P3 Industrial
AT24C128N-10SI 8S1 (-40°C to 85°C)
AT24C128W-10SI 8S2
AT24C128-10CI 8C
AT24C128C1-10CI 8C1
AT24C128T1-10TI 14T
10 1500 0.5 400 AT24C128-10PC-2.7 8P3 Commercial
AT24C128N-10SC-2.7 8S1 (0°C to 70°C)
AT24C128W-10SC-2.7 8S2
AT24C128-10CC-2.7 8C
AT24C128C1-10CC-2.7 8C1
AT24C128T1-10TC-2.7 14T
1500 0.5 400 AT24C128-10PI-2.7 8P3 Industrial
AT24C128N-10SI-2.7 8S1 (-40°C to 85°C)
AT24C128W-10SI-2.7 8S2
AT24C128-10CI-2.7 8C
AT24C128C1-10CI-2.7 8C1
AT24C128T1-10TI-2.7 14T

Package Type
8C 8-Lead, 0.230" Wide, Leadless Array Package (LAP)
8C1 8-Lead, 0.300" Wide, Leadless Array Package (LAP)
8P3 8-Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP)
8S1 8-Lead, 0.150" Wide, Plastic Gull Wing Small Outline Package (JEDEC SOIC)
8S2 8-Lead, 0.200" Wide, Plastic Gull Wing Small Outline Package (EIAJ SOIC)
14T 14-Lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP)
Options
Blank Standard Operation (4.5V to 5.5V)
-2.7 Low-Voltage (2.7V to 5.5V)
-1.8 Low-Voltage (1.8V to 3.6V)

10 AT24C128/256
 AT24C128/256

AT24C128 Ordering Information (Continued)

tWR (max) ICC (max) ISB (max) fMAX
(ms) µA)
(µ µA)
(µ (kHz) Ordering Code Package Operation Range
20 800 0.2 100 AT24C128-10PC-1.8 8P3 Commercial
AT24C128N-10SC-1.8 8S1 (0°C to 70°C)
AT24C128W-10SC-1.8 8S2
AT24C128-10CC-1.8 8C
AT24C128C1-10CC-1.8 8C1
AT24C128T1-10TC-1.8 14T
800 0.2 100 AT24C128-10PI-1.8 8P3 Industrial
AT24C128N-10SI-1.8 8S1 (-40°C to 85°C)
AT24C128W-10SI-1.8 8S2
AT24C128-10CI-1.8 8C
AT24C128C1-10CI-1.8 8C1
AT24C128T1-10TI-1.8 14T

Package Type
8C 8-Lead, 0.230" Wide, Leadless Array Package (LAP)
8C1 8-Lead, 0.300" Wide, Leadless Array Package (LAP)
8P3 8-Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP)
8S1 8-Lead, 0.150" Wide, Plastic Gull Wing Small Outline Package (JEDEC SOIC)
8S2 8-Lead, 0.200" Wide, Plastic Gull Wing Small Outline Package (EIAJ SOIC)
14T 14-Lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP)
Options
Blank Standard Operation (4.5V to 5.5V)
-2.7 Low-Voltage (2.7V to 5.5V)
-1.8 Low-Voltage (1.8V to 3.6V)

11
AT24C256 Ordering Information
tWR (max) ICC (max) ISB (max) fMAX
(ms) µA)
(µ µA)
(µ (kHz) Ordering Code Package Operation Range
10 3000 6.0 1000 AT24C256-10PC 8P3 Commercial
AT24C256N-10SC 8S1 (0°C to 70°C)
AT24C256W-10SC 8S2
AT24C256-10CC 8C
AT24C256C1-10CC 8C1
AT24C256T1-10TC 14T
3000 6.0 1000 AT24C256-10PI 8P3 Industrial
AT24C256N-10SI 8S1 (-40°C to 85°C)
AT24C256W-10SI 8S2
AT24C256-10CI 8C
AT24C256C1-10CI 8C1
AT24C256T1-10TI 14T
10 1500 0.5 400 AT24C256-10PC-2.7 8P3 Commercial
AT24C256N-10SC-2.7 8S1 (0°C to 70°C)
AT24C256W-10SC-2.7 8S2
AT24C256-10CC-2.7 8C
AT24C256C1-10CC-2.7 8C1
AT24C256T1-10TC-2.7 14T
1500 0.5 400 AT24C256-10PI-2.7 8P3 Industrial
AT24C256N-10SI-2.7 8S1 (-40°C to 85°C)
AT24C256W-10SI-2.7 8S2
AT24C256-10CI-2.7 8C
AT24C256C1-10CI-2.7 8C1
AT24C256T1-10TI-2.7 14T

Package Type
8C 8-Lead, 0.230" Wide, Leadless Array Package (LAP)
8C1 8-Lead, 0.300" Wide, Leadless Array Package (LAP)
8P3 8-Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP)
8S1 8-Lead, 0.150" Wide, Plastic Gull Wing Small Outline Package (JEDEC SOIC)
8S2 8-Lead, 0.200" Wide, Plastic Gull Wing Small Outline Package (EIAJ SOIC)
14T 14-Lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP)
Options
Blank Standard Operation (4.5V to 5.5V)
-2.7 Low-Voltage (2.7V to 5.5V)
-1.8 Low-Voltage (1.8V to 3.6V)

12 AT24C128/256
 AT24C128/256

AT24C256 Ordering Information (Continued)

tWR (max) ICC (max) ISB (max) fMAX
(ms) µA)
(µ µA)
(µ (kHz) Ordering Code Package Operation Range
20 800 0.2 100 AT24C256-10PC-1.8 8P3 Commercial
AT24C256N-10SC-1.8 8S1 (0°C to 70°C)
AT24C256W-10SC-1.8 8S2
AT24C256-10CC-1.8 8C
AT24C256C1-10CC-1.8 8C1
AT24C256T1-10TC-1.8 14T
800 0.2 100 AT24C256-10PI-1.8 8P3 Industrial
AT24C256N-10SI-1.8 8S1 (-40°C to 85°C)
AT24C256W-10SI-1.8 8S2
AT24C256-10CI-1.8 8C
AT24C256C1-10CI-1.8 8C1
AT24C256T1-10TI-1.8 14T

Package Type
8C 8-Lead, 0.230" Wide, Leadless Array Package (LAP)
8C1 8-Lead, 0.300" Wide, Leadless Array Package (LAP)
8P3 8-Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP)
8S1 8-Lead, 0.150" Wide, Plastic Gull Wing Small Outline Package (JEDEC SOIC)
8S2 8-Lead, 0.200" Wide, Plastic Gull Wing Small Outline Package (EIAJ SOIC)
14T 14-Lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP)
Options
Blank Standard Operation (4.5V to 5.5V)
-2.7 Low-Voltage (2.7V to 5.5V)
-1.8 Low-Voltage (1.8V to 3.6V)

13
 AT24C128/256

Packaging Information
8C, 8-Lead, 0.230" Wide, Leadless Array Package 8C1, 8-Lead, 0.300" Wide, Leadless Array Package
(LAP) (LAP)
Dimensions in Inches and (Millimeters) Dimensions in Inches and (Millimeters)

SIDE SIDE
TOP VIEW VIEW TOP VIEW VIEW

5.15 (0.203) 5.15 (0.203)

4.85 (0.191) 4.85 (0.191)

6.15 (0.242) 1.30 (0.051) 8.15 (0.321) 1.30 (0.051)

5.85 (0.230) 1.00 (0.039) 7.85 (0.309) 1.00 (0.039)
0.42 (0.017) 0.42 (0.017)
0.34 (0.013) 0.34 (0.013)

BOTTOM VIEW BOTTOM VIEW

8 1 8 1

7 2 0.41 (0.016) TYP 7 2 0.41 (0.016) TYP

1.27 (0.050) TYP 1.27 (0.050) TYP
6 3 6 3

5 4 5 4

0.64 (0.025) TYP 0.64 (0.025) TYP

8P3, 8-Lead, 0.300" Wide, 8S1, 8-Lead, 0.150" Wide,

Plastic Dual Inline Package (PDIP) Plastic Gull Wing Small Outline (JEDEC SOIC)
Dimensions in Inches and (Millimeters) Dimensions in Inches and (Millimeters)
JEDEC STANDARD MS-001 BA

.400 (10.16)
.020 (.508)
.355 (9.02)
.013 (.330)
PIN
1

.280 (7.11) .157 (3.99) .244 (6.20)

.240 (6.10) .150 (3.81) .228 (5.79)
PIN 1
.037 (.940)
.300 (7.62) REF .027 (.690)
.050 (1.27) BSC
.210 (5.33) MAX .100 (2.54) BSC
SEATING
PLANE .196 (4.98)
.189 (4.80)
.015 (.380) MIN .068 (1.73)
.150 (3.81)
.053 (1.35)
.115 (2.92) .022 (.559)
.070 (1.78) .014 (.356)
.045 (1.14)
.010 (.254)
.325 (8.26) .004 (.102)
.300 (7.62)
0
REF 0
.012 (.305) 15 REF .010 (.254)
8
.008 (.203) .007 (.203)
.430 (10.9) MAX
.050 (1.27)
.016 (.406)

14
Packaging Information
8S2, 8-Lead, 0.200" Wide, 14T, 14-Lead, 0.170" Wide, Thin Shrink Small
Plastic Gull Wing Small Outline (EIAJ SOIC) Outline Package (TSSOP)
Dimensions in Inches and (Millimeters) Dimensions in Inches and (Millimeters)

.020 (.508) INDEX MARK

PIN
.012 (.305) 1

.213 (5.41) .330 (8.38)

.205 (5.21) .300 (7.62) 4.50 (.177) 6.50 (.256)
PIN 1 6.25 (.246)
4.30 (.169)

.050 (1.27) BSC

.212 (5.38)
.203 (5.16) 5.10 (.201)
4.90 (.193) 1.20 (.047) MAX
.080 (2.03)
.070 (1.78)

.650 (.026) BSC

0.15 (.006) SEATING
.013 (.330) 0.30 (.012) 0.05 (.002) PLANE
0.19 (.007)
.004 (.102)

0 0 0.20 (.008)
REF .010 (.254) REF 0.09 (.004)
8 8
.007 (.178)
0.75 (.030)
.035 (.889) 0.45 (.018)
.020 (.508)
*Controlling dimension: millimeters

15 AT24C128/256
This datasheet has been downloaded from:

www.DatasheetCatalog.com

Datasheets for electronic components.