Crystalfontz America, Inc.

CUSTOMER

MODEL CFAH1602B-YMI-JP

APPROVAL BY: DATA:

SALES BY APPROVED BY CHECKED BY PREPARED BY

Crystalfontz America, Inc.

12412 East Saltese Avenue
Spokane Valley, WA 99216-0357

Phone: (888) 206-9720

Fax: (509) 892-1203
Email: techinfo@crystalfontz.com
URL: www.crystalfontz.com
Contents
1.Module Classification Information

2.Precautions in use of LCD Modules

3.General Specification

4.Absolute Maximum Ratings

5.Electrical Characteristics

6.Optical Characteristics

7.Interface Pin Function

8.Contour Drawing & Block Diagram

9.Function Description

10.Character Generator ROM Pattern

11.Instruction Table

12.Timing Characteristics

13.Initializing of LCM

14.Quality Assurance

15.Reliability

16.Backlight Information
1.Module Classification Information

WH 1602 B－Y M I－ JP
cd e f ghi j
c Brand：WINSTAR DISPLAY CORPORATION
d Display Type：H→ Character Type, G→ Graphic Type
e Display Font：Character 16 words, 2Lines.
f Model serials no.
g Backlight Type： N→ Without backlight
A→ LED, Amber
B→ EL, Blue green
R→ LED, Red
D→ EL, Green
O→ LED, Orange
W→ EL, White
G→ LED, Green
F→ CCFL, White
Y→ LED, Yellow Green
h LCD Mode： B→ TN Positive, Gray T→ FSTN Negative
N→ TN Negative,
G→ STN Positive, Gray
Y→ STN Positive, Yellow Green
M→ STN Negative, Blue
F→ FSTN Positive
i LCD Polarize A→ Reflective, N.T, 6:00 H→ Transflective, W.T,6:00
Type/ Temperature
range/ View D→ Reflective, N.T, 12:00 K→ Transflective, W.T,12:00
direction G→ Reflective, W. T, 6:00 C→ Transmissive, N.T,6:00
J→ Reflective, W. T, 12:00 F→ Transmissive, N.T,12:00
B→ Transflective, N.T,6:00 I→ Transmissive, W. T, 6:00
E→ Transflective, N.T.12:00 L→ Transmissive, W.T,12:00
j Special Code JP : English and Japanese standard font
2.Precautions in use of LCD Modules

(1)Avoid applying excessive shocks to the module or making any alterations or modifications to
it.
(2)Don’t make extra holes on the printed circuit board, modify its shape or change the
components of LCD module.
(3)Don’t disassemble the LCM.
(4)Don’t operate it above the absolute maximum rating.
(5)Don’t drop, bend or twist LCM.
(6)Soldering: only to the I/O terminals.
(7)Storage: please storage in anti-static electricity container and clean environment.

3.General Specification

Item Dimension Unit

Number of Characters 16 characters x 2 Lines －

Module dimension 80.0 x 36.0 x 13.2(MAX) mm

View area 66.0 x 16.0 mm
Active area 56.21 x 11.5 mm
Dot size 0.56 x 0.66 mm
Dot pitch 0.60 x 0.70 mm
Character size 2.96 x 5.56 mm
Character pitch 3.55 x 5.94 mm
LCD type STN, Negative, Transmissive, Blue
Duty 1/16
View direction 6 o’clock
Backlight Type LED Yellow Green,
4.Absolute Maximum Ratings

Item Symbol Min Typ Max Unit

Operating Temperature TOP -20 － +70 ℃

Storage Temperature TST -30 － +80 ℃

Input Voltage VI VSS － VDD V

Supply Voltage For Logic VDD-VSS -0.3 － 7 V

Supply Voltage For LCD VDD-V0 -0.3 － 13 V

5.Electrical Characteristics

Item Symbol Condition Min Typ Max Unit

Supply Voltage For Logic VDD-VSS － 4.5 － 5.5 V

Ta=0℃ － － 4.2
V
Ta=25℃ －
Supply Voltage For LCD VDD-V0 － 3.8 V

－ － V
Ta=50℃ 3.6

Input High Volt. VIH － 2.2 － VDD V

Input Low Volt. VIL － － － 0.6 V

Output High Volt. VOH － 2.4 － － V

Output Low Volt. VOL － － － 0.4 V

Supply Current IDD VDD=5V － 1.2 － mA

6.Optical Characteristics

Item Symbol Condition Min Typ Max Unit

(V)θ CR≧ 2 10 － 105 deg

View Angle
(H)φ CR≧ 2 -30 － 30 deg

Contrast Ratio CR － － 3 － －

T rise － － 150 200 ms

Response Time
T fall － － 150 200 ms

Definition of Operation Voltage (Vop) Definition of Response Time ( Tr , Tf )

Non-selected Non-selected
Conition Selected Conition Conition
Intensity Selected Wave
100％ Non-selected Wave Intensity

10％
Cr Max
Cr = Lon / Loff 90％
100％

Vop
Driving Voltage(V) Tr Tf

[positive type] [positive type]

Conditions :

Operating Voltage : Vop Viewing Angle(θ ，φ ) : 0°， 0°

Frame Frequency : 64 HZ Driving Waveform : 1/N duty , 1/a bias

Definition of viewing angle(CR≧ 2)

θ b
θ f
φ = 180°
θ l
θ r

φ = 270° φ = 90°

φ = 0°
7.Interface Pin Function

Pin No. Symbol Level Description

1 VSS 0V Ground
2 VDD 5.0V Supply Voltage for logic
3 VO (Variable) Operating voltage for LCD
4 RS H/L H: DATA, L: Instruction code
5 R/W H/L H: Read(MPU→ Module) L: Write(MPU→ Module)

6 E H,H→ L Chip enable signal

7 DB0 H/L Data bit 0

8 DB1 H/L Data bit 1
9 DB2 H/L Data bit 2
10 DB3 H/L Data bit 3
11 DB4 H/L Data bit 4
12 DB5 H/L Data bit 5
13 DB6 H/L Data bit 6
14 DB7 H/L Data bit 7
15 A － LED +

16 K － LED－
8.Contour Drawing &Block Diagram

80.0 0.5
1 Vss
4.95 71.2
7.55 66.0(VA) 2 Vdd
12.45 56.21(AA) 3 Vo
8.0 P2.54*15=38.1 H1Max 4 RS
12.55
10.3

18.3
2.5

2.0
5.7

1.8 16- 1.0 PTH 2.4 H2 5 R/W

6 E
1 16

10.16 13.22
7 DB0
A
8 DB1
36.0 0.5

16.0(VA)
11.5(AA)

(P2.54*4)
31.0
25.2

9 DB2
10 DB3
K
4- 1.0 11 DB4
12 DB5
40.55 4- 2.5 PTH 1.6
2.5 75.0 4- 5.0 PAD 13 DB6
14 DB7
LED H/L B/L
High 15 A/Vee
3.55 H1 13.2 16 K
2.96 0.59 H2 8.6
0.6
0.56
0.66
0.7
5.56
5.94

The non-specified tolerance of dimension is 0.3mm.

0.38

DOT SIZE

LED B/L Drive Method

1.Drive from A,K

RS Com1~16
R
R/W Controller/Com Driver A
MPU B/L
K
E
DB0~DB7
HD44780
or 16X2 LCD
80 series Equivalent
or
68 series 2.Drive from pin15, pin16
Power Circuit

Seg1~40 R R
Vdd PIN15 A
Seg41~80 B/L
Bias and

Vo PIN16 K
VR D Seg Driver
10K~20K Vss LCM
M (Will never get Vee output from pin15)
CL1 3.Drive from Vdd,Vss
Generator

CL2
Vee
N.V.

Vdd,Vss,V1~V5 R
A
External contrast adjustment.
Optional B/L
K
LCM
(Contrast performance may go down.)

Recommanded Value
VLED= 4.2V, ILED= 130mA
R= 4.7Ω (1/2 Watt)

Character located 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
DDRAM address 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
DDRAM address 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F
9.Function Description

The LCD display Module is built in a LSI controller, the controller has two 8-bit registers, an
instruction register (IR) and a data register (DR).
The IR stores instruction codes, such as display clear and cursor shift, and address information
for display data RAM (DDRAM) and character generator (CGRAM). The IR can only be written
from the MPU. The DR temporarily stores data to be written or read from DDRAM or
CGRAM. When address information is written into the IR, then data is stored into the DR from
DDRAM or CGRAM. By the register selector (RS) signal, these two registers can be selected.

RS R/W Operation
0 0 IR write as an internal operation (display clear, etc.)
0 1 Read busy flag (DB7) and address counter (DB0 to DB7)
1 0 Write data to DDRAM or CGRAM (DR to DDRAM or CGRAM)
1 1 Read data from DDRAM or CGRAM (DDRAM or CGRAM to DR)

Busy Flag (BF)

When the busy flag is 1, the controller LSI is in the internal operation mode, and the next
instruction will not be accepted. When RS=0 and R/W=1, the busy flag is output to DB7. The
next instruction must be written after ensuring that the busy flag is 0.

Address Counter (AC)

The address counter (AC) assigns addresses to both DDRAM and CGRAM

Display Data RAM (DDRAM)

This DDRAM is used to store the display data represented in 8-bit character codes. Its extended
capacity is 80×8 bits or 80 characters. Below figure is the relationships between DDRAM
addresses and positions on the liquid crystal display.

High bits Low bits

Example: DDRAM addresses 4E

AC
AC6 AC5 AC4 AC3 AC2 AC1 AC0 1 0 0 1 1 1 0
(hexadecimal)
 Display position DDRAM address

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F
2-Line by 16-Character Display

Character Generator ROM (CGROM)

The CGROM generate 5×8 dot or 5×10 dot character patterns from 8-bit character codes. See
Table 2.

Character Generator RAM (CGRAM)

In CGRAM, the user can rewrite character by program. For 5×8 dots, eight character patterns
can be written, and for 5×10 dots, four character patterns can be written.
Write into DDRAM the character code at the addresses shown as the left column of table 1. To
show the character patterns stored in CGRAM.
Relationship between CGRAM Addresses, Character Codes (DDRAM) and Character
patterns

Table 1.

F o r 5 * 8 d o t c h a ra c te r p a tte rn s
C h a ra c te r C o d e s C h a ra c te r P a tte rn s
C G R A M A d d re ss
( D D R A M d a ta ) ( C G R A M d a ta )

7 6 5 4 3 2 1 0 5 4 3 2 1 0 7 6 5 4 3 2 1 0
H ig h Low H ig h Low H ig h Low
0 0 0 * * * 0
0 0 1 * * * 0 0 0
0 1 0 * * * 0 0 0
0 1 1 * * * 0 C h a ra c te r
0 0 0 1 0 0 * * * 0 0 0 p a tte rn ( 1 )
0 0 0 0 * 0 0 0
1 0 1 * * * 0 0 0
1 1 0 * * * 0 0 0
1 1 1 * * * 0 0 0 0 0 C u rs o r p a tte rn
0 0 0 * * * 0 0 0
0 0 1 * * * 0 0 0
0 1 0 * * *
0 1 1 * * * 0 0 0 0 C h a ra c te r
0 0 0 0 * 0 0 1 0 0 1 1 0 0 * * * p a tte rn ( 2 )
1 0 1 * * * 0 0 0 0
1 1 0 * * * 0 0 0 0
1 1 1 * * * 0 0 0 0 0 C u rs o r p a tte rn
0 0 0 * * *
0 0 1

0 0 0 0 * 1 1 1 1 1 1 1 0 0
1 0 1
1 1 0
1 1 1 * * *
F o r 5 * 1 0 d o t c h a ra c te r p a tte rn s
C h a ra c te r C o d e s C h a ra c te r P a tte rn s
C G R A M A d d re ss
( D D R A M d a ta ) ( C G R A M d a ta )

7 6 5 4 3 2 1 0 5 4 3 2 1 0 7 6 5 4 3 2 1 0
H ig h Low H ig h Low H ig h Low
0 0 0 0 * * * 0 0 0 0 0
0 0 0 1 * * * 0 0 0 0 0
0 0 1 0 * * * 0 0
0 0 1 1 * * * 0 0
0 1 0 0 * * * 0 0 0
0 0 0 0 * 0 0 0 0 0 0 1 0 1 * * * 0 0 0
0 1 1 0 * * * 0 C h a ra c te r
0 1 1 1 * * * 0 0 0 0 p a tte rn
1 0 0 0 * * * 0 0 0 0
1 0 0 1 * * * 0 0 0 0
1 0 1 0 * * * 0 0 0 0 0 C u rs o r p a tte rn

1 1 1 1 * * * * * * * *

: " H ig h "
 10.Character Generator ROM Pattern

Table.2
Upper
4 bit
Lower LLLL LLLH LLHL LLHH LHLL LHLH LHHL LHHH HLLL HLLH HLHL HLHH HHLL HHLH HHHL HHHH
4 bit
CG
RAM
LLLL (1)

LLLH (2)

LLHL (3)

LLHH (4)

LHLL (5)

LHLH (6)

LHHL (7)

LHHH (8)

HLLL (1)

HLLH (2)

HLHL (3)

HLHH (4)

HHLL (5)

HHLH (6)

HHHL (7)

HHHH (8)
11.Instruction Table

Instruction Code
Execution time
Instruction Description
(fosc=270Khz)
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

Write “00H” to DDRAM and set

Clear Display 0 0 0 0 0 0 0 0 0 1 1.53ms
DDRAM address to “00H” from AC
Set DDRAM address to “00H” from AC
and return cursor to its original position
Return Home 0 0 0 0 0 0 0 0 1 － 1.53ms
if shifted. The contents of DDRAM are
not changed.
Entry Mode Assign cursor moving direction and
0 0 0 0 0 0 0 1 I/D SH 39μ s
Set enable the shift of entire display.
Display
Set display (D), cursor (C), and blinking
ON/OFF 0 0 0 0 0 0 1 D C B 39μ s
of cursor (B) on/off control bit.
Control
Set cursor moving and display shift
Cursor or
0 0 0 0 0 1 S/C R/L － － control bit, and the direction, without 39μ s
Display Shift
changing of DDRAM data.
Set interface data length
(DL:8-bit/4-bit), numbers of display line
Function Set 0 0 0 0 1 DL N F － － 39μ s
(N:2-line/1-line)and, display font type
(F:5×11 dots/5×8 dots)
Set CGRAM
0 0 0 1 AC5 AC4 AC3 AC2 AC1 AC0 Set CGRAM address in address counter. 39μ s
Address
Set DDRAM
0 0 1 AC6 AC5 AC4 AC3 AC2 AC1 AC0 Set DDRAM address in address counter. 39μ s
Address
Whether during internal operation or not
Read Busy
can be known by reading BF. The
Flag and 0 1 BF AC6 AC5 AC4 AC3 AC2 AC1 AC0 0μ s
contents of address counter can also be
Address
read.
Write Data to Write data into internal RAM
1 0 D7 D6 D5 D4 D3 D2 D1 D0 43μ s
RAM (DDRAM/CGRAM).
Read Data Read data from internal RAM
1 1 D7 D6 D5 D4 D3 D2 D1 D0 43μ s
from RAM (DDRAM/CGRAM).

＊ ”－”：don’t care
12.Timing Characteristics
12.1 Write Operation

VIH1 VIH1
RS VIL1 VIL1

tAS tAH

R/W VIL1 VIL1

PWEH tAH
tEf
VIH1 VIH1
E VIL1 VIL1 VIL1
tEr tDSW tH
VIH1 VIH1
DB0 to DB7 VIL1 Valid data VIL1
tcycE

Ta=25℃, VDD=5.0± 0.5V

Item Symbol Min Typ Max Unit

Enable cycle time tcycE 400 － － ns

Enable pulse width (high level) PWEH 150 － － ns

Enable rise/fall time tEr,tEf － － 25 ns

Address set-up time (RS, R/W to E) tAS 30 － － ns

Address hold time tAH 10 － － ns

Data set-up time tDSW 40 － － ns

Data hold time tH 10 － － ns

12.2 Read Operation

VIH1 VIH1
RS VIL1 VIL1

tAS tAH
VIH1 VIH1
R/W
PWEH tAH
tEf
VIH1 VIH1
E VIL1 VIL1 VIL1
tEr tDDR tDHR
VOH1 VOH1
DB0 to DB7 VOL1*
Valid data
*VOL1
tcycE

NOTE: *VOL1 is assumed to be 0.8V at 2 MHZ operation.

Ta=25℃, VDD=5.0± 0.5V

Item Symbol Min Typ Max Unit

Enable cycle time tcycE 400 － － ns

Enable pulse width (high level) PWEH 150 － － ns

Enable rise/fall time tEr,tEf － － 25 ns

Address set-up time (RS, R/W to E) tAS 30 － － ns

Address hold time tAH 10 － － ns

Data delay time tDDR － － 100 ns

Data hold time tDHR 20 － － ns

13.Initializing of LCM

Power on

Wait for more than 15 ms after VCC rises to 4.5 V

BF can not be checked before this instruction.

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Function set ( Interface is 8 bits long. )
0 0 0 0 1 1 * * * *

Wait for more than 4.1 ms

BF can not be checked before this instruction.

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Function set ( Interface is 8 bits long. )
0 0 0 0 1 1 * * * *

Wait for more than 100 μs

BF can not be checked before this instruction.

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Function set ( Interface is 8 bits long. )
0 0 0 0 1 1 * * * *

BF can be checked after the following instructions.

When BF is not checked , the waiting time between
instructions is longer than execution instruction time.

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Function set ( Interface is 8 bits long. Specify
0 0 0 0 1 1 N F * * the number of display lines and font. )
0 0 0 0 0 0 1 0 0 0 The number of display lines and character font
0 0 0 0 0 0 0 0 0 1 can not be changed after this point.
0 0 0 0 0 0 0 1 I/D S Display off
Display clear
Entry mode set

Initialization ends

8-Bit Ineterface
 Power on

Wait for more than 15 ms after V CC rises to 4.5 V

BF can not be checked before this instruction.

RS R/W DB7 DB6 DB5 DB4
Function set ( Interface is 8 bits long. )
0 0 0 0 1 1

Wait for more than 4.1 ms

BF can not be checked before this instruction.

RS R/W DB7 DB6 DB5 DB4 Function set ( Interface is 8 bits long. )
0 0 0 0 1 1

Wait for more than 100 μs

BF can not be checked before this instruction.

RS R/W DB7 DB6 DB5 DB4
Function set ( Interface is 8 bits long. )
0 0 0 0 1 1

RS R/W DB7 DB6 DB5 DB4 BF can be checked after the following instructions.
0 0 0 0 1 0 When BF is not checked , the waiting time between
0 0 0 0 1 0 instructions is longer than execution instruction time.
0 0 N F * *
Function set ( Set interface to be 4 bits long. )
0 0 0 0 0 0 Interface is 8 bits in length.
0 0 1 0 0 0
0 0 0 0 0 0 Function set ( Interface is 4 bits long. Specify
0 0 0 0 0 1 the number of display lines and character font. )
0 0 0 0 0 0 The number of display lines and character font
0 0 0 0 can not be changed after this point.
I/D S
Display off
Display clear
Entry mode set

Initialization ends

4-Bit Ineterface
14.Quality Assurance

Screen Cosmetic Criteria

Item Defect Judgment Criterion Partition
A)Clear
Size: d mm Acceptable Qty in active area
d ≦ 0.1 Disregard
0.1<d≦ 0.2 6
0.2<d≦ 0.3 2
0.3<d 0
Note: Including pin holes and defective dots which must
1 Spots Minor
be within one pixel size.
B)Unclear
Size: d mm Acceptable Qty in active area
d ≦ 0.2 Disregard
0.2<d≦ 0.5 6
0.5<d≦ 0.7 2
0.7<d 0
Size: d mm Acceptable Qty in active area
d≦ 0.3 Disregard
2 Bubbles in Polarize 0.3<d≦ 1.0 3 Minor
1.0<d≦ 1.5 1
1.5<d 0
In accordance with spots cosmetic criteria. When the light
3 Scratch reflects on the panel surface, the scratches are not to be Minor
remarkable.
Above defects should be separated more than 30mm each
4 Allowable Density Minor
other.
Not to be noticeable coloration in the viewing area of the
LCD panels.
5 Coloration Minor
Back-light type should be judged with back-light on state
only.
15.Reliability

Content of Reliability Test

Environmental Test
Applicable
Test Item Content of Test Test Condition
Standard
High
Endurance test applying the high storage 60℃
Temperature ——
temperature for a long time. 200hrs
storage
Low
Endurance test applying the high storage -10℃
Temperature ——
temperature for a long time. 200hrs
storage
High Endurance test applying the electric stress
50℃
Temperature (Voltage & Current) and the thermal stress ——
Operation to the element for a long time. 200hrs
Low
Endurance test applying the electric stress 0℃
Temperature ——
under low temperature for a long time. 200hrs
Operation
High
Endurance test applying the high
Temperature/ 60℃,90%RH
temperature and high humidity storage for a ——
Humidity 96hrs
long time.
Storage
High Endurance test applying the electric stress
Temperature/ (Voltage & Current) and temperature / 50℃,90%RH
——
Humidity humidity stress to the element for a long 96hrs
Operation time.
Endurance test applying the low and high
temperature cycle.
Temperature -10℃ 25℃ 60℃ -10℃/60℃
——
Cycle 10 cycles
30min 5min 30min
1 cycle
Mechanical Test

10~22Hz→ 1.5mmp-p
Endurance test applying the vibration
Vibration test 22~500Hz→ 1.5G ——
during transportation and using.
Total 0.5hrs
50G Half sign
Constructional and mechanical endurance
wave 11 msedc
Shock test test applying the shock during ——
3 times of each
transportation.
direction
Atmospheric Endurance test applying the atmospheric 115mbar
——
pressure test pressure during transportation by air. 40hrs
Others

VS=800V,RS=1.5kΩ
Static electricity Endurance test applying the electric stress to
CS=100pF ——
test the terminal.
1 time

***Supply voltage for logic system=5V. Supply voltage for LCD system =Operating voltage at 25℃
16.Backlight Information

Specification

PARAMETER SYMBOL MIN TYP MAX UNIT TEST CONDITION

Supply Current ILED ─ 130 ─ mA V=4.2V

Supply Voltage V － 4.2 4.6 V －

Reverse Voltage VR － － 8 V －

Luminous
IV 70 － － CD/M2 ILED=130mA
Intensity

Wave Length λ p ─ 573 － nm ILED=130mA

Life Time － － 100000 － Hr. V≦ 4.6V

Color Yellow Green