®

RT6206A
5.5A, 18V, 650kHz, ACOTTM Synchronous Step-Down Converter
General Description Features
The RT6206A is a synchronous step-down DC/DC converter  ACOTTM Mode Enables Fast Transient Response
with Advanced Constant On-Time (ACOTTM) mode control.  4.5V to 18V Input Voltage Range
It achieves high power density to deliver up to 5.5A output  5.5A Output Current
current from a 4.5V to 18V input supply. The proprietary  35mΩΩ Internal Low Side N-MOSFET
ACOTTM mode offers an optimal transient response over a  Advanced Constant On-Time Control
wide range of loads and all kinds of ceramic capacitors,  Support All Ceramic Capacitors
which allows the device to adopt very low ESR output  Up to 95% Efficiency
capacitor for ensuring performance stabilization. In  Adjustable Output Voltage from 0.765V to 8V
addition, RT6206A keeps an excellent constant switching  Adjustable Soft-Start
frequency under line and load variation and the integrated  Cycle-by-Cycle Current Limit
synchronous power switches with the ACOTTM mode  Input Under-Voltage Lockout
operation provides high efficiency in whole output current  Thermal Shutdown
load range. Cycle-by-cycle current limit provides an  RoHS Compliant and Halogen Free
accurate protection by a valley detection of low side
MOSFET and external soft-start setting eliminates input Applications
current surge during startup. Protection functions include  Industrial and Commercial Low Power Systems
thermal shutdown for RT6206A.  Computer Peripherals
The RT6206A are available in the TSSOP-14 (Exposed  LCD Monitors and TVs
pad), SOP-8 (Exposed Pad) and WDFN-10L 3x3  Green Electronics/Appliances
packages.  Point of Load Regulation for High-Performance DSPs,
FPGAs, and ASICs

Simplified Application Circuit

RT6206A
VIN VIN SW VOUT
VINR*
BOOT
Enable EN FB
Power Good PGOOD*
SS

VREG5
GND* PGND

* : VINR, GND pin for TSSOP-14 (Exposed Pad) only.

* : PGOOD pin for TSSOP-14 (Exposed Pad) and WDFN-10L 3x3 only.

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RT6206A
Ordering Information Pin Configurations
RT6206A (TOP VIEW)
Package Type
EN 8 VIN
CP : TSSOP-14 (Exposed Pad)
FB 2 7 BOOT
PGND
Lead Plating System VREG5 3 6 SW
9
G : Green (Halogen Free and Pb Free) SS 4 5 PGND
UVP Trim Operation
SOP-8 (Exposed Pad)
L : Latch-Off
PWM/PSM Mode
EN 1 10 VIN
A : Force-PWM FB

PGND
2 9 VIN
VREG5 3 8 BOOT
SS 4 7 SW
PGOOD 5 11 6 SW
RT6206A
Package Type WDFN-10L 3x3
SP : SOP-8 (Exposed Pad-Option 2)
QW : WDFN-10L 3x3 (W-Type)
VOUT 14 VINR
Lead Plating System FB 2 13 VIN
G : Green (Halogen Free and Pb Free) VREG5 3 12 BOOT

PGND
SS 4 11 SW
UVP Trim Operation GND 5 10 SW
H : Hiccup PGOOD 6
15
9 PGND
EN 7 8 PGND
PWM/PSM Mode
A : Force-PWM
TSSOP-14 (Exposed Pad)
Note :
Richtek products are :
Marking Information
 RoHS compliant and compatible with the current require-
RT6206AHGSP
ments of IPC/JEDEC J-STD-020.
RT6206AHGSP : Product Number
 Suitable for use in SnPb or Pb-free soldering processes. RT6206AH YMDNN : Date Code
GSPYMDNN

RT6206AHGQW
5K= : Product Code
5K=YM YMDNN : Date Code
DNN

RT6206ALGP
RT6206ALGCP : Product Number
RT6206AL YMDNN : Date Code
GCPYMDNN

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 RT6206A
Functional Pin Description
Pin No.
Pin
Pin Function
TSSOP-14 SOP-8 Name
WDFN-10L 3x3
(Exposed Pad) (Exposed Pad)
Optional Output Voltage Discharge Connection. This
open drain output connects to ground when the
1 -- -- VOUT
device is disabled. If output voltage discharge is
desired, connect VOUT to the output voltage.
Feedback Voltage Input. It is used to regulate the
output of the converter to a set value via an external
2 2 2 FB
resistive voltage divider. The feedback threshold
voltage is 0.765V typically.
Internal Regulator Output. Connect a 1F capacitor
3 3 3 VREG5
to GND to stabilize output voltage.
Soft-Start Time Setting. Connect an external capacitor
4 4 4 SS
between this pin and GND to set the soft- start time.
5 -- -- GND Analog Ground.
6 -- 5 PGOOD Open Drain Power Good Indicator Output.
Enable Control Input. A logic-high enables the
7 1 1 EN converter; a logic-low forces the IC into shutdown
mode reducing the supply current to less than 10A.
Power Ground. The exposed pad must be soldered
8, 9, 15 5, 9 11
PGND to a large PCB and connected to PGND for
(Exposed Pad) (Exposed Pad) (Exposed Pad)
maximum power dissipation.
Switch Node. Connect this pin to an external L-C
10, 11 6 6, 7 SW
filter.
Bootstrap Supply for High Side Gate Driver. Connect
12 7 8 BOOT
a 0.1F capacitor between the BOOT and SW pin.
Power Input. The input voltage range is from 4.5V to
13 8 9, 10 VIN 18V. Must bypass with a suitably large ( 10F x 2)
ceramic capacitor.
Internal Linear Regulator Supply Input. For the
TSSOP-14 (Exposed Pad) package, VINR supplies
14 -- -- VINR power for the internal linear regulator that powers
the IC. Connect VIN to the input voltage and bypass
to ground with a 0.1F ceramic capacitor.

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RT6206A
Function Block Diagram

VINR* VREG5 BOOT

POR &
EN
Reg
Min.
Off-Time VREG5
VIN
VBIAS
VREF

OC Control Driver SW

UV & OV
SW PGND
ZC
VREG5 Ripple
GND*
Gen.
6µA
+ Comparator PGOOD*
SS -
VIN FB - FB -
Comparator 0.9 x VREF +
FB On-Time

* : VINR, GND pin for TSSOP-14 (Exposed Pad) only.

* : PGOOD pin for TSSOP-14 (Exposed Pad) and WDFN-10L 3x3 only.

Operation
The RT6206A is a synchronous step-down converter with UVLO Protection
advanced constant on-time control mode. Using the To protect the chip from operating at insufficient supply
ACOTTM control mode can reduce the output capacitance voltage, the UVLO is needed. When the input voltage of
and provide fast transient response. It can minimize the VIN is lower than the UVLO falling threshold voltage, the
component size without additional external compensation device will be latch-off.
network.
Thermal Shutdown
Internal Regulator
When the junction temperature exceeds the OTP
The regulator provides 5V power to supply the internal threshold value, the IC will shut down the switching
control circuit. Connecting a 1μF ceramic capacitor for operation. Once the junction temperature cools down and
decoupling and stability is required. is lower than the OTP lower threshold, the converter will
automatically resume switching
Soft-Start
In order to prevent the converter output voltage from Power Good (for TSSOP-14 (Exposed Pad) and
overshooting during the startup period, the soft-start WDFN-10L 3x3 only)
function is necessary. The soft-start time is adjustable After soft-start is finished, the power good function will be
and can be set by an external capacitor. activated. When the FB is activated, the PGOOD will
become an open-drain output. If the FB is below, the
PGOOD pin will be pulled low.

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 RT6206A
Absolute Maximum Ratings (Note 1)
 Supply Voltage, VIN ----------------------------------------------------------------------------------------------- −0.3V to 20V
 Switch Voltage, SW ----------------------------------------------------------------------------------------------- −0.8V to (VIN + 0.3V)
< 10ns ---------------------------------------------------------------------------------------------------------------- −5V to 25V
 BOOT to SW -------------------------------------------------------------------------------------------------------- −0.3V to 6V
 EN ---------------------------------------------------------------------------------------------------------------------- −0.3V to 20V
 Other Pins ------------------------------------------------------------------------------------------------------------ −0.3V to 6V
 Power Dissipation, PD @ TA = 25°C
TSSOP-14 (Exposed Pad) --------------------------------------------------------------------------------------- 2.5W
SOP-8 (Exposed Pad) -------------------------------------------------------------------------------------------- 2.041W
WDFN-10L 3x3 ------------------------------------------------------------------------------------------------------ 1.667W
 Package Thermal Resistance (Note 2)
TSSOP-14 (Exposed Pad), θJA --------------------------------------------------------------------------------- 40°C/W
SOP-8 (Exposed Pad), θJA --------------------------------------------------------------------------------------- 49°C/W
SOP-8 (Exposed Pad), θJC -------------------------------------------------------------------------------------- 15°C/W
WDFN-10L 3x3, θJA ------------------------------------------------------------------------------------------------ 60°C/W
WDFN-10L 3x3, θJC ------------------------------------------------------------------------------------------------ 7.5°C/W
 Junction Temperature Range ------------------------------------------------------------------------------------- 150°C
 Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------ 260°C
 Storage Temperature Range ------------------------------------------------------------------------------------- −65°C to 150°C

Recommended Operating Conditions (Note 3)

 Supply Voltage, VIN ----------------------------------------------------------------------------------------------- 4.5V to 18V
 Junction Temperature Range ------------------------------------------------------------------------------------- −40°C to 125°C
 Ambient Temperature Range ------------------------------------------------------------------------------------- −40°C to 85°C

Electrical Characteristics
(VIN = 12V, TA = 25°C, unless otherwise specified)
Parameter Symbol Test Conditions Min Typ Max Unit
Supply Current
Shutdown Current ISHDN VEN = 0V -- 1 10 A
Quiescent Current IQ VEN = 5V, VFB = 0.8V -- 1 1.3 mA
Logic Threshold
Logic-High 2 -- 18
EN Input Voltage V
Logic-Low -- -- 0.4
VFB Voltage
TA = 25C 0.757 0.765 0.773
Feedback Threshold Voltage VFB V
TA = 40C to 85C 0.755 -- 0.775
Feedback Input Current IFB VFB = 0.8V -- 0.01 0.1 A
VREG5 Output
VREG5 Output Voltage VREG5 6V  VIN  18V, 0 < IVREG5  5mA 4.8 5.1 5.4 V
Line Regulation 6V  VIN  18V, IVREG5 = 5mA -- -- 20 mV

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RT6206A
Parameter Symbol Test Conditions Min Typ Max Unit
Load Regulation 0  IVREG5  5mA -- -- 100 mV
Output Current IVREG5 VIN = 6V, VREG5 = 4V, TA = 25C -- 70 -- mA
RDS(ON)
Switch On High-Side RDS(ON)_H (VBOOT  VSW ) = 5.5V -- 80 --
m
Resistance Low-Side RDS(ON)_L -- 35 --
Current Limit
Current Limit ILIM 5.8 6.9 8.4 A
Thermal Shutdown
Thermal Shutdown Threshold TSD Shutdown Temperature -- 150 --
C
Thermal Shutdown Hysteresis TSD -- 20 --
On-Time Timer Control
On-Time tON VOUT = 1.05V -- 135 -- ns
Minimum Off-Time tOFF(MIN) VFB = 0.7V -- 260 310 ns
Soft-Start
SS Charge Current VSS = 0V -- 6 -- A
SS Discharge Current VSS = 0.5V 0.1 0.2 -- mA
UVLO
UVLO Threshold Wake Up VREG5 3.6 3.85 4.1
V
Hysteresis 0.16 0.35 0.47
Output Under Voltage and Over Voltage Protection
OVP Trip Threshold OVP Detect 115 120 125 %
OVP Prop Delay -- 5 -- s
UVP Trip Threshold 65 70 75
%
UVP Hysteresis -- 10 --
UVP Prop Delay -- 250 -- s

UVP Enable Delay tUVPEN Relative to Soft-Start Time -- tSS -- ms

x 1.7
Power Good
VFB Rising 85 90 95
PGOOD Threshold %
VFB Falling -- 85 --
PGOOD Sink Current PGOOD = 0.5V 2.5 5 -- mA

Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is
measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.

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 RT6206A
Typical Application Circuit
L1
RT6206A 1.4µH VOUT
VIN VIN SW
C1 C2 1.05V/5.5A
C6
10µF x 2 0.1µF VINR* 0.1µF C3 R1 C7
BOOT 8.25k 22µF x 2
Input Signal EN FB
Power Good PGOOD* SS R2
R3 C5 22k
100k 3.3nF
VREG5
C4
1µF GND* PGND

* : VINR, GND pin for TSSOP-14 (Exposed Pad) only.

* : PGOOD pin for TSSOP-14 (Exposed Pad) and WDFN-10L 3x3 only.

Table 1. Suggested Component Values (VIN = 12V)

VOUT (V) R1 (k) R2 (k) C3 (pF) L1 (H) C7 (F)
1 6.81 22.1 -- 1.4 22 to 68
1.05 8.25 22.1 -- 1.4 22 to 68
1.2 12.7 22.1 -- 1.4 22 to 68
1.8 30.1 22.1 5 to 22 2 22 to 68
2.5 49.9 22.1 5 to 22 2 22 to 68
3.3 73.2 22.1 5 to 22 2 22 to 68
5 124 22.1 5 to 22 3.3 22 to 68
7 180 22.1 5 to 22 3.3 22 to 68

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RT6206A
Typical Operating Characteristics
Efficiency vs. Output Current Output Voltage vs. Output Current
100 1.10
90 1.09
VOUT = 5V
80 1.08

Output Voltage (V)

70 VOUT = 1.05V 1.07
Efficiency (%)

60 1.06
50 1.05
40 1.04
30 1.03
20 1.02
10 1.01
VIN = 12V VIN = 12V, VOUT = 1.05V, IOUT = 0A to 5.5A
0 1.00
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
Output Current (A) Output Current (A)

Switching Frequency vs. Output Current Switching Frequency vs. Temperature

800 700
680
700
Switching Frequency (kHz)1

660
600
Frequency (kHz)1

640
500 620
400 600
580
300
560
200
540
100 520
VIN = 12V, VOUT = 1.05V, IOUT = 0A to 5.5A
0 500
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 -50 -25 0 25 50 75 100 125
Output Current (A) Temperature (°C)

Feedback Voltage vs. Input Voltage Feedback Voltage vs. Temperature

0.780 0.800

0.775 0.790
0.780
Feedback Voltage (V)
Feedback Voltage (V)

0.770
0.770
0.765
0.760
0.760 0.750

0.755 0.740
0.730
0.750
0.720
0.745
0.710
VIN = 12V, VOUT = 0.765V, IOUT = 0.6A VIN = 12V, VOUT = 0.765V, IOUT = 0.6A
0.740 0.700
4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 -50 -25 0 25 50 75 100 125
Input Voltage (V) Temperature (°C)

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 RT6206A

Shutdown Current vs. Temperature Quiescent Current vs. Temperature

30 1000
VIN = 12V, VOUT = 1.05V, IOUT = 0A VIN = 12V, VOUT = 1.05V, IOUT = 0A
950
25
Shutdown Current (μA)1

Quiescent Current (μA)

900
20
850

15 800

750
10
700
5
650

0 600
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
Temperature (°C) Temperature (°C)

Current Limit vs. Input Voltage Output Ripple Voltage

9.0

8.5
VOUT
8.0 (10mV/Div)
Current Limit (A)

7.5

7.0

6.5
VSW
6.0 (5V/Div)
5.5
VIN = 12V, VOUT = 1.05V, IOUT = 5A
5.0
4 6 8 10 12 14 16 18 Time (500ns/Div)
Input Voltage (V)

Load Transient Response Power On from VIN

VOUT VIN
(20mV/Div) (10V/Div)

VOUT
(0.5V/Div)
IOUT
(2A/Div)
IOUT
(5A/Div)
VIN = 12V, VOUT = 1.05V, IOUT = 1A to 5A VIN = 12V, VOUT = 1.05V, IOUT = 5A

Time (100μs/Div) Time (2.5ms/Div)

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RT6206A

Power Off from VIN Power On from EN

VIN VEN
(10V/Div) (5V/Div)

VOUT VOUT
(0.5V/Div) (0.5V/Div)

IOUT IOUT
(5A/Div) (5A/Div)
VIN = 12V, VOUT = 1.05V, IOUT = 5A VIN = 12V, VOUT = 1.05V, IOUT = 5A

Time (10ms/Div) Time (500μs/Div)

Power Off from EN EN Threshold Voltage vs. Temperature

1.4

1.3
EN Threshold Voltage (V)

VEN 1.2 Rising

(5V/Div)
1.1

1.0

VOUT 0.9 Falling

(0.5V/Div) 0.8

0.7
IOUT
(5A/Div) 0.6
VIN = 12V, VOUT = 1.05V, IOUT = 5A VIN = 12V, VOUT = 1.05V
0.5
Time (50μs/Div) -50 -25 0 25 50 75 100 125
Temperature (°C)

UVLO vs. Temperature

4.0

3.9

Rising
UVLO Voltage (V)

3.8

3.7

3.6
Falling
3.5

3.4
-50 -25 0 25 50 75 100 125
Temperature (°C)

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 RT6206A
Application Information
The RT6206A is a synchronous high voltage Buck converter on the device again. For external timing control, the EN
that can support the input voltage range from 4.5V to 18V pin can also be externally pulled high by adding a REN
and the output current up to 5.5A. It adopts ACOTTM mode resistor and CEN capacitor from the VIN pin (see Figure 1).
control to provide a very fast transient response with few
EN
external compensation components. REN
VIN EN
PWM Operation RT6206A
CEN
It is suitable for low external component count GND
configuration with appropriate amount of Equivalent Series
Resistance (ESR) capacitors at the output. The output Figure 1. External Timing Control
ripple valley voltage is monitored at a feedback point
voltage. The synchronous high side MOSFET is turned An external MOSFET can be added to implement digital
on at the beginning of each cycle. After the internal control on the EN pin when no system voltage above 2V
on-time expires, the MOSFET is turned off. The pulse is available, as shown in Figure 2. In this case, a 100kΩ
width of this on-time is determined by the converter's input pull-up resistor, REN, is connected between the VIN and
and output voltages to keep the frequency fairly constant EN pins. MOSFET Q1 will be under logic control to pull
over the entire input voltage range. down the EN pin.

REN
Advanced Constant On-Time Control 100k
VIN EN
The RT6206A has a unique circuit which sets the on-time
by monitoring the input voltage and SW signal. The circuit EN Q1 RT6206A

ensures the switching frequency operating at 650kHz over GND

input voltage range and loading range.
Figure 2. Digital Enable Control Circuit
Soft-Start
The RT6206A contains an external soft-start clamp that To prevent enabling circuit when VIN is smaller than the
gradually raises the output voltage. The soft-start timing VOUT target value, a resistive voltage divider can be placed
can be programmed by the external capacitor between between the input voltage and ground and connected to
the SS and GND pins. The chip provides a 6μA charge the EN pin to adjust IC lockout threshold, as shown in
current for the external capacitor. If a 3.9nF capacitor is Figure 3. For example, if an 8V output voltage is regulated
used, the soft-start will be 0.87ms (typ.). The available from a 12V input voltage, the resistor REN2 can be selected
capacitance range is from 2.7nF to 220nF. to set input lockout threshold larger than 8V.
C5 (nF)  1.365
t SS (ms) =
ISS ( A) REN1
VIN EN
REN2 RT6206A
Chip Enable Operation
The EN pin is the chip enable input. Pulling the EN pin GND

low (<0.4V) will shut down the device. During shutdown

mode, the RT6206A's quiescent current drops to lower Figure 3. Resistor Divider for Lockout Threshold Setting
than 10μA. Driving the EN pin high (>2V, <18V) will turn

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RT6206A
Output Voltage Setting Latch off Mode UVP
The resistive divider allows the FB pin to sense the output The Latch off Under-Voltage Protection(UVP) function is
voltage as shown in Figure 4. provided for the TSSOP-14 (Exposed Pad) package. When
VOUT the protection function is triggered, the IC will shutdown
in Latch-Off Mode. The IC stops switching, leaving both
R1 switches open, and is latched off. To restart operation,
FB toggle EN or power the IC off and then on again.
RT6206A R2
Inductor Selection
GND
The inductor value and operating frequency determine the
Figure 4. Output Voltage Setting ripple current according to a specific input and an output
voltage. The ripple current ΔIL increases with higher VIN
The output voltage is set by an external resistive divider and decreases with higher inductance.
according to the following equation. It is recommended to
IL =  OUT   1 OUT 
V V
use 1% tolerance or better divider resistors.  f  L   VIN 
R1
VOUT = 0.765  (1 ) Having a lower ripple current reduces not only the ESR
R2
losses in the output capacitors but also the output voltage
Under Voltage Lockout Protection ripple. High frequency with small ripple current can achieve
The RT6206A has Under Voltage Lockout Protection highest efficiency operation. However, it requires a large
(UVLO) that monitors the voltage of VIN pin. When the inductor to achieve this goal. For the ripple current
VIN voltage is lower than UVLO threshold voltage, the selection, the value of ΔIL = 0.2(IMAX) will be a reasonable
RT6206A will be turned off in this state. This is non-latch starting point. The largest ripple current occurs at the
protection. highest VIN. To guarantee that the ripple current stays
below the specified maximum, the inductor value should
Over Temperature Protection be chosen according to the following equation :
The RT6206A equips an Over Temperature Protection (OTP)  VOUT   VOUT 
L =
f   I   1  VIN(MAX) 
circuitry to prevent overheating due to excessive power  L(MAX)   
dissipation. The OTP will shut down switching operation
when junction temperature exceeds 150°C. Once the Input and Output Capacitors Selection
junction temperature cools down by approximately 25°C The input capacitance, C IN, is needed to filter the
the main converter will resume operation. To keep operating trapezoidal current at the source of the high side MOSFET.
at maximum, the junction temperature should be prevented A low ESR input capacitor with larger ripple current rating
from rising above 150°C. should be used for the maximum RMS current. The RMS
current is given by :
Hiccup Mode UVP V VIN
IRMS = IOUT(MAX) OUT 1
A Hiccup Mode Under-Voltage Protection (UVP) function VIN VOUT
is provided for the SOP-8 (Exposed Pad) and WDFN-10L This formula has a maximum at VIN = 2VOUT, where
3x3 packages. When the FB voltage drops below half of IRMS = IOUT / 2. This simple worst-case condition is
the feedback reference voltage, VFB, the UVP function commonly used for design because even significant
will be triggered and the RT6206A will shut down for a deviations do not offer much relief.
period of time before recovering automatically. The Hiccup Choose a capacitor rated at a higher temperature than
Mode UVP can reduce input current in short-circuit required. Several capacitors may also be paralleled to
conditions. meet size or height requirements in the design. For the

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 RT6206A
input capacitor, two 10μF and 0.1μF low ESR ceramic Over Current Protection
capacitors are recommended. When the output shorts to ground, the inductor current
The selection of COUT is determined by the required ESR decays very slowly during a single switching cycle. An
to minimize voltage ripple. over current detector is used to monitor inductor current
to prevent current runaway. The over current detector
Moreover, the amount of bulk capacitance is also a key
monitors the voltage between SW and GND during the
for COUT selection to ensure that the control loop is stable.
low side MOS turn-on state. This is cycle-by-cycle
The output ripple, ΔVOUT , is determined by :
protection.
VOUT  IL ESR  1 
 8fCOUT 
Thermal Considerations
The output ripple will be highest at the maximum input
For continuous operation, do not exceed absolute
voltage since ΔIL increases with input voltage. Multiple
maximum junction temperature. The maximum power
capacitors placed in parallel may need to meet the ESR
dissipation depends on the thermal resistance of the IC
and RMS current handling requirements.
package, PCB layout, rate of surrounding airflow, and
Higher values, lower cost ceramic capacitors are now difference between junction and ambient temperature. The
becoming available in smaller case sizes. Their high ripple maximum power dissipation can be calculated by the
current, high voltage rating and low ESR make them ideal following formula :
for switching regulator applications. However, care must
PD(MAX) = (TJ(MAX) − TA) / θJA
be taken when these capacitors are used at input and
output. When a ceramic capacitor is used at the input where TJ(MAX) is the maximum junction temperature, TA is
and the power is supplied by a wall adapter through long the ambient temperature, and θJA is the junction to ambient
wires, a load step at the output can induce ringing at the thermal resistance.
input, VIN. A sudden inrush of current through the long For recommended operating condition specifications, the
wires can potentially cause a voltage spike at VIN large maximum junction temperature is 125°C. The junction to
enough to damage the part. ambient thermal resistance, θJA, is layout dependent. For
TSSOP-14 (Exposed Pad) package, the thermal
External Bootstrap Diode
resistance, θJA, is 40°C/W on a standard JEDEC 51-7
Connect a 0.1μF low ESR ceramic capacitor between the four-layer thermal test board. For SOP-8 (Exposed Pad)
BOOT and SW pins. This capacitor provides the gate driver package, the thermal resistance, θJA, is 49°C/W on a
voltage for the high side MOSFET. It is recommended to standard JEDEC 51-7 four-layer thermal test board. For
add an external bootstrap diode between an external 5V WDFN-10L 3x3 package, the thermal resistance, θJA, is
and the BOOT pin for efficiency improvement when input 60°C/W on a standard JEDEC 51-7 four-layer thermal test
voltage is lower than 5.5V or duty ratio is higher than 65%. board. The maximum power dissipation at TA = 25°C can
The bootstrap diode can be a low cost one such as 1N4148 be calculated by the following formulas :
or BAT54. The external 5V can be a 5V fixed input from
P D(MAX) = (125°C − 25°C) / (40°C/W) = 2.5W for
system or a 5V output of the RT6206A. Note that the
TSSOP-14 (Exposed Pad) package
external boot voltage must be lower than 5.5V
5V PD(MAX) = (125°C − 25°C) / (49°C/W) = 2.041W for
SOP-8 (Exposed Pad) package
PD(MAX) = (125°C − 25°C) / (60°C/W) = 1.667W for
BOOT
WDFN-10L 3x3 package
RT6206A 0.1µF
The maximum power dissipation depends on operating
SW
ambient temperature for fixed T J(MAX) and thermal
Figure 5. External Bootstrap Diode resistance, θJA. The derating curves in Figure 6 allow the

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DS6206A-02 July 2015 www.richtek.com

13
RT6206A
designer to see the effect of rising ambient temperature Layout Consideration
on the maximum power dissipation. Follow the PCB layout guidelines for optimal performance
of the RT6206A
3.0
Four-Layer PCB  Keep the traces of the main current paths as short and
Maximum Power Dissipation (W)1

2.8
2.6 wide as possible.
2.4
2.2 TSSOP-14 (Exposed Pad)  Put the input capacitor as close as possible to the device
2.0 pins (VIN and GND).
1.8
1.6  SW node is with high frequency voltage swing and
1.4 WDFN-10L 3x3
1.2 should be kept at small area. Keep sensitive
1.0 components away from the SW node to prevent stray
0.8
0.6 capacitive noise pickup.
0.4 SOP-8 (Exposed Pad)
0.2  Connect feedback network behind the output capacitors.
0.0 Keep the loop area small. Place the feedback
0 25 50 75 100 125
components near the RT6206A FB pin.
Ambient Temperature (°C)
 The GND and Exposed Pad should be connected to a
Figure 6. Derating Curve of Maximum Power Dissipation strong ground plane for heat sinking and noise protection.

The resistor divider must Input capacitor must be placed

be connected as close to as close to the IC as possible.
the device as possible. C1
VOUT C2
SW should be connected to inductor by
R1 Wide and short trace. Keep sensitive
EN 8 VIN components away from this trace.
R2
PGND

FB 2 7 BOOT
PGND C4 C6
VREG5 3 6 SW
9
C5 SS 4 5 PGND L1
C7
VOUT

Figure 7. PCB Layout Guide for SOP-8 (Exposed Pad) Package

Place the feedback components Place the input and output

as close to the FB as possible capacitors as close to the
for better regulation. IC as possible.
PGND

R2 C1
R1 EN 1 10 VIN
VOUT C6
PGND

FB 2 9 VIN
VREG5 3 8 BOOT
SS 4 7 SW
C4 PGOOD 5 11 6 SW
L1
C3

PGND VOUT
SW should be connected to inductor by wide and short
trace. Keep sensitive components away from this trace.

Figure 8. PCB Layout Guide for WDFN-10L 3x3 Package

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www.richtek.com DS6206A-02 July 2015

14
 RT6206A
Place the feedback components Place the input and output
as close to the FB as possible capacitors as close to the
for better regulation. IC as possible.
VOUT PGND
R1 C1
VOUT 14 VINR
FB 2 13 VIN
VREG5 3 12 BOOT C6

PGND
R2 C4
SS 4 11 SW L1
GND 5 10 SW
PGOOD 6
15
9 PGND VOUT
EN 7 8 PGND
C7

SW should be connected to inductor by

Wide and short trace. Keep sensitive
components away from this trace.

Figure 9. PCB Layout Guide for TSSOP-14 (Exposed Pad) Package

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DS6206A-02 July 2015 www.richtek.com

15
RT6206A
Outline Dimension

H
A

EXPOSED THERMAL PAD Y

(Bottom of Package)
J X B

C
I
D

Dimensions In Millimeters Dimensions In Inches

Symbol
Min Max Min Max
A 4.801 5.004 0.189 0.197
B 3.810 4.000 0.150 0.157
C 1.346 1.753 0.053 0.069
D 0.330 0.510 0.013 0.020
F 1.194 1.346 0.047 0.053
H 0.170 0.254 0.007 0.010
I 0.000 0.152 0.000 0.006
J 5.791 6.200 0.228 0.244
M 0.406 1.270 0.016 0.050
X 2.000 2.300 0.079 0.091
Option 1
Y 2.000 2.300 0.079 0.091
X 2.100 2.500 0.083 0.098
Option 2
Y 3.000 3.500 0.118 0.138

8-Lead SOP (Exposed Pad) Plastic Package

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16
 RT6206A

D2
D

E E2

SEE DETAIL A
1

e
b 2 1 2 1
A
A3
A1 DETAIL A
Pin #1 ID and Tie Bar Mark Options

Note : The configuration of the Pin #1 identifier is optional,

but must be located within the zone indicated.

Dimensions In Millimeters Dimensions In Inches

Symbol
Min Max Min Max
A 0.700 0.800 0.028 0.031
A1 0.000 0.050 0.000 0.002
A3 0.175 0.250 0.007 0.010
b 0.180 0.300 0.007 0.012
D 2.950 3.050 0.116 0.120
D2 2.300 2.650 0.091 0.104
E 2.950 3.050 0.116 0.120
E2 1.500 1.750 0.059 0.069
e 0.500 0.020
L 0.350 0.450 0.014 0.018

W-Type 10L DFN 3x3 Package

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17
RT6206A

Dimensions In Millimeters Dimensions In Inches

Symbol
Min Max Min Max
A 1.000 1.200 0.039 0.047
A1 0.000 0.150 0.000 0.006
A2 0.800 1.050 0.031 0.041
b 0.190 0.300 0.007 0.012
D 4.900 5.100 0.193 0.201
e 0.650 0.026
E 6.300 6.500 0.248 0.256
E1 4.300 4.500 0.169 0.177
L 0.450 0.750 0.018 0.030
U 1.900 2.900 0.075 0.114
V 1.600 2.600 0.063 0.102

14-Lead TSSOP (Exposed Pad) Plastic Package

Richtek Technology Corporation

14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789

Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.

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