LNK302/304-306 ®

LinkSwitch-TN Family
Lowest Component Count, Energy Efficient
Off-Line Switcher IC
Product Highlights
Cost Effective Linear/Cap Dropper Replacement
• Lowest cost and component count buck converter solution
• Fully integrated auto-restart for short-circuit and open FB BP

loop fault protection – saves external component costs + D S +

• LNK302 uses a simplified controller without auto-restart Wide Range LinkSwitch-TN DC
HV DC Input Output
for very low system cost
• 66 kHz operation with accurate current limit – allows low cost
off-the-shelf 1 mH inductor for up to 120 mA output current PI-3492-111903
• Tight tolerances and negligible temperature variation
• High breakdown voltage of 700 V provides excellent Figure 1. Typical Buck Converter Application (See Application
Examples Section for Other Circuit Configurations).
input surge withstand
• Frequency jittering dramatically reduces EMI (~10 dB)
– minimizes EMI filter cost OUTPUT CURRENT TABLE1
• High thermal shutdown temperature (+135 °C minimum) 230 VAC ±15% 85-265 VAC
PRODUCT4
Much Higher Performance over Discrete Buck and MDCM 2
CCM 3
MDCM2 CCM3
Passive Solutions LNK302P or G 63 mA 80 mA 63 mA 80 mA
• Supports buck, buck-boost and flyback topologies LNK304P or G 120 mA 170 mA 120 mA 170 mA
• System level thermal overload, output short-circuit and
LNK305P or G 175 mA 280 mA 175 mA 280 mA
open control loop protection
• Excellent line and load regulation even with typical LNK306P or G 225 mA 360 mA 225 mA 360 mA
configuration
• High bandwidth provides fast turn-on with no overshoot Table 1. Notes: 1. Typical output current in a non-isolated buck
converter. Output power capability depends on respective output
• Current limit operation rejects line ripple
voltage. See Key Applications Considerations Section for complete
• Universal input voltage range (85 VAC to 265 VAC) description of assumptions, including fully discontinuous conduction
• Built-in current limit and hysteretic thermal protection mode (DCM) operation. 2. Mostly discontinuous conduction mode. 3.
• Higher efficiency than passive solutions Continuous conduction mode. 4. Packages: P: DIP-8B, G: SMD-8B.
• Higher power factor than capacitor-fed solutions For lead-free package options, see Part Ordering Information.
• Entirely manufacturable in SMD
under 360 mA output current range at equal system cost while
®
EcoSmart – Extremely Energy Efficient offering much higher performance and energy efficiency.
• Consumes typically only 50/80 mW in self-powered buck
topology at 115/230 VAC input with no load (opto feedback) LinkSwitch-TN devices integrate a 700 V power MOSFET,
• Consumes typically only 7/12 mW in flyback topology oscillator, simple On/Off control scheme, a high voltage switched
with external bias at 115/230 VAC input with no load current source, frequency jittering, cycle-by-cycle current limit
• Meets California Energy Commission (CEC), Energy and thermal shutdown circuitry onto a monolithic IC. The start-
Star, and EU requirements up and operating power are derived directly from the voltage
on the DRAIN pin, eliminating the need for a bias supply and
Applications associated circuitry in buck or flyback converters. The fully
• Appliances and timers integrated auto-restart circuit in the LNK304-306 safely limits
• LED drivers and industrial controls output power during fault conditions such as short-circuit or
open loop, reducing component count and system-level load
protection cost. A local supply provided by the IC allows use
Description of a non-safety graded optocoupler acting as a level shifter to
LinkSwitch-TN is specifically designed to replace all linear and further enhance line and load regulation performance in buck
capacitor-fed (cap dropper) non-isolated power supplies in the and buck-boost converters, if required.
March 2005
 LNK302/304-306

BYPASS DRAIN
(BP) (D)
REGULATOR
5.8 V

BYPASS PIN
UNDER-VOLTAGE
+
5.8 V -
4.85 V CURRENT LIMIT
6.3 V COMPARATOR

- VI
LIMIT

JITTER
CLOCK

DCMAX
THERMAL
SHUTDOWN
OSCILLATOR
FEEDBACK
1.65 V -VT
(FB)
S Q

R Q
LEADING
EDGE
BLANKING

SOURCE
(S)

PI-3904-020805

Figure 2a. Functional Block Diagram (LNK302).

BYPASS DRAIN
(BP) (D)
REGULATOR
5.8 V

FAULT
PRESENT

AUTO-
RESTART BYPASS PIN
COUNTER UNDER-VOLTAGE
+
CLOCK
5.8 V -
RESET 4.85 V

CURRENT LIMIT
6.3 V COMPARATOR

- VI
LIMIT

JITTER
CLOCK

DCMAX
THERMAL
SHUTDOWN
OSCILLATOR
FEEDBACK
1.65 V -VT
(FB)
S Q

R Q
LEADING
EDGE
BLANKING

SOURCE
(S)

PI-2367-021105

Figure 2b. Functional Block Diagram (LNK304-306).

2
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 LNK302/304-306

Pin Functional Description The LinkSwitch-TN oscillator incorporates circuitry that

introduces a small amount of frequency jitter, typically 4 kHz
DRAIN (D) Pin: peak-to-peak, to minimize EMI emission. The modulation rate
Power MOSFET drain connection. Provides internal operating of the frequency jitter is set to 1 kHz to optimize EMI reduction
current for both start-up and steady-state operation. for both average and quasi-peak emissions. The frequency
jitter should be measured with the oscilloscope triggered at
BYPASS (BP) Pin: the falling edge of the DRAIN waveform. The waveform in
Connection point for a 0.1 µF external bypass capacitor for the Figure 4 illustrates the frequency jitter of the LinkSwitch-TN.
internally generated 5.8 V supply.
Feedback Input Circuit
FEEDBACK (FB) Pin: The feedback input circuit at the FB pin consists of a low
During normal operation, switching of the power MOSFET is impedance source follower output set at 1.65 V. When the current
controlled by this pin. MOSFET switching is terminated when delivered into this pin exceeds 49 µA, a low logic level (disable)
a current greater than 49 µA is delivered into this pin. is generated at the output of the feedback circuit. This output
is sampled at the beginning of each cycle on the rising edge of
SOURCE (S) Pin: the clock signal. If high, the power MOSFET is turned on for
This pin is the power MOSFET source connection. It is also the that cycle (enabled), otherwise the power MOSFET remains off
ground reference for the BYPASS and FEEDBACK pins. (disabled). Since the sampling is done only at the beginning of
each cycle, subsequent changes in the FB pin voltage or current
during the remainder of the cycle are ignored.
P Package (DIP-8B)
5.8 V Regulator and 6.3 V Shunt Voltage Clamp
G Package (SMD-8B)
The 5.8 V regulator charges the bypass capacitor connected to
the BYPASS pin to 5.8 V by drawing a current from the voltage
S 1 8 S on the DRAIN, whenever the MOSFET is off. The BYPASS
pin is the internal supply voltage node for the LinkSwitch-TN.
S 2 7 S
When the MOSFET is on, the LinkSwitch-TN runs off of the
BP 3 energy stored in the bypass capacitor. Extremely low power
consumption of the internal circuitry allows the LinkSwitch-TN
FB 4 5 D
to operate continuously from the current drawn from the DRAIN
pin. A bypass capacitor value of 0.1 µF is sufficient for both
high frequency decoupling and energy storage.
PI-3491-111903
In addition, there is a 6.3 V shunt regulator clamping the
Figure 3. Pin Configuration. BYPASS pin at 6.3 V when current is provided to the BYPASS
pin through an external resistor. This facilitates powering of
LinkSwitch-TN externally through a bias winding to decrease
LinkSwitch-TN Functional the no-load consumption to about 50 mW.
Description
BYPASS Pin Under-Voltage
LinkSwitch-TN combines a high voltage power MOSFET switch
The BYPASS pin under-voltage circuitry disables the power
with a power supply controller in one device. Unlike conventional
MOSFET when the BYPASS pin voltage drops below 4.85 V.
PWM (pulse width modulator) controllers, LinkSwitch-TN uses
Once the BYPASS pin voltage drops below 4.85 V, it must rise
a simple ON/OFF control to regulate the output voltage. The
back to 5.8 V to enable (turn-on) the power MOSFET.
LinkSwitch-TN controller consists of an oscillator, feedback
(sense and logic) circuit, 5.8 V regulator, BYPASS pin under-
Over-Temperature Protection
voltage circuit, over-temperature protection, frequency jittering,
The thermal shutdown circuitry senses the die temperature.
current limit circuit, leading edge blanking and a 700 V power
The threshold is set at 142 °C typical with a 75 °C hysteresis.
MOSFET. The LinkSwitch-TN incorporates additional circuitry
When the die temperature rises above this threshold (142 °C) the
for auto-restart.
power MOSFET is disabled and remains disabled until the die
temperature falls by 75 °C, at which point it is re-enabled.
Oscillator
The typical oscillator frequency is internally set to an average
Current Limit
of 66 kHz. Two signals are generated from the oscillator: the
The current limit circuit senses the current in the power MOSFET.
maximum duty cycle signal (DCMAX) and the clock signal that
When this current exceeds the internal threshold (ILIMIT), the
indicates the beginning of each cycle.

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 LNK302/304-306

600 12 V, 120 mA non-isolated power supply used in appliance

PI-3660-081303
control such as rice cookers, dishwashers or other white goods.
500
This circuit may also be applicable to other applications such
VDRAIN
400
as night-lights, LED drivers, electricity meters, and residential
heating controllers, where a non-isolated supply is acceptable.
300
The input stage comprises fusible resistor RF1, diodes D3 and
200 D4, capacitors C4 and C5, and inductor L2. Resistor RF1 is
a flame proof, fusible, wire wound resistor. It accomplishes
100
several functions: a) Inrush current limitation to safe levels for
0 rectifiers D3 and D4; b) Differential mode noise attenuation;
68 kHz c) Input fuse should any other component fail short-circuit
64 kHz (component fails safely open-circuit without emitting smoke,
fire or incandescent material).
0 20
The power processing stage is formed by the LinkSwitch-TN,
Time (µs)
freewheeling diode D1, output choke L1, and the output
Figure 4. Frequency Jitter. capacitor C2. The LNK304 was selected such that the power
supply operates in the mostly discontinuous-mode (MDCM).
power MOSFET is turned off for the remainder of that cycle. Diode D1 is an ultra-fast diode with a reverse recovery time (trr)
The leading edge blanking circuit inhibits the current limit of approximately 75 ns, acceptable for MDCM operation. For
comparator for a short time (tLEB) after the power MOSFET continuous conduction mode (CCM) designs, a diode with a trr of
is turned on. This leading edge blanking time has been set so ≤35 ns is recommended. Inductor L1 is a standard off-the- shelf
that current spikes caused by capacitance and rectifier reverse inductor with appropriate RMS current rating (and acceptable
recovery time will not cause premature termination of the temperature rise). Capacitor C2 is the output filter capacitor;
switching pulse. its primary function is to limit the output voltage ripple. The
output voltage ripple is a stronger function of the ESR of the
Auto-Restart (LNK304-306 only) output capacitor than the value of the capacitor itself.
In the event of a fault condition such as output overload, output
short, or an open loop condition, LinkSwitch-TN enters into auto- To a first order, the forward voltage drops of D1 and D2 are
restart operation. An internal counter clocked by the oscillator identical. Therefore, the voltage across C3 tracks the output
gets reset every time the FB pin is pulled high. If the FB pin voltage. The voltage developed across C3 is sensed and regulated
is not pulled high for 50 ms, the power MOSFET switching is via the resistor divider R1 and R3 connected to U1ʼs FB pin.
disabled for 800 ms. The auto-restart alternately enables and The values of R1 and R3 are selected such that, at the desired
disables the switching of the power MOSFET until the fault output voltage, the voltage at the FB pin is 1.65 V.
condition is removed.
Regulation is maintained by skipping switching cycles. As the
Applications Example output voltage rises, the current into the FB pin will rise. If
this exceeds IFB then subsequent cycles will be skipped until the
A 1.44 W Universal Input Buck Converter current reduces below IFB. Thus, as the output load is reduced,
The circuit shown in Figure 5 is a typical implementation of a more cycles will be skipped and if the load increases, fewer

R1
13.0 kΩ
1%

R3 C3
RF1 2.05 kΩ 10 µF
8.2 Ω L2 D2
C1 1% 35 V 1N4005GP
2W 1 mH FB BP
100 nF 12 V,
D S L1 120 mA
D3 1 mH
1N4007 LinkSwitch-TN C2
85-265 C4 C5 280 mA R4
VAC 4.7 µF 4.7 µF LNK304 D1 100 µF 3.3 kΩ
D4 400 V 400 V UF4005 16 V
1N4007
RTN
PI-3757-112103

Figure 5. Universal Input, 12 V, 120 mA Constant Voltage Power Supply Using LinkSwitch-TN.

4
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 LNK302/304-306

LinkSwitch-TN
RF1 D1 L2
D FB
D2
R1
BP +

C1
AC C4 C5 S S R3 C3 L1
INPUT DC
OUTPUT
S S C2

D4 D1

Optimize hatched copper areas ( ) for heatsinking and EMI. PI-3750-083004

Figure 6. Recommended Printed Circuit Layout for LinkSwitch-TN in a Buck Converter Configuration.

cycles are skipped. To provide overload protection if no cycles LinkSwitch-TN Selection and Selection Between
are skipped during a 50 ms period, LinkSwitch-TN will enter MDCM and CCM Operation
auto-restart (LNK304-306), limiting the average output power
to approximately 6% of the maximum overload power. Due to Select the LinkSwitch-TN device, freewheeling diode and output
tracking errors between the output voltage and the voltage across inductor that gives the lowest overall cost. In general, MDCM
C3 at light load or no load, a small pre-load may be required provides the lowest cost and highest efficiency converter. CCM
(R4). For the design in Figure 5, if regulation to zero load is designs require a larger inductor and ultra-fast (trr ≤35 ns)
required, then this value should be reduced to 2.4 kΩ. freewheeling diode in all cases. It is lower cost to use a larger
LinkSwitch-TN in MDCM than a smaller LinkSwitch-TN in CCM
Key Application Considerations because of the additional external component costs of a CCM
design. However, if the highest output current is required, CCM
LinkSwitch-TN Design Considerations should be employed following the guidelines below.

Output Current Table Topology Options

Data sheet maximum output current table (Table 1) represents
the maximum practical continuous output current for both LinkSwitch-TN can be used in all common topologies, with or
mostly discontinuous conduction mode (MDCM) and continuous without an optocoupler and reference to improve output voltage
conduction mode (CCM) of operation that can be delivered from tolerance and regulation. Table 2 provide a summary of these
a given LinkSwitch-TN device under the following assumed configurations. For more information see the Application
conditions: Note – LinkSwitch-TN Design Guide.

1) Buck converter topology. Component Selection

2) The minimum DC input voltage is ≥70 V. The value of
input capacitance should be large enough to meet this Referring to Figure 5, the following considerations may be
criterion. helpful in selecting components for a LinkSwitch-TN design.
3) For CCM operation a KRP* of 0.4.
4) Output voltage of 12 VDC. Freewheeling Diode D1
5) Efficiency of 75%. Diode D1 should be an ultra-fast type. For MDCM, reverse
6) A catch/freewheeling diode with trr ≤75 ns is used for recovery time trr ≤75 ns should be used at a temperature of
MDCM operation and for CCM operation, a diode with 70 °C or below. Slower diodes are not acceptable, as continuous
trr ≤35 ns is used. mode operation will always occur during startup, causing high
7) The part is board mounted with SOURCE pins soldered leading edge current spikes, terminating the switching cycle
to a sufficient area of copper to keep the SOURCE pin prematurely, and preventing the output from reaching regulation.
temperature at or below 100 °C. If the ambient temperature is above 70 °C then a diode with
*KRP is the ratio of ripple to peak inductor current. trr ≤35 ns should be used.

For CCM an ultra-fast diode with reverse recovery time

trr ≤35 ns should be used. A slower diode may cause excessive
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 LNK302/304-306

TOPOLOGY BASIC CIRCUIT SCHEMATIC KEY FEATURES

High-Side 1. Output referenced to input
Buck – 2. Positive output (VO) with respect to -VIN
Direct 3. Step down – VO < VIN
FB BP
Feedback 4. Low cost direct feedback (±10% typ.)
+ D S +
LinkSwitch-TN
VIN VO

PI-3751-121003

High-Side 1. Output referenced to input

Buck – 2. Positive output (VO) with respect to -VIN
FB BP
Optocoupler 3. Step down – VO < VIN
Feedback + D S + 4. Optocoupler feedback
LinkSwitch-TN - Accuracy only limited by reference
VIN VO choice
- Low cost non-safety rated opto
- No pre-load required
PI-3752-121003 5. Minimum no-load consumption
Low-Side + +
Buck –
Optocoupler LinkSwitch-TN
Feedback VIN VO

BP FB
1. Output referenced to input
2. Negative output (VO) with respect to +VIN
S D
PI-3753-111903 3. Step down – VO < VIN
Low-Side 4. Optocoupler feedback
+ - Accuracy only limited by reference
Buck – IO
Constant choice
LinkSwitch-TN
Current LED VIN VF +
- Low cost non-safety rated opto
Driver - No pre-load required
- Ideal for driving LEDs
BP FB

S D
VF PI-3754-112103
R=
IO

High-Side
Buck Boost –
Direct
Feedback FB BP

+ D S
LinkSwitch-TN 1. Output referenced to input
VIN VO
2. Negative output (VO) with respect to +VIN
+

PI-3755-121003 3. Step up/down – VO > VIN or VO < VIN

4. Low cost direct feedback (±10% typ.)
High-Side 5. Fail-safe – output is not subjected to input
2V
Buck Boost – 300 Ω RSENSE =
IO voltage if the internal MOSFET fails
2 kΩ
Constant FB BP RSENSE IO 6. Ideal for driving LEDs – better accuracy
Current LED D S and temperature stability than Low-side
+
Driver LinkSwitch-TN
Buck constant current LED driver
VIN 10 µF 100 nF
50 V

PI-3779-120803

Table 2. Common Circuit Configurations Using LinkSwitch-TN. (continued on next page)

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 LNK302/304-306

TOPOLOGY BASIC CIRCUIT SCHEMATIC KEY FEATURES

Low-Side 1. Output referenced to input
Buck Boost – 2. Positive output (VO) with respect to +VIN
Optocoupler + 3. Step up/down – VO > VIN or VO < VIN
Feedback 4. Optocoupler feedback
LinkSwitch-TN
VIN VO
- Accuracy only limited by reference
choice
- Low cost non-safety rated opto
BP FB + - No pre-load required
S D
PI-3756-111903 5. Fail-safe – output is not subjected to input
voltage if the internal MOSFET fails

Table 2 (cont). Common Circuit Configurations Using LinkSwitch-TN.

leading edge current spikes, terminating the switching cycle Feedback Capacitor C3
prematurely and preventing full power delivery. Capacitor C3 can be a low cost general purpose capacitor. It
provides a “sample and hold” function, charging to the output
Fast and slow diodes should never be used as the large reverse voltage during the off time of LinkSwitch-TN. Its value should
recovery currents can cause excessive power dissipation in the be 10 µF to 22 µF; smaller values cause poorer regulation at
diode and/or exceed the maximum drain current specification light load conditions.
of LinkSwitch-TN.
Pre-load Resistor R4
Feedback Diode D2 In high-side, direct feedback designs where the minimum load
Diode D2 can be a low-cost slow diode such as the 1N400X is <3 mA, a pre-load resistor is required to maintain output
series, however it should be specified as a glass passivated type regulation. This ensures sufficient inductor energy to pull the
to guarantee a specified reverse recovery time. To a first order, inductor side of the feedback capacitor C3 to input return via
the forward drops of D1 and D2 should match. D2. The value of R4 should be selected to give a minimum
output load of 3 mA.
Inductor L1
Choose any standard off-the-shelf inductor that meets the In designs with an optocoupler the Zener or reference bias
design requirements. A “drum” or “dog bone” “I” core inductor current provides a 1 mA to 2 mA minimum load, preventing
is recommended with a single ferrite element due to to its “pulse bunching” and increased output ripple at zero load.
low cost and very low audible noise properties. The typical
inductance value and RMS current rating can be obtained from LinkSwitch-TN Layout Considerations
the LinkSwitch-TN design spreadsheet available within the
PI Expert design suite from Power Integrations. Choose L1 In the buck or buck-boost converter configuration, since the
greater than or equal to the typical calculated inductance with SOURCE pins in LinkSwitch-TN are switching nodes, the copper
RMS current rating greater than or equal to calculated RMS area connected to SOURCE should be minimized to minimize
inductor current. EMI within the thermal constraints of the design.

Capacitor C2 In the boost configuration, since the SOURCE pins are tied
The primary function of capacitor C2 is to smooth the inductor to DC return, the copper area connected to SOURCE can be
current. The actual output ripple voltage is a function of this maximized to improve heatsinking.
capacitorʼs ESR. To a first order, the ESR of this capacitor
should not exceed the rated ripple voltage divided by the typical The loop formed between the LinkSwitch-TN, inductor (L1),
current limit of the chosen LinkSwitch-TN. freewheeling diode (D1), and output capacitor (C2) should
be kept as small as possible. The BYPASS pin capacitor
Feedback Resistors R1 and R3 C1 (Figure 6) should be located physically close to the
The values of the resistors in the resistor divider formed by SOURCE (S) and BYPASS (BP) pins. To minimize direct
R1 and R3 are selected to maintain 1.65 V at the FB pin. It is coupling from switching nodes, the LinkSwitch-TN should be
recommended that R3 be chosen as a standard 1% resistor of placed away from AC input lines. It may be advantageous to
2 kΩ. This ensures good noise immunity by biasing the feedback place capacitors C4 and C5 in-between LinkSwitch-TN and the
network with a current of approximately 0.8 mA. AC input. The second rectifier diode D4 is optional, but may

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 LNK302/304-306

be included for better EMI performance and higher line surge worst-case conditions of highest line voltage, maximum
withstand capability. overload (just prior to auto-restart) and highest ambient
temperature.
Quick Design Checklist 4) Thermal check – at maximum output power, minimum
input voltage and maximum ambient temperature, verify
As with any power supply design, all LinkSwitch-TN designs that the LinkSwitch-TN SOURCE pin temperature is
should be verified for proper functionality on the bench. The 100 °C or below. This figure ensures adequate margin due
following minimum tests are recommended: to variations in RDS(ON) from part to part. A battery powered
thermocouple meter is recommended to make measurements
1) Adequate DC rail voltage – check that the minimum DC when the SOURCE pins are a switching node. Alternatively,
input voltage does not fall below 70 VDC at maximum load, the ambient temperature may be raised to indicate margin
minimum input voltage. to thermal shutdown.
2) Correct Diode Selection – UF400x series diodes are
recommended only for designs that operate in MDCM at In a LinkSwitch-TN design using a buck or buck boost converter
an ambient of 70 °C or below. For designs operating in topology, the SOURCE pin is a switching node. Oscilloscope
continuous conduction mode (CCM) and/or higher ambients, measurements should therefore be made with probe grounded
then a diode with a reverse recovery time of 35 ns or better, to a DC voltage, such as primary return or DC input rail, and
such as the BYV26C, is recommended. not to the SOURCE pins. The power supply input must always
3) Maximum drain current – verify that the peak drain current be supplied from an isolated source (e.g. via an isolation
is below the data sheet peak drain specification under transformer).

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 LNK302/304-306

ABSOLUTE MAXIMUM RATINGS(1,5)

DRAIN Voltage .................................................. -0.3 V to 700 V Notes:
Peak DRAIN Current (LNK302).................200 mA (375 mA)(2) 1. All voltages referenced to SOURCE, TA = 25 °C.
Peak DRAIN Current (LNK304).................400 mA (750 mA)(2) 2. The higher peak DRAIN current is allowed if the DRAIN
Peak DRAIN Current (LNK305).................800 mA (1500 mA)(2) to SOURCE voltage does not exceed 400 V.
Peak DRAIN Current (LNK306).................1400 mA (2600 mA)(2) 3. Normally limited by internal circuitry.
FEEDBACK Voltage .........................................-0.3 V to 9 V 4. 1/16 in. from case for 5 seconds.
FEEDBACK Current.............................................100 mA 5. Maximum ratings specified may be applied, one at a time,
BYPASS Voltage ..........................................-0.3 V to 9 V without causing permanent damage to the product.
Storage Temperature .......................................... -65 °C to 150 °C Exposure to Absolute Maximum Rating conditions for
Operating Junction Temperature(3) ..................... -40 °C to 150 °C extended periods of time may affect product reliability.
Lead Temperature(4) ........................................................260 °C

THERMAL IMPEDANCE
Thermal Impedance: P or G Package: Notes:
(θJA) ........................... 70 °C/W(2); 60 °C/W(3) 1. Measured on pin 2 (SOURCE) close to plastic interface.
(θJC)(1) ............................................... 11 °C/W 2. Soldered to 0.36 sq. in. (232 mm2), 2 oz. (610 g/m2) copper clad.
3. Soldered to 1 sq. in. (645 mm2), 2 oz. (610 g/m2) copper clad.

Conditions
Parameter Symbol SOURCE = 0 V; TJ = -40 to 125 °C Min Typ Max Units
See Figure 7
(Unless Otherwise Specified)
CONTROL FUNCTIONS
Output Average 62 66 70
fOSC TJ = 25 °C kHz
Frequency Peak-Peak Jitter 4
Maximum Duty
DCMAX S2 Open 66 69 72 %
Cycle
FEEDBACK Pin
Turnoff Threshold IFB TJ = 25 °C 30 49 68 µA
Current
FEEDBACK Pin
Voltage at Turnoff VFB 1.54 1.65 1.76 V
Threshold
VFB ≥2 V
IS1 (MOSFET Not Switching) 160 220 µA
See Note A
DRAIN Supply FEEDBACK LNK302/304 200 260
Current Open
IS2 (MOSFET LNK305 220 280 µA
Switching)
See Notes A, B LNK306 250 310

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LNK302/304-306

Conditions
Parameter Symbol SOURCE = 0 V; TJ = -40 to 125 °C Min Typ Max Units
See Figure 7
(Unless Otherwise Specified)
CONTROL FUNCTIONS (cont.)
VBP = 0 V LNK302/304 -5.5 -3.3 -1.8
ICH1
TJ = 25 °C LNK305/306 -7.5 -4.6 -2.5
BYPASS Pin
mA
Charge Current VBP = 4 V LNK302/304 -3.8 -2.3 -1.0
ICH2
TJ = 25 °C LNK305/306 -4.5 -3.3 -1.5

BYPASS Pin
VBP 5.55 5.8 6.10 V
Voltage
BYPASS Pin
VBPH 0.8 0.95 1.2 V
Voltage Hysteresis
BYPASS Pin
IBPSC See Note D 68 µA
Supply Current
CIRCUIT PROTECTION
di/dt = 55 mA/µs
126 136 146
TJ = 25 °C
LNK302
di/dt = 250 mA/µs
145 165 185
TJ = 25 °C
di/dt = 65 mA/µs
240 257 275
TJ = 25 °C
LNK304
di/dt = 415 mA/µs
271 308 345
ILIMIT (See TJ = 25 °C
Current Limit Note E)
mA
di/dt = 75 mA/µs
350 375 401
TJ = 25 °C
LNK305
di/dt = 500 mA/µs
396 450 504
TJ = 25 °C
di/dt = 95 mA/µs
450 482 515
TJ = 25 °C
LNK306
di/dt = 610 mA/µs
508 578 647
TJ = 25 °C

LNK302/304 280 360 475

Minimum On Time tON(MIN) LNK305 360 460 610 ns

LNK306 400 500 675

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 LNK302/304-306

Conditions
Parameter Symbol SOURCE = 0 V; TJ = -40 to 125 °C Min Typ Max Units
See Figure 7
(Unless Otherwise Specified)
CIRCUIT PROTECTION (cont.)
Leading Edge TJ = 25 °C
tLEB 170 215 ns
Blanking Time See Note F

Thermal Shutdown
TSD 135 142 150 °C
Temperature
Thermal Shutdown
TSHD See Note G 75 °C
Hysteresis
OUTPUT
LNK302 TJ = 25 °C 48 55.2
ID = 13 mA TJ = 100 °C 76 88.4
LNK304 TJ = 25 °C 24 27.6
ON-State ID = 25 mA TJ = 100 °C 38 44.2
RDS(ON) Ω
Resistance LNK305 TJ = 25 °C 12 13.8
ID = 35 mA TJ = 100 °C 19 22.1
LNK306 TJ = 25 °C 7 8.1
ID = 45 mA TJ = 100 °C 11 12.9
LNK302/304 50
VBP = 6.2 V, VFB ≥2 V,
OFF-State Drain LNK305 70
IDSS VDS = 560 V, µA
Leakage Current TJ = 25 °C LNK306 90
VBP = 6.2 V, VFB ≥2 V,
Breakdown Voltage BVDSS
TJ = 25 °C
700 V

Rise Time tR Measured in a Typical Buck 50 ns

Fall Time tF Converter Application 50 ns

DRAIN Supply
50 V
Voltage
Output Enable
tEN See Figure 9 10 µs
Delay
Output Disable
tDST 0.5 µs
Setup Time
Auto-Restart TJ = 25 °C LNK302 Not Applicable
tAR ms
ON-Time See Note H LNK304-306 50

Auto-Restart LNK302 Not Applicable

DCAR %
Duty Cycle LNK304-306 6

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 LNK302/304-306

NOTES:
A. Total current consumption is the sum of IS1 and IDSS when FEEDBACK pin voltage is ≥2 V (MOSFET not
switching) and the sum of IS2 and IDSS when FEEDBACK pin is shorted to SOURCE (MOSFET switching).

B Since the output MOSFET is switching, it is difficult to isolate the switching current from the supply current at the
DRAIN. An alternative is to measure the BYPASS pin current at 6 V.

C. See Typical Performance Characteristics section Figure 14 for BYPASS pin start-up charging waveform.

D. This current is only intended to supply an optional optocoupler connected between the BYPASS and FEEDBACK
pins and not any other external circuitry.

E. For current limit at other di/dt values, refer to Figure 13.

F. This parameter is guaranteed by design.

G. This parameter is derived from characterization.

H. Auto-restart on time has the same temperature characteristics as the oscillator (inversely proportional to
frequency).

470 Ω
5W 470 kΩ
D FB
S1 S2
BP
50 V 50 V
S S 0.1 µF
S S

PI-3490-060204

Figure 7. LinkSwitch-TN General Test Circuit.

DCMAX
(internal signal)
tP

FB

tEN
VDRAIN

1
tP =
fOSC
PI-3707-112503

Figure 8. LinkSwitch-TN Duty Cycle Measurement. Figure 9. LinkSwitch-TN Output Enable Timing.

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 LNK302/304-306

Typical Performance Characteristics

1.1 1.2

PI-2680-012301
PI-2213-012301
1.0

(Normalized to 25 °C)
(Normalized to 25 °C)
Breakdown Voltage

Output Frequency
0.8

1.0 0.6

0.4

0.2

0.9 0
-50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125
Junction Temperature (°C) Junction Temperature (°C)
Figure 10. Breakdown vs. Temperature. Figure 11. Frequency vs. Temperature.

1.4 1.4

PI-3710-071204
PI-3709-111203

1.2 Normalized Current Limit 1.2

(Normalized to 25 °C)

1.0 1.0
Current Limit

0.8 0.8
Normalized
Normalized di/dt Normalized Current
0.6 di/dt = 1 0.6 di/dt = 1 Limit = 1
di/dt = 6 LNK302 55 mA/µs 136 mA
0.4 0.4 LNK304 65 mA/µs 257 mA
LNK305 75 mA/µs 375 mA
LNK306 95 mA/µs 482 mA
0.2 0.2

0 0
-50 0 50 100 150 1 2 3 4 5 6
Temperature (°C) Normalized di/dt
Figure 12. Current Limit vs. Temperature at Figure 13. Current Limit vs. di/dt.
Normalized di/dt.

7 400
PI-2240-012301

PI-3661-071404

6 350
BYPASS Pin Voltage (V)

25 °C
DRAIN Current (mA)

5 300
100 °C
4 250

3 200

2 150
Scaling Factors:
LNK302 0.5
1 100 LNK304 1.0
LNK305 2.0
0 50 LNK306 3.4

0
0 0.2 0.4 0.6 0.8 1.0 0 2 4 6 8 10 12 14 16 18 20
Time (ms) DRAIN Voltage (V)
Figure 14. BYPASS Pin Start-up Waveform. Figure 15. Output Characteristics.

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LNK302/304-306

Typical Performance Characteristics (cont.)

1000

PI-3711-071404
Drain Capacitance (pF)
100
Scaling Factors:
LNK302 0.5
LNK304 1.0
LNK305 2.0
LNK306 3.4
10

1
0 100 200 300 400 500 600
Drain Voltage (V)
Figure 16. COSS vs. Drain Voltage.

PART ORDERING INFORMATION

LinkSwitch Product Family
TN Series Number
Package Identifier
G Plastic Surface Mount DIP
P Plastic DIP
Lead Finish
Blank Standard (Sn Pb)
N Pure Matte Tin (Pb-Free)
Tape & Reel and Other Options
Blank Standard Configurations
LNK 304 G N - TL TL Tape & Reel, 1 k pcs minimum, G Package only

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 LNK302/304-306

DIP-8B
⊕ D S .004 (.10) .137 (3.48) Notes:
-E- MINIMUM 1. Package dimensions conform to JEDEC specification
MS-001-AB (Issue B 7/85) for standard dual-in-line (DIP)
package with .300 inch row spacing.
2. Controlling dimensions are inches. Millimeter sizes are
shown in parentheses.
3. Dimensions shown do not include mold flash or other
.240 (6.10)
protrusions. Mold flash or protrusions shall not exceed
.260 (6.60)
.006 (.15) on any side.
4. Pin locations start with Pin 1, and continue counter-clock-
wise to Pin 8 when viewed from the top. The notch and/or
dimple are aids in locating Pin 1. Pin 6 is omitted.
Pin 1 5. Minimum metal to metal spacing at the package body for
the omitted lead location is .137 inch (3.48 mm).
.367 (9.32) 6. Lead width measured at package body.
-D- 7. Lead spacing measured with the leads constrained to be
.387 (9.83)
.057 (1.45) perpendicular to plane T.
.068 (1.73)
(NOTE 6)
.125 (3.18) .015 (.38)
.145 (3.68) MINIMUM
-T-
SEATING .008 (.20)
PLANE .120 (3.05) .015 (.38)
.140 (3.56)
.300 (7.62) BSC
.100 (2.54) BSC .048 (1.22) (NOTE 7)
.014 (.36)
.053 (1.35) .300 (7.62) P08B
.022 (.56) ⊕ T E D S .010 (.25) M .390 (9.91) PI-2551-121504

SMD-8B
⊕ D S .004 (.10) .137 (3.48) Notes:
MINIMUM 1. Controlling dimensions are
inches. Millimeter sizes are
-E- shown in parentheses.
2. Dimensions shown do not
include mold flash or other
protrusions. Mold flash or
protrusions shall not exceed
.372 (9.45) .006 (.15) on any side.
.240 (6.10)
.388 (9.86) .420
.260 (6.60) 3. Pin locations start with Pin 1,
⊕ E S .010 (.25) and continue counter-clock-
.046 .060 .060 .046 wise to Pin 8 when viewed
from the top. Pin 6 is omitted.
4. Minimum metal to metal
.080 spacing at the package body
Pin 1 Pin 1
for the omitted lead location
.086 is .137 inch (3.48 mm).
.100 (2.54) (BSC)
.186 5. Lead width measured at
package body.
.286
.367 (9.32) 6. D and E are referenced
-D- Solder Pad Dimensions datums on the package
.387 (9.83)
body.
.057 (1.45)
.125 (3.18) .068 (1.73)
.145 (3.68) (NOTE 5)

.004 (.10)
.032 (.81) .048 (1.22)
.053 (1.35)
.009 (.23) .004 (.10) .036 (0.91) 0°- 8°
.037 (.94)
.012 (.30) .044 (1.12) G08B
PI-2546-121504

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 LNK302/304-306

Revision Notes Date

C 1) Released Final Data Sheet. 3/03
D 1) Corrected Minimum On Time. 1/04
E 1) Added LNK302. 8/04
F 1) Added lead-free ordering information. 12/04
G 1) Minor error corrections. 3/05
2) Renamed Feedback Pin Voltage parameter to Feedback Pin Voltage at Turnoff Threshold and
removed condition.

For the latest updates, visit our website: www.powerint.com

Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations does not assume
any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANTY HEREIN AND SPECIFICALLY
DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS.

PATENT INFORMATION
The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one or more U.S.
and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrationsʼ patents
may be found at www.powerint.com. Power Integrations grants its customers a license under certain patent rights as set forth at http://www.powerint.com/ip.htm.
LIFE SUPPORT POLICY
POWER INTEGRATIONSʼ PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS
WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF POWER INTEGRATIONS. As used herein:
1. A Life support device or system is one which, (i) is intended for surgical implant into the body, or (ii) supports or sustains life, and (iii) whose failure to perform,
when properly used in accordance with instructions for use, can be reasonably expected to result in significant injury or death to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or effectiveness.

The PI logo, TOPSwitch, TinySwitch, LinkSwitch, DPA-Switch, EcoSmart, PI Expert and PI FACTS are trademarks of
Power Integrations, Inc. Other trademarks are property of their respective companies. ©Copyright 2005, Power Integrations, Inc.

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