Introduction:
A phase-locked loop (also phase lock loop or PLL) is a system that
generates an output signal whose phase is related to its input. The two
signals will have the same frequency and either no phase difference or a
constant phase difference between them. A PLL typically consists of a
phase detector, a loop filter, and a voltage-controlled oscillator (VCO).
The phase detector compares the reference signal with the oscillator
frequency and outputs an error signal. The loop filter (a low-pass filter)
then generates an error voltage from the error signal. The VCO then
increases or decreases the oscillator frequency to lock to the input
frequency. This produces an output frequency that is equal to the input
frequency, and a constant phase shift (which could be zero) between the
two signals. A PLL may also have a frequency divider in its feedback
loop in order to create an output that is a multiple of the reference
frequency instead of one that is exactly equal to it. The three stages of a
phase-locked loop are free running, capture, and phase lock or tracking,
Free running- the center frequency of the PLL, which is the frequency
that the VCO runs at when not locked to the input frequency. Capture- in
order for the VCO to lock to the input frequency initially, the frequency
must be within the PLL’s capture range. Phase lock (or tracking)- once
the VCO has locked to the input frequency, it will continue to track and
adjust to the input frequency as long as it stays within the PLL’s lock
range. The lock range is wider than the capture range.
Objective:
The main objective of performing this lab is to get familiarize the
students with step by step working of phase locked loop circuit and its
applications in telecommunication engineering specifically for
demodulation of a message signal.
Procedure:
I implemented the given circuit of PLL in Pspice and obtained an output.
First block of component is basically VCO of PLL, second one is buffer,
third one is phase detector and the fourth one is filter.
Pspice Implementation:
Output:
1. Phase Detector:
Phase detector is basically a comparator-based circuit to which when an
input signal is applied it compares phase and frequency of this input
signal with the phase and frequency of the VCO free running frequency
(reference frequency). After comparator action it represents the phase
difference in the form of pulsating DC waveform with a duty-cycle
proportional to the phase difference ("error") between the given signal
and reference signal. The bigger the phase difference becomes (within
certain limits), the larger the duty cycle of the phase comparator’s output
becomes. If the two signals differ in phase and/or frequency, an error
voltage is generated.
Output of Phase Detector:
2. Voltage Controlled Oscillator:
Voltage controlled oscillator is connected next to the output of phase
detector through a loop filter. Its primary function is to convert the
output of phase detector (which is in digital form) into the analogue
frequency with respect to the error generated by phase detector. It is a
special oscillator called a VCO, or Voltage Controlled Oscillator. The
output frequency of the VCO is directly proportional to the error
voltage. Any deviation in the frequency and/or phase of the two input
signals to the phase comparator will generator error voltage which is
further converted to the deviation in free running frequency of the VCO.
In short, the VCO in effect converts the control voltage into frequency.
The PLL under normal conditions attempts to make the VCO output
frequency exactly equal to a second (reference) frequency.
Output of Voltage Controlled Oscillator:
3. Loop Filter:
Loop filter is the step right after the phase detector. The output of the
phase comparator is a pulsating DC with a varying duty cycle. But the
VCO needs a nice, steady DC voltage at its control voltage input. Also,
as phase comparator output is a pulse so it contains higher frequency
components which can disturb the tuning of VCO as well as useless for
VCO and therefore low pass filter is required to eliminate the useless
frequencies. In order to ensure this, the pulsating DC from the phase
comparator is fed into a loop filter on its way to the VCO. This filter in
effect "smoother" the rough phase comparator output waveform into a
fairly steady DC voltage and also rejects the un-necessary frequency
components present. The VCO is then able to smoothly track the input
reference frequency.
Output of Loop Filter:
Vpulse – Reference Input:
Results and Discussions:
Comment:
The frequency of VPULSE (reference signal) is 122.99 Hz, and that of
VCO output (Sinusoidal Output signal) is 120.099 Hz.
Change the frequency of reference input:
I changed the frequency of reference input, by doing so VCO output
followed the reference input frequency. But, every PLL works for
specific range of frequencies, as it gives correct output for specific
defined range of frequency.
Whether the starting frequency of sinusoidal output signal is high or
low, it will stabilize at a point when frequency and voltage of error
signal will start to decrease or increase to reach a stabilize point. Then,
our input signal will follow the reference input signal at this stage.
From this figure, we can see that error signal has high voltage at start
and then tends to stabilize.
By changing frequency of VPULSE, the desired output will be obtained
for a specific range. Otherwise, frequency and phase will not be detected
by PLL.
Conclusion:
The input signal is directly proportional to the output frequency of the
VCO. The input and output frequencies are compared and adjusted
through the feedback loop until the output frequency is equal to the input
frequency. Hence, the PLL works like free running, capture, and phase
lock. It is used in motor speed controls and tracking filters. It is used in
frequency shifting decodes for demodulation carrier frequencies. It is
used in time to digital converters. It is used for Jitter reduction, skew
suppression, clock recovery. So, PLL can be used in many of real-world
applications.
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