TB6564AHQ(THB6064AH)

TOSHIBA BiCD Integrated Circuit Silicon Monolithic

TB6564AHQ (THB6064AH)
PWM Chopper-Type bipolar
Stepping Motor Driver IC
TB6564AHQ(THB6064AH)
The TB6564AHQ(THB6064AH) is a PWM chopper-type
sinusoidal micro-step bipolar stepping motor driver IC.
It supports 8 kind of excitation modes and forward/reverse mode
and is capable of low-vibration, high-performance drive of
2-phase bipolar type stepping motors using only a clock signal.

Features
• Single-chip bipolar sinusoidal micro-step stepping motor
driver Weight:
• Uses high withstand voltage BiCD process: HZIP25-P-1.27: 9.86 g (typ.)
Ron (upper  lower) = 0.4 Ω (typ.)
• Forward and reverse rotation control available
• Selectable phase drive (1/2,1/8,1/10, 1/16, 1/20, 1/32, 1/40, 1/64 step)
• Output withstand voltage: VDSS = 50 V
• Output current: IOUT = 4.5 A (absolute maximum ratings, peak, within 100ms)
IOUT = 4.0 A (operating range, maximal value)
• Packages: HZIP25-P-1.27
• Output monitor pins (DOWN / ALERT)
• Equipped with reset and enable pins
• Built-in thermal shutdown(TSD) and over-current detection(ISD) circuit

The TB6564AHQ(THB6064AH) is a Sn-Ag plated product including Pb.

The following conditions apply to solderability:
*Solderability
1. Use of Sn-37Pb solder bath
*solder bath temperature = 230°C
*dipping time = 5 seconds
*number of times = once
*use of R-type flux
2. Use of Sn-3.0Ag-0.5Cu solder bath
*solder bath temperature = 245°C
*dipping time = 5 seconds
*the number of times = once
*use of R-type flux

These ICs are highly sensitive to electrostatic discharge. When handling them, ensure that the environment is
protected against electrostatic discharge. Ensure also that the ambient temperature and relative humidity are
maintained at reasonable level.

ESD(Electro-Static Discharge) ： HBM±1500V, MM±150V (design target value)

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Block Diagram

VDD DOWN ALERT VMA

24 25 1 20
OUT1A
M1 7 OSC1 16
DOWN Pre H-Bridge
driver A
M2 8 -detect -drive

14

9 OUT2A
M3
CLK
NFA
TSD / ISD 15
CW/CCW 22
Input
circuit
CLK 21 Current selector
circuit A
System CLK VMB
RESET 19 6

OUT1B
ENABLE 18 12
Pre H-Bridge
-drive driver B
DCY1 3
10
OUT2B
DCY2 4

Current selector NFB

11
circuit B
OSC2 23 OSC2 1/3

5 2 17 13
Vref

SGND PGNDA PGNDB

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Pin Functions

Pin No. I/O Symbol Functional Description Remark

1 Output ALERT TSD / ISD monitor pin

2 ⎯ SGND Signal ground
3 Input DCY1 Mixed decay ratio setting pin Built-in pull-down resistor
4 Input DCY2 Mixed decay ratio setting pin Built-in pull-down resistor
5 Input Vref Voltage input for 100% current level
6 Input VMB Power supply
7 Input M1 Excitation mode setting input pin Built-in pull-down resistor
8 Input M2 Excitation mode setting input pin Built-in pull-down resistor
9 Input M3 Excitation mode setting input pin Built-in pull-down resistor
10 Output OUT2B B channel output 2
11 ⎯ NFB B channel output current detection pin Connect external resistor
12 Output OUT1B B channel output 1
13 ⎯ PGNDB Power ground
14 Output OUT2A A channel output 2
15 ⎯ NFA B channel output current detection pin Connect external resistor
16 Output OUT1A A channel output 1
17 ⎯ PGNDA Power ground
H: Enable, L: all output off
18 Input ENABLE Enable signal input pin
Built-in pull-down resistor
19 Input RESET Reset signal input pin Built-in pull-down resistor
20 Input VMA Power supply
21 Input CLK CLK pulse input pin Built-in pull-down resistor
L: Forward, H: reverse
22 Input CW/CCW Forward/reverse control pin
Built-in pull-down resistor
23 ⎯ OSC2 Resistor connection pin for chopping frequency setting Connect external resistor
24 input VDD Control side power pin
25 Output DOWN CLK frequency monitor pin

<Terminal circuits>

Input pins
Output pins
(M1, M2, M3, CLK, CW/CCW,
(DOWN and ALERT)
DCY1, DCY2, ENABLE and
RESET)

VDD

100 Ω
100 kΩ

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Absolute Maximum Ratings (Ta = 25°C)

Characteristic Symbol Rating Unit

VDD 6
Power supply voltage V
VMA/B 50

Output current IO (PEAK) 4.5(Note 1) A/phase

I ALERT
Drain current (ALERT, DOWN) 1 mA
I DOWN

Input voltage VIN 5.5 V

5 (Note 2)
Power dissipation PD W
43 (Note 3)

Operating temperature Topr −30 to 85 °C

Storage temperature Tstg −55 to 150 °C

Note 1: T = 100ms

Note 2: Ta = 25°C, No heat sink.

Note 3: Ta = 25°C, with infinite heat sink.

Operating Range (Ta = −30 to 85°C)

Characteristic Symbol Test Condition Min Typ. Max Unit

VDD ⎯ 4.5 5.0 5.5

Power supply voltage V
VMA/B VMA/B ≧ VDD 4.5 ⎯ 42

Output current IOUT ⎯ ⎯ ⎯ 4 A

VIN ⎯ 0 ⎯ 5.5
Input voltage V
Vref(*) ⎯ 0.5 ⎯ 3.0

Clock frequency(**) fCLK ⎯ ⎯ ⎯ 200 kHz

Chopping frequency fchop (design target value) 15 40 65 kHz

OSC frequency fOSC2 2.6 4.0 5.4 MHz

（*） Do not apply 3.5V or over to the Vref terminal.

(**) IC can not be damaged within 200kHz. However, the customer can accept that a motor does not always rotate at
high frequency of CLK.

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Electrical Characteristics (Ta = 25°C, VDD = 5V, VM = 24V)

Control circuit

Characteristic Symbol Test Condition Min Typ. Max Unit

High VIN (H) 2.0 ⎯ VDD

Input voltage M1, M2, M3, CW/CCW, CLK, V
Low VIN (L) RESET, ENABLE, DCY1, DCY2 −0.2 ⎯ 0.8
Input hysteresis voltage VH ⎯ 400 ⎯ mV
M1, M2, M3, CW/CCW, CLK,
IIN (H) RESET, ENABLE, DCY1, DCY2 ⎯ 55 80
Input current VIN = 5.0 V μA

IIN (L) VIN = 0 V ⎯ ⎯ 1

Output open,
IDD1 RESET: H, ENABLE: H ⎯ 3 7
M1:L, M2:L, M3:L (1/2-step mode)
VDD supply current mA
IDD2 RESET: L, ENABLE: H ⎯ 2 7
IDD3 RESET: L, ENABLE: L ⎯ 2 7
IM1 RESET: H/L, ENABLE: L ⎯ 0.5 ⎯
VM supply current mA
IM2 RESET: H/L, ENABLE: H ⎯ 1 ⎯

Vref input Input current IIN(ref) Vref=3.0V ⎯ ⎯ 1 μA

circuit Divider ratio Vref/VNF Maximum current : 100% ⎯ 3 ⎯ ⎯

tCLKH
Minimum CLK pulse width 2.3 ⎯ ⎯ μs
tCLKL

VOL DOWN
Output residual voltage IOL = 1 mA ⎯ ⎯ 0.5 V
VOL ALERT

TSD operation temperature(Note) TSD (Design target value) ⎯ 170 ⎯ °C

TSD hysteresis (Note) TSDhys (Design target value) ⎯ 40 ⎯ °C
Oscillation frequency fosc1 using built-in capacitor and resistor 50 100 200 kHz
Oscillation frequency fosc2 ROSC = 51kΩ 2.6 4.0 5.4 MHz
Oscillation
Detection CLK
circuit for fdetect using built-in capacitor and resistor 1.0 2.0 4.0 Hz
frequency
CLK monitor

Note: Pre-shipment testing is not performed.

Output Block

Characteristic Symbol Test Condition Min Typ. Max Unit

Output ON resistor RonH + RonL IOUT = 4 A ⎯ 0.4 0.6 Ω

Output transistor switching tr RL = 2 Ω, VNF = 0 V, ⎯ 1.5 ⎯

μs
characteristics tf CL = 15 pF ⎯ 0.5 ⎯
Upper side ILH ⎯ ― 5
Output leakage current VM = 50 V μA
Lower side ILL ⎯ ― 5

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Description of Functions
1. Excitation Settings
The excitation mode can be selected from the following eight modes using the M1, M2 and M3 inputs. (The
default is 1/2 excitation using the internal pull-down.)
Please be sure to set up ‘Low’ or ‘High’ always at M1, M2 and M3 terminals.
Although M1、M2 and M3 terminals have built-in pull-down resistors, please do not keep M1、M2 and M3
terminals open. New excitation mode starts from the initial mode when M1, M2, or M3 inputs are shifted
during motor operation. (Specifications of the TB6564HQ are the same as the TB6564AHQ about it.)

Input Mode
M1 M2 M3 (Excitation)

L L L 1/2
L L H 1/8

L H L 1/10

L H H 1/16

H L L 1/20
H L H 1/32
H H L 1/40
H H H 1/64

2. Function
When the ENABLE signal goes Low level, it sets an OFF on the output. The output changes to the Initial
mode shown in the table below when the RESET signal goes Low level. In this mode, the status of the CLK
and CW/CCW pins are irrelevant.

Input
Output Mode
CLK CW/CCW RESET ENABLE
L H H CW
H H H CCW
X X L H Initial mode
X X X L Z
X: Don’t care

3. Initial Mode
When RESET is used, the phase currents are as follows.

Excitation Mode A Phase Current B Phase Current

1/2 step 100% 0%

1/8 step 100% 0%
1/10 step 100% 0%
1/16 step 100% 0%
1/20 step 100% 0%
1/32 step 100% 0%
1/40 step 100% 0%
1/64 step 100% 0%

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4. 100% current Settings (Current Value)

100% current value is determined by Vref inputted from external part and the external resistance for
detecting output current.
Vref is doubled 1/3 inside IC, and compared with VRS.
Io(100%) = Vref x 1/3 x 1/Rs
The average current is lower than the calculated value because this IC has the method of peak current
detection.

5. OSC1 and OSC2

(1)OSC1：
Triangle wave is generated internally by CR oscillation with the capacitor and the resistor in the IC.

fosc1 = 100 kHz

(2)OSC2：
Triangle wave is generated internally by CR oscillation by connecting external resistor to OSC2 terminal.
Rosc2: 24kΩ ≦ Rosc2 ≦ 180kΩ
Relation of external resistor and frequency (fchop) is as follows;
Values of the table below are design target values.

Rosc2(kΩ) fchop(kHz)
180 15
51 40
24 65

6. Decay Mode Settings

It takes approximately five OSC cycles for discharging a current in PWM mode. The 20% fast decay mode is
created by inducing decay during the last cycle in Fast Decay mode; the 40% fast Decay mode is created by
inducing decay during the last two cycles in Fast Decay mode; the 60% fast Decay mode is created by
inducing decay during the last three cycles in Fast Decay mode; the 80% fast Decay mode is created by
inducing decay during the last four cycles in Fast Decay mode.
Since the DCY1 and DCY2 pins have internal pull-down resistors, the 20% fast decay mode is selected
when DCY1 and DCY2 are undriven.

Dcy2 Dcy1 Current Decay Setting

L L 20% Fast Decay

L H 40% Fast Decay
H L 60% Fast Decay
H H 80% Fast Decay

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7. Current Waveforms and Mixed Decay Mode Settings

The period of PWM operation is equal to five periods of OSCM. OSCM is equal to 1/20 of OSC2. The current
decay rate of the Decay mode operation can be determined by the DCY1 and DCY2 inputs for
constant-current control.
The “NF” refers to the point at which the output current reaches its predefined current level.
The smaller the MDT value, the smaller the current ripple amplitude. However, the current decay rate
decreases.

fchop

OSCM
Internal
Waveform
Predefined Current Level

NF
20%
fast
Decay MDT
Mode
Charge mode → NF: Predefined current level → Slow mode →
Mixed decay timing → Fast mode → Current monitoring → (When
predefined current level > Output current) Charge mode

Predefined Current Level

NF
40%
fast
Decay MDT
Mode
Charge mode → NF: Predefined current level → Slow mode →
Mixed decay timing → Fast mode → Current monitoring → (When
predefined current level > Output current) Charge mode

Predefined Current Level

60% NF
fast
Decay
MDT
Mode

Charge mode → NF: Predefined current level → Slow mode →

Mixed decay timing → Fast mode → Current monitoring → (When
predefined current level > Output current) Charge mode

Predefined Current Level

80% NF
fast
Decay
Mode MDT

Charge mode → NF: Predefined current level → Slow mode →

Mixed decay timing → Fast mode → Current monitoring → (When
predefined current level > Output current) Charge mode

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8. Current Control Modes (Effects of Decay Modes)

• Increasing the current (sine wave)

Slow Slow
Predefined
Current Level
Fast Charge
Fast
Slow Slow Charge
Predefined
Current Level
Charge Fast Charge Fast

• Decreasing the current with a high decay rate (The current decay rate in Mixed Decay mode is the ratio
between the time in Fast-Decay mode (discharge time after MDT) and the remainder of the period.)

Slow Slow Since the current decays quickly, it can be

Predefined decreased to the predefined value in a short time.
Current Level Charge
Fast

Charge
Fast

Slow
Slow
Predefined
Current Level

Fast Fast
Charge

• Decreasing the current with a low decay rate (The current decay rate in Mixed Decay mode is the ratio
between the time in Fast-Decay mode (discharge time after MDT) and the remainder of the period.)

Since the current decays slowly, decreasing the current

to the predefined value takes a long time (or the current
cannot be properly decreased to the predefined value).

Slow Slow
Predefined
Current Level Fast Fast
Charge Slow
Charge
Fast Slow

Fast
Predefined
Current Level

During Mixed Decay and Fast Decay modes, if the predefined current level is less than the output
current at the RNF (current monitoring point), the Charge mode in the next chopping cycle will
disappear (though the current control mode is briefly switched to Charge mode in actual operations for
current sensing) and the current is controlled in Slow and Fast Decay modes (mode switching from Slow
Decay mode to Fast Decay mode at the MDT point).
Note: The above figures are rough illustration of the output current. In actual current waveforms, transient
response curves can be observed.

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9. Current Waveforms in Mixed Decay Mode

fchop fchop
OSCM
Internal
Waveform

IOUT Predefined
Current Level
NF
Predefined
Current Level
NF

20%
Fast
DECAY
MODE
MDT (MIXED DECAY TIMMING) Points

• When the NF points come after Mixed Decay Timing points

Switches to Fast mode after Charge mode

fchop fchop
Predefined
Current Level

IOUT NF
MDT (MIXED DECAY TIMMING) Points

Predefined NF
設定電流値
Current Level

20%
Fast
DECAY
MODE
CLK Signal Input

• When the output current value > predefined current level in Mixed Decay mode

fchop fchop fchop

Predefined
設定電流値
Current Level
NF

IOUT
NF
Predefined
Current Level
20%
Fast
DECAY MDT (MIXED DECAY TIMMING) Points
MODE

CLK Signal Input

Switches to Charge mode briefly

*: Even if the output current rises above the predefined current at the RNF point, the current control mode is
briefly switched to Charge mode for current sensing.

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13.Thermal Shut-Down circuit

The IC incorporates a thermal shutdown circuit. When the junction temperature (Tj) reaches 170°C (typ.),
the output power MOSFETs are turned off.
The output power MOSFETs are turned on automatically.
The IC has 40°C of temperature hysteresis.
TSD = 170°C (target spec) (Note)
ΔTSD = 40°C (target spec) (Note)

170°C (typ.)
130°C (typ.)
Junction temperature
TSD

H
ALERT output
L

Note: Pre-shipment testing is not performed.

14. ISD (Over current detection)

Current that flow through output power MOSFETs are monitored individually. If over-current is detected in at
least one of all output power MOSFETs, all output power MOSFETs are turned off then this status is kept until
ENABLE signal is input. Target value in design is 6A and dispersion of ±1.5A should be considered.

ISD = 6A (typ.) ±1.5A (Note)

6.0A (typ.)
Output power MOSFET
drain current
Insensitive
Period Output :off Output :on
(4us(typ.))
H
ALERT output
L

H
ENABLE input 0.15ms(min.)
L

Note: Pre-shipment testing is not performed.

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15. Low voltage detection (UVLO) circuit

（１）VDD ：
Outputs are shutoff by operating at 3.9V (Typ.) of VDD or less.
It has a hysteresis of 0.1V(Typ.) and recover to output when VDD reaches 4.0V(Typ.).

（２）VM ：
Outputs are shutoff by operating at 3.9V (Typ.) of VM or less.
It has a hysteresis of 0.1V(Typ.) and recover to output when VDD reaches 4.0V(Typ.).

・The state of internal IC when the ULVO circuit is driving

The states of the internal IC, outputs, and the IC after recovery correspond to both the enable mode and the
initial mode.

When VDD or VM falls to around 3.9V and UVLO operates, output turns off.
It recovers automatically from the initial state when both VDD and VM rise to around 4.0V or more.

16. ALERT output

ALERT pin outputs the state of TSD and ISD. When TSD or ISD circuit is under detection, ALERT pin state
changes from high impedance to low.

VALERT = 0.5V (max.) at 1mA

TSD ISD ALERT pin

Under TSD detection Under TSD detection

Normal Under TSD detection Low Open-drain connection
Under TSD detection Normal
Normal Normal Z

17. DOWN
When IC detects CLK frequency less than 2.0Hz, output of DOWN pin turns to LOW.

Pin State DOWN

Low fCLK ≦ 2.0Hz

Z fCLK ＞ 2.0Hz

fdetect = 1.0Hz(min.) ～ 4.0Hz(max.)

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Relationship between Enable, RESET and Output (OUT)

Ex-1: ENABLE 1/2-step mode(M1: L, M2: L, M3: L)

CW

CLK

ENABLE

RESET

(%)
100
71

IA 0

−71
−100

t0 t1 t2 t3 OFF t7 t8 t9 t10 t11 t12

The ENABLE signal at Low level disables only the output signals. Internal logic functions proceed in
accordance with input clock signals and without regard to the ENABLE signal. Therefore output current is
initiated by the timing of the internal logic circuit after release of disable mode.

Ex-2: RESET 1/2-step mode (M1: L, M2: L, M3: L)

CW

CLK

ENABLE

RESET

(%)
100
71

IA 0

−71
−100

t0 t1 t2 t3 t2 t3 t4 t5 t6 t7 t8

When the RESET signal goes Low level, output goes Initial state (Initial state: A Channel output current is
100%).
Once the RESET signal returns to High level, output continues from the next state after Initial from the next
raise in the Clock signal.

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Sequences of output waveform IA/IB at each excitation mode

1/2-step Excitation Mode (M1: L, M2: L, M3: L, CW Mode)

CLK

(%)
100
71

IA 0

−71
−100

(%)
100
71

IB 0

−71
−100

t0 t1 t2 t3 t4 t5 t6 t7 t8

1/2-step Excitation Mode (M1: L, M2: L, M3: L, CCW Mode)

CLK

(%)
100
71

IA 0

−71
−100

(%)
100
71

IB 0

−71
−100

t0 t1 t2 t3 t4 t5 t6 t7 t8

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1/8-Step Excitation Mode (M1: H, M2: L, M3: H, CW Mode)

CLK

(%)
100
98
92
83
71

56

38

20
IA
0

−20

−38

−56

−71

−92
−98
−100

(%)
100
98
92
83
71
56

20
IB
0

−20

−38

−56

−71

−98
−100

t0 t1 t2 t3 t4 t5 t6 t7 t8 t9 t10 t11 t12 t13 t14 t15 t16 t17 t18 t19 t20 t21 t22 t23 t24 t25 t26 t27 t28 t29 t30 t31 t32

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1/8-Step Excitation Mode (M1: H, M2: L, M3: H, CCW Mode)

CLK

(%)
100
98
92
83
71

56

38

20

IA 0

−20

−38

−56

−71

−92
−98
−100

(%)
100
98
92
83
71
56

20

IB 0

−20

−38

−56

−71

−98
−100

t0 t1 t2 t3 t4 t5 t6 t7 t8 t9 t10 t11 t12 t13 t14 t15 t16 t17 t18 t19 t20 t21 t22 t23 t24 t25 t26 t27 t28 t29 t30 t31 t32

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1/10-step Excitation Mode (M1: L, M2: H, M3: L, CW Mode)

CLK

[%]

100

80 IA

60

IB
40

20

-20

-40

-60

-80

-100
t0････････････････････････････････････････････････････････････････････････････････････････････････････t40

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1/10-step Excitation Mode (M1: L, M2: H, M3: L, CCW Mode)

CLK

[%]

100

80
IA

60 IB

40

20

-20

-40

-60

-80

-100
t0････････････････････････････････････････････････････････････････････････････････････････････････････t40

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 TB6564AHQ(THB6064AH)

1/16-step Excitation Mode (M1: L, M2: H, M3: H, CW Mode)

CLK

[%]
100
98
96
92
88
83
77
71
63
IA
56
47
38 IB
29

20

10

−10

−20

−29

−38
−47
−56
−63
−71
−77
−83
−88
−92
−96
−98
−100
t0･･･････････････････････････････････････････････････････････････････････････････････････････････････････････････････････t64

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1/16-step Excitation Mode (M1: L, M2: H, M3: H, CCW Mode)

CLK

[%]
100
98
96
92
88
83
77 IA
71
63
56
47
38 IB
29

20

10

−10

−20

−29

−38
−47
−56
−63
−71
−77
−83
−88
−92
−96
−98
−100
t0･･･････････････････････････････････････････････････････････････････････････････････････････････････････････････････････t64

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 TB6564AHQ(THB6064AH)

1/20-step Excitation Mode (M1: H, M2: L, M3: L, CW Mode)

CLK

[%]
100

IA
80

60

40 IB

20

-20

-40

-60

-80

-100
t0･･････････････････････････････････････････････････････････････････････････････････････････････････････････････････････････････t80

21 V1.0 2011-03-01
 TB6564AHQ(THB6064AH)

1/20-step Excitation Mode (M1: H, M2: L, M3: L, CCW Mode)

CLK

[%]
100

IA
80

60

IB
40

20

-20

-40

-60

-80

-100
t0･･･････････････････････････････････････････････････････････････････････････････････････････････････････････････････････････････････t80

22 V1.0 2011-03-01
 TB6564AHQ(THB6064AH)

1/32-step Excitation Mode (M1: H, M2: L, M3: H, CW Mode)

Enlarged
below

CLK ･････
[%]
100

80

60
IA
40
IB
20

－20

－40

－60

－80

－100

t0･･････････････････････････････････････････････････････････････････････････････････････････････････････････････････････････････t128

Enlarged
CLK

Current level[%]

23 V1.0 2011-03-01
 TB6564AHQ(THB6064AH)

1/32-step Excitation Mode (M1: H, M2: L, M3: H, CCW Mode)

Enlarged
below

CLK ･････
[%]
100

80
IA
60

40
IB
20

－20

－40

－60

－80

－100

t0･･････････････････････････････････････････････････････････････････････････････････････････････････････････････････････････････t128

Enlarged
CLK

Current level[%]

24 V1.0 2011-03-01
 TB6564AHQ(THB6064AH)

1/40-step Excitation Mode (M1: H, M2: H, M3: L, CW Mode)

Enlarged below
CLK
･･･････････････････････････････････････････････････････････････････････････････････････････････････････････

100

80

60
IA

40

IB
20

-20

-40

-60

-80

-100

t0･････････････････････････････････････････････････････････････････････････････････････････････････････････････････････････････････t160

Enlarged
CLK

Current level[%]

25 V1.0 2011-03-01
 TB6564AHQ(THB6064AH)

1/40-step Excitation Mode (M1: H, M2: H, M3: L, CCW Mode)

Enlarged below
CLK
･･･････････････････････････････････････････････････････････････････････････････････････････････････････････

100

80

IA
60

40 IB

20

-20

-40

-60

-80

-100
t0･････････････････････････････････････････････････････････････････････････････････････････････････････････････････････････････････t160

Enlarged
CLK

Current level[%]

26 V1.0 2011-03-01
 TB6564AHQ(THB6064AH)

1/64-step Excitation Mode (M1: H, M2: H, M3: H, CW Mode)

Enlarged below
CLK
････････････････････････････････････････････････････････････････････････････････････････････････････････････
100
[%]

80

IA

60
IB

40

20

-20

-40

-60

-80

-100
t0･･････････････････････････････････････････････････････････････････････････････････････････････････････････････････････････････････t256

Enlarged
CLK

Current level[%]

27 V1.0 2011-03-01
 TB6564AHQ(THB6064AH)

1/64-step Excitation Mode (M1: H, M2: H, M3: H, CCW Mode)

Enlarged below
CLK
100
････････････････････････････････････････････････････････････････････････････････････････････････････････････
[%]

80 IA

60

IB

40

20

-20

-40

-60

-80

-100

t0･･････････････････････････････････････････････････････････････････････････････････････････････････････････････････････････････････t256

Enlarged
CLK

Current level[%]

28 V1.0 2011-03-01
 TB6564AHQ(THB6064AH)

Current level

C u rre n t le ve l ( 1 / 6 4 , 1 / 3 2 , 1 / 1 6 , 1 / 8 , 1 / 2 )
1/64, 1/64,
1/32,1/16, Min. Typ. Max. Unit 1/32,1/16, Min. Typ. Max. Unit
1/8,1/2 1/8,1/2
θ64 --- 100.0 --- θ32 66.7 70.7 74.7
θ63 96.0 100.0 100.0 θ31 65.0 69.0 73.0
θ62 95.9 99.9 100.0 θ30 63.2 67.2 71.2
θ61 95.7 99.7 100.0 θ29 61.3 65.3 69.3
θ60 95.5 99.5 100.0 θ28 59.4 63.4 67.4
θ59 95.2 99.2 100.0 θ27 57.5 61.5 65.5
θ58 94.9 98.9 100.0 θ26 55.6 59.6 63.6
θ57 94.5 98.5 100.0 θ25 53.6 57.6 61.6
θ56 94.1 98.1 100.0 θ24 51.6 55.6 59.6
θ55 93.6 97.6 100.0 θ23 49.5 53.5 57.5
θ54 93.0 97.0 100.0 θ22 47.4 51.4 55.4
θ53 92.4 96.4 100.0 θ21 45.3 49.3 53.3
θ52 91.7 95.7 99.7 θ20 43.1 47.1 51.1
θ51 91.0 95.0 99.0 θ19 41.0 45.0 49.0
θ50 90.2 94.2 98.2 θ18 38.8 42.8 46.8
θ49 89.3 93.3 97.3 θ17 36.5 40.5 44.5
％
θ48 88.4 92.4 96.4 θ16 34.3 38.3 42.3 ％
θ47 87.4 91.4 95.4 θ15 32.0 36.0 40.0
θ46 86.4 90.4 94.4 θ14 29.7 33.7 37.7
θ45 85.3 89.3 93.3 θ13 27.4 31.4 35.4
θ44 84.2 88.2 92.2 θ12 25.0 29.0 33.0
θ43 83.0 87.0 91.0 θ11 22.7 26.7 30.7
θ42 81.8 85.8 89.8 θ10 20.3 24.3 28.3
θ41 80.5 84.5 88.5 θ9 17.9 21.9 25.9
θ40 79.1 83.1 87.1 θ8 15.5 19.5 23.5
θ39 77.8 81.8 85.8 θ7 13.1 17.1 21.1
θ38 76.3 80.3 84.3 θ6 10.7 14.7 18.7
θ37 74.8 78.8 82.8 θ5 8.2 12.2 16.2
θ36 73.3 77.3 81.3 θ4 5.8 9.8 13.8
θ35 71.7 75.7 79.7 θ3 3.4 7.4 11.4
θ34 70.1 74.1 78.1 θ2 0.9 4.9 8.9
θ33 68.4 72.4 76.4 θ1 0.0 2.5 6.5
θ0 --- 0.0 ---

29 V1.0 2011-03-01
 TB6564AHQ(THB6064AH)

Current lev el ( 1/40, 1/20, 1/10 )

1/40,
1/20, Min. Typ. Max. Unit
1/10
θ40 --- 100.0 ---
θ39 95.9 99.9 100.0
θ38 95.7 99.7 100.0
θ37 95.3 99.3 100.0
θ36 94.8 98.8 100.0
θ35 94.1 98.1 100.0
θ34 93.2 97.2 100.0
θ33 92.2 96.2 100.0
θ32 91.1 95.1 99.1
θ31 89.8 93.8 97.8
θ30 88.4 92.4 96.4
θ29 86.8 90.8 94.8
θ28 85.1 89.1 93.1
θ27 83.2 87.2 91.2
θ26 81.3 85.3 89.3
θ25 79.1 83.1 87.1
θ24 76.9 80.9 84.9
θ23 74.5 78.5 82.5
θ22 72.0 76.0 80.0
θ21 69.4 73.4 77.4
θ20 66.7 70.7 74.7 ％
θ19 63.9 67.9 71.9
θ18 60.9 64.9 68.9
θ17 57.9 61.9 65.9
θ16 54.8 58.8 62.8
θ15 51.6 55.6 59.6
θ14 48.2 52.2 56.2
θ13 44.9 48.9 52.9
θ12 41.4 45.4 49.4
θ11 37.9 41.9 45.9
θ10 34.3 38.3 42.3
θ9 30.6 34.6 38.6
θ8 26.9 30.9 34.9
θ7 23.1 27.1 31.1
θ6 19.3 23.3 27.3
θ5 15.5 19.5 23.5
θ4 11.6 15.6 19.6
θ3 7.8 11.8 15.8
θ2 3.8 7.8 11.8
θ1 0.0 3.9 7.9
θ0 --- 0.0 ---

30 V1.0 2011-03-01
 TB6564AHQ(THB6064AH)

Current Draw-out Path when ENABLE is Input in Mid Operation

When all the output transistors are forced OFF during Slow mode, the coil energy is drawn out in the
following modes:

Note: Parasitic diodes are indicated on the designed lines. However, these are not normally used in Mixed
Decay mode.

VM VM VM

U1 U2 U1 U2 U1 U2

ON OFF OFF OFF OFF OFF

Note Note Note

OUT1 OUT2 OUT1 OUT2 OUT1 OUT2

Load Load ENABLE is input Load
OFF ON ON L2 L1 L2

L1 L2 L1 ON OFF OFF

RNF RNF RNF

PGND PGND PGND

Charge Mode Slow Mode Force OFF Mode

As shown in the figure above, an output transistor has parasitic diodes.

Normally, when the energy of the coil is drawn out, each transistor is turned ON and the power flows in the
opposite-to-normal direction; as a result, the parasitic diode is not used. However, when all the output
transistors are forced OFF, the coil energy is drawn out via the parasitic diode.

31 V1.0 2011-03-01
 TB6564AHQ(THB6064AH)

Output Stage Transistor Operation Mode

VM VM VM

U1 U2 U1 U2 U1 U2

ON OFF OFF OFF OFF ON

Note Note Note

OUT1 OUT2 OUT1 OUT2 OUT1 OUT2

Load Load Load
OFF ON ON L2 L1 L2

L1 L2 L1 ON ON OFF

RNF RNF RNF

PGND PGND PGND

Charge Mode Slow Mode Fast Mode

Output Stage Transistor Operation Functions

CLK U1 U2 L1 L2

CHARGE ON OFF OFF ON

SLOW OFF OFF ON ON
FAST OFF ON ON OFF

Note: The above chart shows an example of when the current flows as indicated by the arrows in the above figures.
If the current flows in the opposite direction, refer to the following chart:

CLK U1 U2 L1 L2

CHARGE OFF ON ON OFF

SLOW OFF OFF ON ON
FAST ON OFF OFF ON

Upon transitions of above-mentioned functions, a dead time of about 300 ns (Design target value) is inserted
respectively.

32 V1.0 2011-03-01
 TB6564AHQ(THB6064AH)

Measurement Waveform

tCLK tCLK
CLK

tCLKL

Figure 1 Timing Waveforms and Names

VM
90% 90%

Vout（1A、2B、1B、2B）

10% 10%
GND
tr tf

Figure 2 Timing Waveforms and Names

33 V1.0 2011-03-01
 TB6564AHQ(THB6064AH)

Power Dissipation

TB6564AHQ （THB6064AH）

34 V1.0 2011-03-01
 TB6564AHQ(THB6064AH)

1. How to Turn on the Power

We would like to recommend a way to turn on the power as shown below. However, if you do not do what we
mentioned, IC can not break.

Turn on VDD. When the voltage has stabilized, turn on VMA/B.

In addition, set the Control Input pins to Low when inputting the power.
(All the Control Input pins are pulled down internally.)
Once the power is on, the CLK signal is received and excitation advances when RESET goes high and
excitation is output when ENABLE goes high. If only RESET goes high, excitation won't be output and only
the internal counter will advance. Likewise, if only ENABLE goes high, excitation won't advance even if
the CLK signal is input and it will remain in the initial state.
The following is an example:

<Recommended Control Input Sequence>

CLK

H
RESET L

H
ENABLE
L

H
OUT Z Output
L

Internal current Setting

Output current setting Z

Internal current setting: Invariable Internal current setting: Variable

Output OFF

2. Power Dissipation
The IC power dissipation is determined by the following equation:

P = VDD × IDD + IOUT × IOUT x Ron × 2 drivers

The higher the ambient temperature, the smaller the power dissipation.
Check the PD-Ta curve, and be sure to design the heat dissipation with a sufficient margin.

3. Heat Sink Fin Processing

The IC fin (rear) is electrically connected to the rear of the chip. If current flows to the fin, the IC will
malfunction. If there is any possibility of a voltage being generated between the IC GND and the fin, either
ground the fin or insulate it.

35 V1.0 2011-03-01
 TB6564AHQ(THB6064AH)

Application example
0.1μF 47μF
Fuse
To Vref 5V
24V
10kΩ
VDD DOWN VMA
1 ALERT 20
24 25
OUT1A
7 OSC1 16
M1 DOWN Pre H-Bridge
driver A 10mH
-detect -drive
8
M2 14

9 OUT2A
M3 CLK
NFA
MCU 15
22 TSD/ISD
CW/CCW Input 0.2Ω
circuit
21 Current selector
CLK circuit A VMB
System CLK
19 6 Fuse
RESET
OUT1B
0.1μF 47μF
18 12
ENABLE Pre H-Bridge
-drive driver B
3
24V
DCY1 10
OUT2B
4
DCY2
NFB
Current selector
11
circuit B
23 OSC2 0.2Ω
OSC2 2/5
51kΩ

5 Vref 2 17 13
5V
10kΩ 18kΩ
SGND PGNDA PGNDB
3.3kΩ

To DOWN

Note: Capacitors for the power supply lines should be connected as close to the IC as possible.

Usage Considerations

A large current might abruptly flow through the IC in case of a short-circuit across its outputs, a
short-circuit to power supply or a short-circuit to ground, leading to a damage of the IC. Also, the IC or
peripheral parts may be permanently damaged or emit smoke or fire resulting in injury especially if a
power supply pin (VDD, VMA and VMB) or an output pin (OUT1A, OUT2A, OUT1B and OUT2B) is
short-circuited to adjacent or any other pins. These possibilities should be fully considered in the design of
the output, VDD, VM, and ground lines.

A fuse should be connected to the power supply line.

(As for above notes, a possibility that the TB6564AHQ is damaged by large current is the same as the
TB6564HQ because specifications of the TB6564HQ are the same as the TB6564AHQ about it.)

36 V1.0 2011-03-01
 TB6564AHQ(THB6064AH)

Notes on Contents

1. Block Diagrams
Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified
for explanatory purposes.

2. Equivalent Circuits
The equivalent circuit diagrams may be simplified or some parts of them may be omitted for
explanatory purposes.

3. Timing Charts
Timing charts may be simplified for explanatory purposes.

4. Application Circuits
The application circuits shown in this document are provided for reference purposes only. Thorough
evaluation is required, especially at the mass production design stage.
Toshiba does not grant any license to any industrial property rights by providing these examples of
application circuits.

5. Test Circuits
Components in the test circuits are used only to obtain and confirm the device characteristics. These
components and circuits are not guaranteed to prevent malfunction or failure from occurring in the
application equipment.

IC Usage Considerations
Notes on handling of ICs

[1] The absolute maximum ratings of a semiconductor device are a set of ratings that must not be
exceeded, even for a moment. Do not exceed any of these ratings.
Exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result
injury by explosion or combustion.

[2] Use an appropriate power supply fuse to ensure that a large current does not continuously flow in
case of over current and/or IC failure. The IC will fully break down when used under conditions that
exceed its absolute maximum ratings, when the wiring is routed improperly or when an abnormal
pulse noise occurs from the wiring or load, causing a large current to continuously flow and the
breakdown can lead smoke or ignition. To minimize the effects of the flow of a large current in case
of breakdown, appropriate settings, such as fuse capacity, fusing time and insertion circuit location,
are required.

[3] If your design includes an inductive load such as a motor coil, incorporate a protection circuit into
the design to prevent device malfunction or breakdown caused by the current resulting from the
inrush current at power ON or the negative current resulting from the back electromotive force at
power OFF. IC breakdown may cause injury, smoke or ignition.
Use a stable power supply with ICs with built-in protection functions. If the power supply is
unstable, the protection function may not operate, causing IC breakdown. IC breakdown may cause
injury, smoke or ignition.

[4] Do not insert devices in the wrong orientation or incorrectly.

Make sure that the positive and negative terminals of power supplies are connected properly.
Otherwise, the current or power consumption may exceed the absolute maximum rating, and
exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result
injury by explosion or combustion.
In addition, do not use any device that is applied the current with inserting in the wrong orientation
or incorrectly even just one time.

37 V1.0 2011-03-01
 TB6564AHQ(THB6064AH)

Package Dimensions

Weight: 9.86 g (typ.)

38 V1.0 2011-03-01
 TB6564AHQ(THB6064AH)

RESTRICTIONS ON PRODUCT USE

• Toshiba Corporation, and its subsidiaries and affiliates (collectively “TOSHIBA”), reserve the right to make changes to
the information in this document, and related hardware, software and systems (collectively “Product”) without notice.

• This document and any information herein may not be reproduced without prior written permission from TOSHIBA.
Even with TOSHIBA’s written permission, reproduction is permissible only if reproduction is without
alteration/omission.

• Though TOSHIBA works continually to improve Product's quality and reliability, Product can malfunction or fail.
Customers are responsible for complying with safety standards and for providing adequate designs and safeguards for
their hardware, software and systems which minimize risk and avoid situations in which a malfunction or failure of
Product could cause loss of human life, bodily injury or damage to property, including data loss or corruption. Before
customers use the Product, create designs including the Product, or incorporate the Product into their own
applications, customers must also refer to and comply with (a) the latest versions of all relevant TOSHIBA information,
including without limitation, this document, the specifications, the data sheets and application notes for Product and
the precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the instructions
for the application with which the Product will be used with or for. Customers are solely responsible for all aspects of
their own product design or applications, including but not limited to (a) determining the appropriateness of the use of
this Product in such design or applications; (b) evaluating and determining the applicability of any information
contained in this document, or in charts, diagrams, programs, algorithms, sample application circuits, or any other
referenced documents; and (c) validating all operating parameters for such designs and applications. TOSHIBA
ASSUMES NO LIABILITY FOR CUSTOMERS' PRODUCT DESIGN OR APPLICATIONS.

• Product is intended for use in general electronics applications (e.g., computers, personal equipment, office equipment,
measuring equipment, industrial robots and home electronics appliances) or for specific applications as expressly
stated in this document. Product is neither intended nor warranted for use in equipment or systems that require
extraordinarily high levels of quality and/or reliability and/or a malfunction or failure of which may cause loss of human
life, bodily injury, serious property damage or serious public impact (“Unintended Use”). Unintended Use includes,
without limitation, equipment used in nuclear facilities, equipment used in the aerospace industry, medical equipment,
equipment used for automobiles, trains, ships and other transportation, traffic signaling equipment, equipment used to
control combustions or explosions, safety devices, elevators and escalators, devices related to electric power, and
equipment used in finance-related fields. Do not use Product for Unintended Use unless specifically permitted in this
document.

• Do not disassemble, analyze, reverse-engineer, alter, modify, translate or copy Product, whether in whole or in part.

• Product shall not be used for or incorporated into any products or systems whose manufacture, use, or sale is
prohibited under any applicable laws or regulations.

• The information contained herein is presented only as guidance for Product use. No responsibility is assumed by
TOSHIBA for any infringement of patents or any other intellectual property rights of third parties that may result from
the use of Product. No license to any intellectual property right is granted by this document, whether express or
implied, by estoppel or otherwise.

• ABSENT A WRITTEN SIGNED AGREEMENT, EXCEPT AS PROVIDED IN THE RELEVANT TERMS AND
CONDITIONS OF SALE FOR PRODUCT, AND TO THE MAXIMUM EXTENT ALLOWABLE BY LAW, TOSHIBA (1)
ASSUMES NO LIABILITY WHATSOEVER, INCLUDING WITHOUT LIMITATION, INDIRECT, CONSEQUENTIAL,
SPECIAL, OR INCIDENTAL DAMAGES OR LOSS, INCLUDING WITHOUT LIMITATION, LOSS OF PROFITS,
LOSS OF OPPORTUNITIES, BUSINESS INTERRUPTION AND LOSS OF DATA, AND (2) DISCLAIMS ANY AND
ALL EXPRESS OR IMPLIED WARRANTIES AND CONDITIONS RELATED TO SALE, USE OF PRODUCT, OR
INFORMATION, INCLUDING WARRANTIES OR CONDITIONS OF MERCHANTABILITY, FITNESS FOR A
PARTICULAR PURPOSE, ACCURACY OF INFORMATION, OR NONINFRINGEMENT.

• Do not use or otherwise make available Product or related software or technology for any military purposes, including
without limitation, for the design, development, use, stockpiling or manufacturing of nuclear, chemical, or biological
weapons or missile technology products (mass destruction weapons). Product and related software and technology
may be controlled under the Japanese Foreign Exchange and Foreign Trade Law and the U.S. Export Administration
Regulations. Export and re-export of Product or related software or technology are strictly prohibited except in
compliance with all applicable export laws and regulations.

• Please contact your TOSHIBA sales representative for details as to environmental matters such as the RoHS
compatibility of Product. Please use Product in compliance with all applicable laws and regulations that regulate the
inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. TOSHIBA assumes no
liability for damages or losses occurring as a result of noncompliance with applicable laws and regulations.

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