TB67S269FTG

TOSHIBA BiCD Integrated Circuit Silicon Monolithic

TB67S269FTG
CLOCK-in controlled Bipolar Stepping Motor Driver
The TB67S269 is a two-phase bipolar stepping motor driver
using a PWM chopper. The clock in decoder is built in. FTG
Fabricated with the BiCD process, rating is 50 V/2.0 A .

Features
・BiCD process integrated monolithic IC.
・Capable of controlling 1 bipolar stepping motor. P-WQFN48-0707-0.50-003
・PWM controlled constant-current drive.
Weight 0.10g (typ.)
・Allows full, half, quarter, 1/8, 1/16, 1/32 step operation.
・Low on-resistance (High + Low side=0.8Ω(typ.)) MOSFET
output stage.
・High efficiency motor current control mechanism (Advanced
Dynamic Mixed Decay)
・High voltage and current (For specification, please refer to absolute
maximum ratings and operation ranges)
・Error detection (TSD/ISD) signal output function
・Built-in error detection circuits (Thermal shutdown (TSD)、over-current
shutdown (ISD), and power-on reset (POR))
・Built-in VCC regulator for internal circuit use.
・Chopping frequency of a motor can be customized by external resistance
and condenser.
・Multi package lineup
TB67S269FTG: P-WQFN48-0707-0.50-003

Note) Please be careful about thermal conditions during use.

©2014 TOSHIBA CORPORATION 1 2014-10-8

 TB67S269FTG
Pin assignment (TB67S269)
(Top View)

OUTB+
OUTB+
VCC

RSB
RSB
VM
NC

NC

NC

NC

NC
NC
36 35 34 33 32 31 30 29 28 27 26 25
NC 37 24 NC
LO 38 23 NC
DMODE0 39 22 GND

GND 40 21 OUTB-
VREFB 41 20 OUTB-
42 FTG 19 GND
VREFA
OSCM 43 18 GND

CW/CCW 44 17 OUTA-
MO 45 16 OUTA-

DMODE1 46 15 GND

DMODE2 47 14 NC

NC 48 13 NC

1 2 3 4 5 6 7 8 9 10 11 12
CLK

RSA
RSA
ENABLE

OUTA+
OUTA+
RESET
GND
NC

NC

NC
NC

Please mount the four corner pins of the QFN package and the exposed pad to the GND area of the PCB.

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TB67S269 Block diagram

OSCM
DMODE0 OSC-Clock Motor
Standby Converter Oscillator
DMODE1 Control
+ VCC
System VCC
DMODE2 Step Regulator
Oscillator
Resolution
Selector VM
Power-on
Signal Reset
CW/CCW Decode
Logic
CLK VREFA
Current
Current Reference
RESET VREFB
Level Setting
Set
ENABLE

MO LO
Angle monitor Error Output

Current Motor Control Logic Current

Comp Comp

Predriver TSD Predriver

RSA
RSB
ISD

GND

OUTA+ OUTB+
OUTA- OUTB-

Functional blocks/circuits/constants in the block chart etc. may be omitted or simplified for explanatory purposes.

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Application Notes
All the grounding wires of the TB67S269 must run on the solder mask on the PCB and be externally terminated
at only one point. Also, a grounding method should be considered for efficient heat dissipation.
Careful attention should be paid to the layout of the output, VDD(VM) and GND traces, to avoid short circuits
across output pins or to the power supply or ground. If such a short circuit occurs, the device may be permanently
damaged.
Also, the utmost care should be taken for pattern designing and implementation of the device since it has power
supply pins (VM, RS, OUT, GND) through which a particularly large current may run. If these pins are wired
incorrectly, an operation error may occur or the device may be destroyed.
The logic input pins must also be wired correctly. Otherwise, the device may be damaged owing to a current
running through the IC that is larger than the specified current.

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 TB67S269FTG
Pin explanations

TB67S269FTG (QFN48)
Pin No.1 – 28

Pin No. Pin Name Function

1 NC Non-connection pin

2 CLK CLK signal input pin

3 ENABLE Ach/Bch output stage ON/OFF control pin

4 RESET Electric angle reset pin

5 GND Ground pin

6 NC Non-connection pin

7 RSA (*) Motor Ach current sense pin

8 RSA (*) Motor Ach current sense pin

9 NC Non-connection pin

10 OUTA+ (*) Motor Ach (+) output pin

11 OUTA+ (*) Motor Ach (+) output pin

12 NC Non-connection pin

13 NC Non-connection pin

14 NC Non-connection pin

15 GND Ground pin

16 OUTA- (*) Motor Ach (-) output pin

17 OUTA- (*) Motor Ach (-) output pin

18 GND Ground pin

19 GND Ground pin

20 OUTB- (*) Motor Bch (-) output pin

21 OUTB- (*) Motor Bch (-) output pin

22 GND Ground pin

23 NC Non-connection pin

24 NC Non-connection pin

25 NC Non-connection pin

26 OUTB+ (*) Motor Bch (+) output pin

27 OUTB+ (*) Motor Bch (+) output pin

28 NC Non-connection pin

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Pin No.29 – 48

Pin No. Pin Name Function

29 RSB (*) Motor Bch current sense pin

30 RSB (*) Motor Bch current sense pin

31 NC Non-connection pin

32 VM Motor power supply pin

33 NC Non-connection pin

34 VCC Internal VCC regulator monitor pin

35 NC Non-connection pin

36 NC Non-connection pin

37 NC Non-connection pin

38 LO Error detect signal output pin

39 DMODE0 Step resolution set pin No.0

40 GND Ground pin

41 VREFB Motor Bch output set pin

42 VREFA Motor Ach output set pin

43 OSCM Oscillating circuit frequency for chopping set pin

44 CW/CCW Motor rotation direction set pin

45 MO Electric angle monitor pin

46 DMODE1 Step resolution set pin No.1

47 DMODE2 Step resolution set pin No.2

48 NC Non-connection pin

・Please do not run patterns under NC pins.

* : Please connect the pins with the same pin name, while using the TB67S269.

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 TB67S269FTG

INPUT/OUTPUT equivalent circuit (TB67S269)

Pin name IN/OUT signal Equivalent circuit

DMODE0 1kΩ
Logic
DMODE1
Input
DMODE2 Digital Input (VIH/VIL)
Pin
CLK

100kΩ
ENABLE VIH: 2.0V(min) to 5.5V(max)
RESET VIL : 0V(min) to 0.8V(max)
CW/CCW
GND

Logic
Output
Digital Output (VOH/VOL)
LO Pin

(Pullup resistance :10k to 100kΩ)

MO
GND

VCC
VCC
VCC voltage range
4.75V(min) to 5.0V(typ.) to 5.25V(max)
1kΩ
VREFA VREF

VREF voltage range

VREFB
0V to 3.6V

GND

1kΩ
OSCM
OSCM frequency setting range
500Ω

OSCM 0.64MHz(min) to 1.12MHz(typ.) to

2.4MHz(max)

GND

RS

OUT A+
VM power supply voltage range
OUT A-
10V(min) to 47V(max)
OUT B+
OUT B- OUT+ OUT-
OUTPUT pin voltage
RSA
10V(min) to 47V(max)
RSB

GND

The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes.
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Function explanation (Stepping motor)

CLK Function
Each up-edge of the CLK signal will shift the motor’s electrical angle per step.

CLK Input Function

Up-edge Shifts the electrical angle per step.

Down-edge (State of the electrical angle does not change.)

ENABLE function
The ENABLE pin controls the ON and OFF of the corresponding output stage. This pin serves to select if the motor
is stopped in Off (High impedance) mode or activated. Please set the ENABLE pin to ‘L’ during VM power-on and
power-off sequence.

ENABLE Input Function

H Output stage=‘ON’ (Normal operation mode)

L Output stage=’OFF) (High impedance mode)

CW/CCW function and the output pin function (Output logic at the time of a charge start)
The CW/CCW pin controls the rotation direction of the motor. When set to ‘Clockwise’, the current of OUTA is output
first, with a phase difference of 90°. When set to ‘Counter clockwise”, the current of OUTB is output first with a
phase difference of 90°.

CW/CCW Input OUT (+) OUT (-)

H : Clockwise operation(CW) H L
L : Counter clockwise operation(CCW) L H

Step resolution select function

DMODE0 DMODE1 DMODE2 Function

Standby mode (the OSCM is disabled and the output stage is

L L L
set to ‘OFF’ status)
L L H Full step resolution
L H L Half step resolution(Type (A))
L H H Quarter step resolution
H L L Half step resolution(Type (B))
H L H 1/8 step resolution
H H L 1/16 step resolution
H H H 1/32 step resolution

When switching the DMODE0,1,2; setting the RESET signal to Low (will set the electrical angle to the initial status),
is recommended.

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Step resolution setting and initial angle

[Full step resolution]

H
CLK
L

H
MO
L
+100%
Iout(A) 0%
-100%
+100%
Iout(B) 0%
-100%

CCW CW

[Half step resolution (Type A)]

H
CLK
L

H
MO
L
+100%
Iout(A) 0%
-100%
+100%
Iout(B) 0%
-100%

CCW CW

MO output shown in the timing chart is when the MO pin is pulled up.
Timing charts may be simplified for explanatory purpose.

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[Half step resolution (Type B)]

H
CLK
L

H
MO
L
+100%
+71%

Iout(A) 0%

-71%
-100%
+100%
+71%

Iout(B) 0%

-71%
-100%

CCW CW

[Quarter step resolution]

H
CLK
L
H
MO
L
+100%
+71%
+38%
0%
Iout(A) -38%
-71%
-100%

+100%
+71%
+38%
Iout(B) 0%
-38%
-71%
-100%

CCW CW

MO output shown in the timing chart is when the MO pin is pulled up.
Timing charts may be simplified for explanatory purpose.

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 TB67S269FTG

[1/8 step resolution]

H
CLK
L

H
MO
L
+100%
+98%
+96%
+83%

+71%

+56%

+38%

+20%

Iout(A) 0%

-20%

-38%

-56%

-71%

-83%
-96%
-98%
-100%
+100%
+98%
+96%
+83%

+71%

+56%

+38%

+20%

Iout(B) 0%

-20%

-38%

-56%

-71%

-83%
-96%
-98%
-100%

CCW CW

MO output shown in the timing chart is when the MO pin is pulled up.

Timing charts may be simplified for explanatory purpose.

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[1/16 step resolution]

H
CLK
L
H
MO
L
+100%
+98%
+96%
+83%

+71%

+56%

+38%

+20%

Iout(A) 0%

-20%

-38%

-56%

-71%

-83%
-96%
-98%
-100%
+100%
+98%
+96%
+83%

+71%

+56%

+38%

+20%

Iout(B) 0%

-20%

-38%

-56%

-71%

-83%
-96%
-98%
-100%

CCW CW

MO output shown in the timing chart is when the MO pin is pulled up.

Timing charts may be simplified for explanatory purpose.

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[1/32 step resolution]

H
CLK L
H
MO L

+100%

Iout(A) 0%

-100%
+100%

Iout(B) 0%

-100%

CCW CW

MO output shown in the timing chart is when the MO pin is pulled up.

Timing charts may be simplified for explanatory purpose.

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Step setting and current percentage

Current [%] Full Half (A) Half (B) Quarter 1/8 1/16 1/32
100% ○ ○ ○ ○ ○ ○ ○
99% ○ ○
98% ○ ○ ○
97% ○ ○
96% ○ ○ ○
94% ○
92% ○
90% ○ ○
88% ○
86% ○
83% ○ ○ ○
80% ○
77% ○ ○
74% ○
71% ○ ○ ○ ○ ○
67% ○
63% ○ ○
60% ○
56% ○ ○ ○
52% ○
47% ○ ○
43% ○
38% ○ ○ ○ ○
34% ○
29% ○ ○
25% ○
20% ○ ○ ○
15% ○
10% ○ ○
5% ○
0% ○ ○ ○ ○ ○ ○

RESET function

RESET Input Function

H Sets the electrical angle to the initial condition.

L Normal operation mode

The current for each channel (while RESET is applied) is shown in the table below. MO will show ‘L’ at this time.

Step resolution setting Ach current setting Bch current setting Default electrical angle

Full step 100% 100% 45°

Half step (Type (A)) 100% 100% 45°

Quarter step 71% 71% 45°

Half step (Type (B)) 71% 71% 45°

1/8 step 71% 71% 45°

1/16 step 71% 71% 45°

1/32 step 71% 71% 45°

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 TB67S269FTG

LO(Error detect signal) output function

When Thermal shutdown(TSD) or Over-current shutdown(ISD) is applied, the LO voltage will be switched to Low(GND) level.

VCC

10kΩ

The LO is an open-drain output pin. LO pin needs to be pulled up to 3.3V/5.0V level for proper function. During regular operation,
the LO pin level will stay High(VCC level). When error detection (TSD, ISD) is applied, the LO pin will show Low (GND) level.

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 TB67S269FTG

Decay function

ADMD(Advanced Dynamic Mixed Decay) constant current control

The Advanced Dynamic Mixed Decay threshold, which determines the current ripple level during current feedback control,
is a unique value.

fchop

Internal
OSC

Setting NF detect
current value
Advanced Dynamic Mixed
Detect
Decay threshold
ADMDth

Iout

Charge Mode→NF detect→Fast Decay→ADMDth detect→Slow

Decay→fchop 1 cycle→Charge mode

fchop 1 cycle：16clk

Auto Decay Mode current waveform

fchop fchop

Internal
OSC

Setting NF detect NF detect

current value

Iout

Fast Decay Slow Decay

ADMDth (Advanced Dynamic Mixed Decay threshold)

Timing charts may be simplified for explanatory purpose.

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ADMD current waveform

・When the next current step is higher :

fchop fchop fchop fchop

Internal
OSC

Setting NF NF
current value
Fast Fast
Charge
Slow Slow
Setting NF NF
current value Fast
Fast
Charge Charge Charge

Slow Slow

・When Charge period is more than 1 fchop cycle :

fchop fchop fchop fchop

Internal
OSC

Setting NF
current value
Fast

Slow

Charge

NF
Setting NF
current value Fast Fast
Charge Charge
Slow Slow

When the Charge period is longer than fchop cycle, the Charge period will be extended until the motor current reaches the
NF threshold. Once the current reaches the next current step, then the sequence will go on to decay mode.

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 TB67S269FTG

・When the next current step is lower :

fchop fchop fchop fchop

Internal
OSC

The operation mode will be switched to ‘Charge’ to

Setting monitor the motor current with the RS comparator;
NF NF then will be switched to ‘Fast’ because the motor
current value
Fast Fast current is above the threshold.
NF
Charge Charge
Slow Slow Charge
Fast
Setting
current value
Fast
Charge
Slow Slow

・When the Fast continues past 1 fchop cycle (the motor current not reaching the ADMD
threshold during 1 fchop cycle)

fchop fchop fchop fchop

Internal
OSC

Setting NF
The operation mode will be switched to ‘Charge’ to
current value
Fast NF monitor the motor current with the RS comparator;
Charge then will be switched to ‘Fast’ because the motor
Slow current is above the threshold.
Charge

If the motor current is still above the ADMD threshold

Fast
after reaching 1 fchop cycle, the output stage function
will stay ‘Fast’ until the current reaches the ADMDth.

Setting
current value

Fast
Charge
Slow Slow

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 TB67S269FTG

Output transistor function mode

VM VM VM

RRS RRS RRS

RSpin RSpin RSpin

U1 U2 U1 U2 U1 U2

ON OFF OFF OFF OFF ON

Load
Load Load
L1 L2 L1 L2 L1 L2

OFF ON ON ON ON OFF

PGND PGND PGND

Charge mode Slow mode Fast mode

A current flows into the motor coil. A current circulates around the The energy of the motor coil
motor coil and this device. is fed back to the power

Output transistor function

MODE U1 U2 L1 L2

CHARGE ON OFF OFF ON

SLOW OFF OFF ON ON
FAST OFF ON ON OFF
Note: This table shows an example of when the current flows as indicated by the arrows in the figures shown above.
If the current flows in the opposite direction, refer to the following table.

MODE U1 U2 L1 L2

CHARGE OFF ON ON OFF

SLOW OFF OFF ON ON
FAST ON OFF OFF ON

This IC controls the motor current to be constant by 3 modes listed above.

The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes.

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 TB67S269FTG

Calculation of the Predefined Output Current

For PWM constant-current control, this IC uses a clock generated by the OSCM oscillator.
The peak output current (Setting current value) can be set via the current-sensing resistor (RS) and the reference
voltage (Vref), as follows:
Vref(V)
Iout(max) = Vref(gain) ×
RRS(Ω)

Vref(gain) : the Vref decay rate is 1/ 5.0 (typ.)

For example : In the case of a 100% setup

when Vref = 3.0 V, Torque=100%,RS=0.51Ω, the motor constant current (Setting current value) will be
calculated as:

Iout = 3.0V / 5.0 / 0.51Ω= 1.18 A

Calculation of the OSCM oscillation frequency (chopper reference frequency)

An approximation of the OSCM oscillation frequency (fOSCM) and chopper frequency (fchop)
can be calculated by the following expressions.

fOSCM=1/[0.56x{Cx(R1+500)}]
………C,R1: External components for OSCM (C=270pF , R1=5.1kΩ => About fOSCM= 1.12MHz(Typ.))

fchop = fOSCM / 16
………fOSCM=1.12MHz => fchop =About 70kHz

If chopping frequency is raised, Rippl of current will become small and wave-like reproducibility will improve. However, the
gate loss inside IC goes up and generation of heat becomes large.

By lowering chopping frequency, reduction in generation of heat is expectable. However, Rippl of current may become
large. It is a standard about about 70 kHz. A setup in the range of 50 to 100 kHz is recommended.

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 TB67S269FTG
Absolute Maximum Ratings (Ta = 25°C)
Characteristics Symbol Rating Unit Remarks

Motor power supply VM 50 V -

Motor output voltage Vout 50 V -
Motor output current Iout 2.0 A (Note 1)
Internal Logic power supply VCC 6.0 V When externally applied.
VIN(H) 6.0 V -
Logic input voltage
VIN(L) -0.4 V -
MO output voltage VMO 6.0 V -
LO output voltage VLO 6.0 V -
MO Inflow current IMO 30 mA -
LO Inflow current ILO 30 mA -
Power dissipation WQFN48 PD 1.3 W (Note 2)
Operating temperature TOPR -20 to 85 °C -
Storage temperature TSTG -55 to 150 °C -
Junction temperature Tj(max) 150 °C -

Note 1: Usually, the maximum current value at the time should use 70% or less of the absolute maximum ratings for
a standard on thermal rating. The maximum output current may be further limited in view of thermal
considerations, depending on ambient temperature and board conditions.
Note 2: Device alone (Ta =25°C)
When Ta exceeds 25°C, it is necessary to do the derating with 10.4mW/°C.
Ta: Ambient temperature
Topr: Ambient temperature while the IC is active
Tj: Junction temperature while the IC is active. The maximum junction temperature is limited by the thermal
shutdown (TSD) circuitry. It is advisable to keep the maximum current below a certain level so that the
maximum junction temperature, Tj (MAX), will not exceed 120°C.
Caution）Absolute maximum ratings
The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even
for a moment. Do not exceed any of these ratings.
Exceeding the rating (s) may cause device breakdown, damage or deterioration, and may result in injury by
explosion or combustion.
The value of even one parameter of the absolute maximum ratings should not be exceeded under any
circumstances. The TB67S269FTG does not have overvoltage detection circuit. Therefore, the device is
damaged if a voltage exceeding its rated maximum is applied.
All voltage ratings, including supply voltages, must always be followed. The other notes and considerations
described later should also be referred to.
(For reference) PD-Ta graph
PD - Ta

Mounted to board

Device alone

Board condition
4 layer glass epoxy board
Cu thickness:1 layer and 4 layer:55mm,2 layer and 3 layer:35mm
Board size:100mm×110mm×1.6mm

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 TB67S269FTG
Operation Ranges (Ta=-20 to 85°C)

Characteristics Symbol Min Typ. Max Unit Remarks

Motor power supply VM 10 24 47 V -

Motor output current Iout - 1.4 2.0 A (Note 1)
VIN(H) 2.0 - 5.5 V Logic input High Level
Logic input voltage
VIN(L) 0 - 0.8 V Logic input Low Level
MO output pin voltage VMO - 3.3 5.0 V -
LO output pin voltage VLO - 3.3 5.0 V -
Clock input frequency fCLK - - 100 kHz -
Chopper frequency fchop(range) 40 70 150 kHz -
Vref input voltage Vref GND 2.0 3.6 V -
Note 1: Maximum current for actual usage may be limited by the operating circumstances such as operating conditions
(exciting mode, operating time, and so on), ambient temperature, and heat conditions (board condition and so on).

Electrical Specifications 1 (Ta = 25°C, VM = 24 V, unless specified otherwise)

Characteristics Symbol Test condition Min Typ. Max Unit

HIGH VIN(H) Logic input (Note) 2.0 - 5.5 V

Logic input voltage
LOW VIN(L) Logic input (Note) 0 - 0.8 V

Logic input hysteresis voltage VIN(HYS) Logic input (Note) 100 - 300 mV

HIGH IIN(H) VIN(H)=3.3V - 33 - µA

Logic input current
LOW IIN(L) VIN(L)=0V - - 1 µA

MO output pin voltage LOW VOL(MO) IOL=24mA output=Low - 0.2 0.5 V

LO output pin voltage LOW VOL(LO) IOL=24mA output=Low - 0.2 0.5 V

Output pins=open
IM1 - 2 3 mA
Standby mode
Output pins=open - 3 5 mA
Power consumption IM2
Standby release ENABLE=Low
Output pins=open - 5 7 mA
IM3
Full step resolution
High-side IOH VRS=VM=50V,Vout=0V - - 1 µA
Output leakage current
Low-side IOL VRS=VM=Vout=50V 1 - - µA

Motor current channel differential ΔIout1 Current differential between Ch -5 0 5 %

Motor current setting accuracy ΔIout2 Iout=1.5A -5 0 5 %

RS pin current IRS VRS=VM=24V 0 - 10 µA

Motor output ON-resistance Tj=25°C, Forward direction
Ron(H+L) － 0.8 0.9 Ω
(High-side+Low-side) (High-side+Low-side)

Note: VIN (H) is defined as the VIN voltage that causes the outputs (OUTA,OUTB) to change when a pin under test
is gradually raised from 0 V. V IN (L) is defined as the V IN voltage that causes the outputs (OUTA, OUTB) to
change when the pin is then gradually lowered from 5V. The difference between V IN (H) and V IN (L) is defined as
the V IN (HYS).

Note: When the logic signal is applied to the device whilst the VM power supply is not asserted; the device is
designed not to function, but for safe usage, please apply the logic signal after the VM power supply is asserted and
the VM voltage reaches the proper operating range.

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 TB67S269FTG
Electrical Specifications 2 (Ta =25°C, VM = 24 V, unless specified otherwise)

Characteristics Symbol Test condition Min Typ. Max Unit

Vref input current Iref Vref=2.0V - 0 1 μA

VCC voltage VCC ICC=5.0mA 4.75 5.0 5.25 V
VCC current ICC VCC=5.0V - 2.5 5 mA
Vref gain rate Vref(gain) Vref=2.0V 1/5.2 1/5.0 1/4.8 －
Thermal shutdown(TSD) TjTSD － 145 160 175 °C
threshold (Note1)
VM recovery voltage VMR － 7.0 8.0 9.0 V
Over-current detection (ISD) ISD － 2.1 3.0 4.0 A
threshold (Note2)

Note1: About TSD

When the junction temperature of the device reached the TSD threshold, the TSD circuit is triggered; the internal reset circuit
then turns off the output transistors. Noise rejection blanking time is built-in to avoid misdetection. Once the TSD circuit is
triggered, the device will be set to standby mode, and can be cleared by reasserting the VM power source, or setting the
DMODE pins to standby mode. The TSD circuit is a backup function to detect a thermal error, therefore is not
recommended to be used aggressively.

Note2: About ISD

When the output current reaches the threshold, the ISD circuit is triggered; the internal reset circuit then turns off the output
transistors. Once the ISD circuit is triggered, the device keeps the output off until power-on reset (POR), is reasserted or the device is
set to standby mode by DMODE pins. For fail-safe, please insert a fuse to avoid secondary trouble.

Back-EMF
While a motor is rotating, there is a timing at which power is fed back to the power supply. At that timing, the
motor current recirculates back to the power supply due to the effect of the motor back-EMF.
If the power supply does not have enough sink capability, the power supply and output pins of the device might
rise above the rated voltages. The magnitude of the motor back-EMF varies with usage conditions and motor
characteristics. It must be fully verified that there is no risk that the TB62214AFG/AFTG or other components will
be damaged or fail due to the motor back-EMF.

Cautions on Overcurrent Shutdown (ISD) and Thermal Shutdown (TSD)

The ISD and TSD circuits are only intended to provide temporary protection against irregular conditions such as an
output short-circuit; they do not necessarily guarantee the complete IC safety.
If the device is used beyond the specified operating ranges, these circuits may not operate properly: then the device
may be damaged due to an output short-circuit.
The ISD circuit is only intended to provide a temporary protection against an output short-circuit. If such a
condition persists for a long time, the device may be damaged due to overstress. Overcurrent conditions must be
removed immediately by external hardware.

IC Mounting
Do not insert devices incorrectly or in the wrong orientation. Otherwise, it may cause breakdown, damage and/or
deterioration of the device.

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 TB67S269FTG

AC Electrical Specification (Ta = 25°C, VM = 24 V, 6.8 mH/5.7 Ω)

Characteristics Symbol Test condition Min Typ. Max Unit

Inside filter of CLK input minimum The CLK(H) minimum pulse

tCLK(H) 300 - - ns
High width width

Inside filter of CLK input minimum The CLK(L) minimum pulse

tCLK(L) 250 - - ns
Low width width

tr - 30 80 130 ns

Output transistor tf - 40 90 140 ns

switching specific tpLH(CLK) CLK-Output - 1000 - ns

tpHL(CLK) CLK-Output - 1500 - ns

VM=24V,Iout=1.5A
Analog noise blanking time AtBLK 250 400 550 ns
Analog tblank
Oscillator frequency accuracy ∆fOSCM COSC=270pF, ROSC=5.1 kΩ -15 - +15 %

Oscillator reference frequency fOSCM COSC= 270 pF, ROSC =5.1 kΩ 952 1120 1288 kHz

Output:Active(Iout =1.5 A),

Chopping frequency fchop - 70 - kHz
fOSC = 1120 kHz

AC Electrical Specification Timing chart

1/fCLK

tCLK(L)

50% 50%

tCLK(H) 50%
【CLK】

tpHL(CLK)
tpLH(CLK)

90% 90%
50% 50%

【OUT】 10% 10%

tr tf

Timing charts may be simplified for explanatory purpose.

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Example Application Circuits
The values shown in the following figure are typical values. For input conditions, see the Operating Ranges.

0.1μF

100μF

0.1μF

0.51Ω
1 1 1 1

VM

OUTB+

OUTB+
RSB

RSB
LO VCC
5V
0V DMODE0 GND 1
0.1μF

1 GND OUTB- 1

1 VREFB OUTB- 1
5.1kΩ

1 VREFA GND 1
M
1 OSCM GND 1
270pF

5V
1 CW/CCW OUTA- 1
0V

1 MO OUTA- 1
5V 5V
0V 1 DMODE1 GND 1
5V
1 DMODE2
0V
ENABLE

RESET

OUTA+

OUTA+
GND

RSA

RSA
CLK

1 1 1 1
0.51Ω

5V 5V 5V
0V 0V 0V

Note: I will recommend the addition of a capacitor if necessary. The GND wiring must become one point as much as
possible-earth.

The example of an applied circuit is for reference, and enough evaluation should be done before the
mass-production design.
Moreover, it is not the one to permit the use of the industrial property.

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Package Dimensions (unit :mm)

P-WQFN48-0707-0.50-003

Weight 0.10g (typ.)

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 TB67S269FTG
Notes on Contents
Block Diagrams
Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for
explanatory purposes.
Equivalent Circuits
The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes.
Timing Charts
Timing charts may be simplified for explanatory purposes.
Application Circuits
The application circuits shown in this document are provided for reference purposes only. Thorough evaluation is
required, especially at the mass-production design stage.
Toshiba does not grant any license to any industrial property rights by providing these examples of application
circuits.
Test Circuits
Components in the test circuits are used only to obtain and confirm the device characteristics. These components
and circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment.

IC Usage Considerations
Notes on handling of ICs
(1) The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded,
even for a moment. Do not exceed any of these ratings.Exceeding the rating(s) may cause device
breakdown, damage or deterioration, and may result in injury by explosion or combustion.
(2)
Use an appropriate power supply fuse to ensure that a large current does not continuously flow in the
case of overcurrent and/or IC failure. The IC will fully break down when used under conditions that
exceed its absolute maximum ratings, when the wiring is routed improperly or when an abnormal
pulse noise occurs from the wiring or load, causing a large current to continuously flow and the
breakdown can lead to smoke or ignition. To minimize the effects of the flow of a large current in the
case of breakdown, appropriate settings, such as fuse capacity, fusing time and insertion circuit
location, are required.

(3) If your design includes an inductive load such as a motor coil, incorporate a protection circuit into the
design to prevent device malfunction or breakdown caused by the current resulting from the inrush
current at power ON or the negative current resulting from the back electromotive force at power OFF.
IC breakdown may cause injury, smoke or ignition. Use a stable power supply with ICs with built-in
protection functions. If the power supply is unstable, the protection function may not operate, causing
IC breakdown. IC breakdown may cause injury, smoke or ignition.

(4) Do not insert devices in the wrong orientation or incorrectly. Make sure that the positive and negative
terminals of power supplies are connected properly.
Otherwise, the current or power consumption may exceed the absolute maximum rating, and
exceeding the rating(s) may cause device breakdown, damage or deterioration, and may result in
injury by explosion or combustion.
In addition, do not use any device inserted in the wrong orientation or incorrectly to which current is
applied even just once.

(5) Carefully select external components (such as inputs and negative feedback capacitors) and load
components (such as speakers), for example, power amp and regulator.
If there is a large amount of leakage current such as from input or negative feedback condenser, the IC
output DC voltage will increase. If this output voltage is connected to a speaker with low input
withstand voltage, overcurrent or IC failure may cause smoke or ignition. (The overcurrent may cause
smoke or ignition from the IC itself.) In particular, please pay attention when using a Bridge Tied Load
(BTL) connection-type IC that inputs output DC voltage to a speaker directly.

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 TB67S269FTG

Points to remember on handling of ICs

Overcurrent detection Circuit
Overcurrent detection circuits (referred to as current limiter circuits) do not necessarily protect ICs under all
circumstances. If the overcurrent detection circuits operate against the overcurrent, clear the overcurrent status
immediately.
Depending on the method of use and usage conditions, exceeding absolute maximum ratings may cause the
overcurrent detection circuit to operate improperly or IC breakdown may occur before operation. In addition,
depending on the method of use and usage conditions, if overcurrent continues to flow for a long time after
operation, the IC may generate heat resulting in breakdown.

Thermal Shutdown Circuit

Thermal shutdown circuits do not necessarily protect ICs under all circumstances. If the thermal shutdown circuits
operate against the over-temperature, clear the heat generation status immediately.
Depending on the method of use and usage conditions, exceeding absolute maximum ratings may cause the
thermal shutdown circuit to operate improperly or IC breakdown to occur before operation.

Heat Radiation Design

When using an IC with large current flow such as power amp, regulator or driver, design the device so that heat is
appropriately radiated, in order not to exceed the specified junction temperature (Tj) at any time or under any
condition. These ICs generate heat even during normal use. An inadequate IC heat radiation design can lead to
decrease in IC life, deterioration of IC characteristics or IC breakdown. In addition, when designing the device, take
into consideration the effect of IC heat radiation with peripheral components.

Back-EMF
When a motor rotates in the reverse direction, stops or slows abruptly, current flows back to the motor’s power
supply owing to the effect of back-EMF. If the current sink capability of the power supply is small, the device’s
motor power supply and output pins might be exposed to conditions beyond the absolute maximum ratings. To
avoid this problem, take the effect of back-EMF into consideration in system design.

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in this document, and related hardware, software and systems (collectively "Product") without notice.
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relevant TOSHIBA information, including without limitation, this document, the specifications, the data sheets and application notes for
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