0% found this document useful (0 votes)
73 views33 pages

DRV 5055

Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
73 views33 pages

DRV 5055

Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 33

DRV5055

www.ti.com SBAS640B – JANUARY 2018 – REVISED DRV5055


APRIL 2021
SBAS640B – JANUARY 2018 – REVISED APRIL 2021

DRV5055 Ratiometric Linear Hall Effect Sensor

1 Features 3 Description
• Ratiometric Linear Hall Effect Magnetic Sensor The DRV5055 is a linear Hall effect sensor that
• Operates From 3.3-V and 5-V Power Supplies responds proportionally to magnetic flux density. The
• Analog Output With VCC / 2 Quiescent Offset device can be used for accurate position sensing in a
• Magnetic Sensitivity Options (At VCC = 5 V): wide range of applications.
– A1/Z1: 100 mV/mT, ±21-mT Range The device operates from 3.3-V or 5-V power
– A2/Z2: 50 mV/mT, ±42-mT Range supplies. When no magnetic field is present, the
– A3/Z3: 25 mV/mT, ±85-mT Range analog output drives half of VCC. The output changes
– A4/Z4: 12.5 mV/mT, ±169-mT Range linearly with the applied magnetic flux density, and
• Fast 20-kHz Sensing Bandwidth four sensitivity options enable maximal output voltage
• Low-Noise Output With ±1-mA Drive swing based on the required sensing range. North
• Compensation For Magnet Temperature Drift for and south magnetic poles produce unique voltages.
A1/A2/A3/A4 Versions and None for Z1/Z2/Z3/Z4
Versions Magnetic flux perpendicular to the top of the package
• Standard Industry Packages: is sensed, and the two package options provide
– Surface-Mount SOT-23 different sensing directions.
– Through-Hole TO-92 The device uses a ratiometric architecture that can
2 Applications eliminate error from VCC tolerance when the external
analog-to-digital converter (ADC) uses the same VCC
• Precise Position Sensing for its reference. Additionally, the device features
• Industrial Automation and Robotics magnet temperature compensation to counteract how
• Home Appliances magnets drift for linear performance across a wide –
• Gamepads, Pedals, Keyboards, Triggers 40°C to 125°C temperature range. Device options for
• Height Leveling, Tilt and Weight Measurement no temperature compensation of magnet drift are also
• Fluid Flow Rate Measurement available.
• Medical Devices
• Absolute Angle Encoding Device Information(1)
• Current Sensing PART NUMBER PACKAGE BODY SIZE (NOM)
SOT-23 (3) 2.92 mm × 1.30 mm
DRV5055
TO-92 (3) 4.00 mm × 3.15 mm

(1) For all available packages, see the orderable addendum at


the end of the data sheet.

VCC OUT
VCC
VL (MAX)
DRV5055 Controller
VCC
OUT ADC
VCC / 2
GND

VL (MIN)
0V
Typical Schematic B
north 0 mT south
Magnetic Response

An©IMPORTANT
Copyright NOTICEIncorporated
2021 Texas Instruments at the end of this data sheet addresses availability, warranty, changes, use in safety-critical
Submit Document applications,
Feedback 1
intellectual property matters and other important disclaimers. PRODUCTION DATA.
Product Folder Links: DRV5055
DRV5055
SBAS640B – JANUARY 2018 – REVISED APRIL 2021 www.ti.com

Table of Contents
1 Features............................................................................1 8 Application and Implementation.................................. 14
2 Applications..................................................................... 1 8.1 Application Information............................................. 14
3 Description.......................................................................1 8.2 Typical Application.................................................... 15
4 Revision History.............................................................. 2 8.3 Do's and Don'ts.........................................................17
5 Pin Configuration and Functions...................................3 9 Power Supply Recommendations................................18
6 Specifications.................................................................. 4 10 Layout...........................................................................18
6.1 Absolute Maximum Ratings........................................ 4 10.1 Layout Guidelines................................................... 18
6.2 ESD Ratings............................................................... 4 10.2 Layout Examples.................................................... 18
6.3 Recommended Operating Conditions.........................4 11 Device and Documentation Support..........................19
6.4 Thermal Information....................................................4 11.1 Documentation Support.......................................... 19
6.5 Electrical Characteristics.............................................5 11.2 Receiving Notification of Documentation Updates.. 19
6.6 Magnetic Characteristics.............................................5 11.3 Support Resources................................................. 19
6.7 Typical Characteristics................................................ 6 11.4 Trademarks............................................................. 19
7 Detailed Description........................................................9 11.5 Electrostatic Discharge Caution.............................. 19
7.1 Overview..................................................................... 9 11.6 Glossary.................................................................. 19
7.2 Functional Block Diagram........................................... 9 12 Mechanical, Packaging, and Orderable
7.3 Feature Description.....................................................9 Information.................................................................... 19
7.4 Device Functional Modes..........................................13

4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (June 2020) to Revision B (April 2021) Page
• Updated the numbering format for tables, figures, and cross-references throughout the document..................1
• Changed the absolute maximum operating junction temperature from: 150°C to: 170°C.................................. 4
• Removed the Product Preview tablenote from the Magnetic Characteristics table............................................ 5

Changes from Revision * (January 2018) to Revision A (June 2020) Page


• Added Zero TC sensitivity options to the data sheet.......................................................................................... 1
• Added Zero TC information to the Electrical Characteristics ............................................................................. 5
• Added Zero TC information to the Magnetic Characteristics table..................................................................... 5
• Added graphs for DV5055Z1/Z2/Z3/Z4 options in the Typical Characteristics section.......................................6
• Updated STC definition in Equation 1 ...............................................................................................................10
• Updated the Sensitivity Temperature Compensation for Magnets section for Zero TC options....................... 12

2 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated

Product Folder Links: DRV5055


DRV5055
www.ti.com SBAS640B – JANUARY 2018 – REVISED APRIL 2021

5 Pin Configuration and Functions

VCC 1

3 GND

OUT 2

Figure 5-1. DBZ Package 3-Pin SOT-23 Top View

1 2 3

VCC GND OUT


Figure 5-2. LPG Package 3-Pin TO-92 Top View

Table 5-1. Pin Functions


PIN
I/O DESCRIPTION
NAME SOT-23 TO-92
Power supply. TI recommends connecting this pin to a ceramic capacitor to ground
VCC 1 1 —
with a value of at least 0.01 µF.
OUT 2 3 O Analog output
GND 3 2 — Ground reference

Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 3


Product Folder Links: DRV5055
DRV5055
SBAS640B – JANUARY 2018 – REVISED APRIL 2021 www.ti.com

6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Power supply voltage VCC –0.3 7 V
Output voltage OUT –0.3 VCC + 0.3 V
Magnetic flux density, BMAX Unlimited T
Operating junction temperature, TJ –40 170 °C
Storage temperature, Tstg –65 150 °C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress
ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.

6.2 ESD Ratings


VALUE UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC
±2500
JS-001(1)
V(ESD) Electrostatic discharge V
Charged-device model (CDM), per JEDEC specification
±750
JESD22-C101(2)

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions


over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
3 3.63
VCC Power-supply voltage(1) V
4.5 5.5
IO Output continuous current –1 1 mA
TA Operating ambient temperature(2) –40 125 °C

(1) There are two isolated operating VCC ranges. For more information see the Operating VCC Ranges section.
(2) Power dissipation and thermal limits must be observed.

6.4 Thermal Information


DRV5055
THERMAL METRIC(1) SOT-23 (DBZ) TO-92 (LPG) UNIT
3 PINS 3 PINS
RθJA Junction-to-ambient thermal resistance 170 121 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 66 67 °C/W
RθJB Junction-to-board thermal resistance 49 97 °C/W
YJT Junction-to-top characterization parameter 1.7 7.6 °C/W
YJB Junction-to-board characterization parameter 48 97 °C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.

4 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated

Product Folder Links: DRV5055


DRV5055
www.ti.com SBAS640B – JANUARY 2018 – REVISED APRIL 2021

6.5 Electrical Characteristics


for VCC = 3 V to 3.63 V and 4.5 V to 5.5 V, over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS(1) MIN TYP MAX UNIT
ICC Operating supply current 6 10 mA
tON Power-on time (see Figure 7-4) B = 0 mT, no load on OUT 175 330 µs
fBW Sensing bandwidth 20 kHz
td Propagation delay time From change in B to change in OUT 10 µs
VCC = 5 V 130
BND Input-referred RMS noise density nT/√ Hz
VCC = 3.3 V 215
VCC = 5 V 0.12
BN Input-referred noise BND × 6.6 × √ 20 kHz mTPP
VCC = 3.3 V 0.2
DRV5055A1/Z1 12
DRV5055A2/Z2 6
VN Output-referred noise(2) BN × S mVPP
DRV5055A3/Z3 3
DRV5055A4/Z4 1.5

(1) B is the applied magnetic flux density.


(2) VN describes voltage noise on the device output. If the full device bandwidth is not needed, noise can be reduced with an RC filter.

6.6 Magnetic Characteristics


for VCC = 3 V to 3.63 V and 4.5 V to 5.5 V, over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS(1) MIN TYP MAX UNIT
VCC = 5 V 2.43 2.5 2.57
VQ Quiescent voltage B = 0 mT, TA = 25°C V
VCC = 3.3 V 1.59 1.65 1.71
B = 0 mT,
VQΔT Quiescent voltage temperature drift ±1% × VCC V
TA = –40°C to 125°C versus 25°C
VQRE Quiescent voltage ratiometry error(2) ±0.2%
High-temperature operating stress for
VQΔL Quiescent voltage lifetime drift < 0.5%
1000 hours
DRV5055A1/Z1 95 100 105

VCC = 5 V, DRV5055A2/Z2 47.5 50 52.5


TA = 25°C DRV5055A3/Z3 23.8 25 26.2
DRV5055A4/Z4 11.9 12.5 13.2
S Sensitivity mV/mT
DRV5055A1/Z1 57 60 63

VCC = 3.3 V, DRV5055A2/Z2 28.5 30 31.5


TA = 25°C DRV5055A3/Z3 14.3 15 15.8
DRV5055A4/Z4 7.1 7.5 7.9
DRV5055A1/Z1 ±21

VCC = 5 V, DRV5055A2/Z2 ±42


TA = 25°C DRV5055A3/Z3 ±85
DRV5055A4/Z4 ±169
BL Linear magnetic sensing range(3) (4) mT
DRV5055A1/Z1 ±22

VCC = 3.3 V, DRV5055A2/Z2 ±44


TA = 25°C DRV5055A3/Z3 ±88
DRV5055A4/Z4 ±176
VL Linear range of output voltage(4) 0.2 VCC – 0.2 V
Sensitivity temperature compensation DRV5055A1, DRV5055A2,
STC 0.12 %/°C
for magnets(5) DRV5055A3, DRV5055A4

Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 5


Product Folder Links: DRV5055
DRV5055
SBAS640B – JANUARY 2018 – REVISED APRIL 2021 www.ti.com

for VCC = 3 V to 3.63 V and 4.5 V to 5.5 V, over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS(1) MIN TYP MAX UNIT
Sensitivity temperature compensation DRV5055Z1, DRV5055Z2,
STCz 0 %/°C
for magnets(5) DRV5055Z3, DRV5055Z4
SLE Sensitivity linearity error(4) VOUT is within VL ±1%
SSE Sensitivity symmetry error(4) VOUT is within VL ±1%
TA = 25°C,
SRE Sensitivity ratiometry error(2) –2.5% 2.5%
with respect to VCC = 3.3 V or 5 V
High-temperature operating stress for
SΔL Sensitivity lifetime drift <0.5%
1000 hours

(1) B is the applied magnetic flux density.


(2) See the Ratiometric Architecture section.
(3) BL describes the minimum linear sensing range at 25°C taking into account the maximum VQ and Sensitivity tolerances.
(4) See the Sensitivity Linearity section.
(5) STC describes the rate the device increases Sensitivity with temperature. For more information, see the Sensitivity Temperature
Compensation for Magnets section.

6.7 Typical Characteristics


for TA = 25°C (unless otherwise noted)

2.6 2.6

2.4 2.4
Quiescent Voltage (V)
Quiescent Voltage (V)

2.2 2.2

2 2

VCC = 3.3 V VCC = 3.3 V


1.8 VCC = 5 V 1.8 VCC = 5 V

1.6 1.6
-40 -20 0 20 40 60 80 100 120 140 -40 -20 0 20 40 60 80 100 120 140
Temperature (qC) Temperature (qC)
D002

DRV5055A1/A2/A3/A4 DRV5055Z1/Z2/Z3/Z4

Figure 6-1. Quiescent Voltage vs. Temperature Figure 6-2. Quiescent Voltage vs. Temperature

2.8 2.8

2.6 2.6
Quiescent Voltage (V)
Quiescent Voltage (V)

2.4 2.4

2.2 2.2

2 2

1.8 1.8

1.6 1.6

1.4 1.4
3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25 5.5 3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25 5.5
Supply Voltage (V) Supply Voltage (V)
D003

DRV5055A1/A2/A3/A4 DRV5055Z1/Z2/Z3/AZ

Figure 6-3. Quiescent Voltage vs. Supply Voltage Figure 6-4. Quiescent Voltage vs. Supply Voltage

6 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated

Product Folder Links: DRV5055


DRV5055
www.ti.com SBAS640B – JANUARY 2018 – REVISED APRIL 2021

6.7 Typical Characteristics (continued)


for TA = 25°C (unless otherwise noted)

80 120

100 DRV5055A1
60 DRV5055A1 DRV5055A2

Sensitivity (mV/mT)
Sensitivity (mV/mT)

DRV5055A2 DRV5055A3
80
DRV5055A3 DRV5055A4
DRV5055A4
40 60

40
20
20

0 0
-40 -20 0 20 40 60 80 100 120 140 -40 -20 0 20 40 60 80 100 120 140
Temperature (qC) D004
Temperature (qC) D005

VCC = 3.3 V VCC = 5 V

Figure 6-5. Sensitivity vs. Temperature Figure 6-6. Sensitivity vs. Temperature
80 120

100
60
DRV5055Z1
Sensitivity (mV/mT)

Sensitivity (mV/mT)

DRV5055Z1 80 DRV5055Z2
DRV5055Z2 DRV5055Z3
DRV5055Z3 DRV5055Z4
40 DRV5055Z4 60

40
20
20

0 0
-40 -20 0 20 40 60 80 100 120 140 -40 -20 0 20 40 60 80 100 120 140
Temperature (qC) Temperature (qC)

VCC = 3.3 V VCC = 5 V

Figure 6-7. Sensitivity vs. Temperature Figure 6-8. Sensitivity vs. Temperature
70 120
65
60 100
55 DRV5055A1 DRV055A1
DRV5055A2 DRV055A2
Sensitivity (mV/mT)
Sensitivity (mV/mT)

50 DRV5055A3 80 DRV055A3
45 DRV5055A4 DRV055A4
40
60
35
30
25 40
20
15 20
10
5 0
3 3.1 3.2 3.3 3.4 3.5 3.6 4.5 4.6 4.7 4.8 4.9 5 5.1 5.2 5.3 5.4 5.5
Supply Voltage (V) D006
Supply Voltage (V) D007

VCC = 3.3 V ±10% VCC = 5 V ±10%

Figure 6-9. Sensitivity vs. Supply Voltage Figure 6-10. Sensitivity vs. Supply Voltage

Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 7


Product Folder Links: DRV5055
DRV5055
SBAS640B – JANUARY 2018 – REVISED APRIL 2021 www.ti.com

6.7 Typical Characteristics (continued)


for TA = 25°C (unless otherwise noted)

70 120
65
60 100
55 DRV5055Z1 DRV055Z1
Sensitivity (mV/mT)

Sensitivity (mV/mT)
50 DRV5055Z2 DRV055Z2
80 DRV055Z3
45 DRV5055Z3
DRV5055Z4 DRV055Z4
40
60
35
30
25 40
20
15 20
10
5 0
3 3.1 3.2 3.3 3.4 3.5 3.6 4.5 4.6 4.7 4.8 4.9 5 5.1 5.2 5.3 5.4 5.5
Supply Voltage (V) Supply Voltage (V)

VCC = 3.3 V ±10% VCC = 5 V ±10%

Figure 6-11. Sensitivity vs. Supply Voltage Figure 6-12. Sensitivity vs. Supply Voltage
6.6

6.4
Operating Supply Current (mA)

6.2

5.8

5.6

5.4 VCC = 3.3 V


VCC = 5 V
5.2
-40 -20 0 20 40 60 80 100 120 140
Temperature (qC) D001

Figure 6-13. Operating Supply Current vs. Temperature

8 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated

Product Folder Links: DRV5055


DRV5055
www.ti.com SBAS640B – JANUARY 2018 – REVISED APRIL 2021

7 Detailed Description
7.1 Overview
The DRV5055 is a 3-pin linear Hall effect sensor with fully integrated signal conditioning, temperature
compensation circuits, mechanical stress cancellation, and amplifiers. The device operates from 3.3-V and
5-V (±10%) power supplies, measures magnetic flux density, and outputs a proportional analog voltage that is
referenced to VCC.
7.2 Functional Block Diagram

Element Bias Bandgap VCC


Reference
Offset 0.01 F
Cancellation Trim (minimum)
GND
Registers
Temperature
Compensation
VCC
Optional filter
Precision Output OUT
Amplifier Driver

7.3 Feature Description


7.3.1 Magnetic Flux Direction
As shown in Figure 7-1, the DRV5055 is sensitive to the magnetic field component that is perpendicular to the
top of the package.

TO-92

SOT-23

PCB

Figure 7-1. Direction of Sensitivity

Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 9


Product Folder Links: DRV5055
DRV5055
SBAS640B – JANUARY 2018 – REVISED APRIL 2021 www.ti.com

Magnetic flux that travels from the bottom to the top of the package is considered positive in this document. This
condition exists when a south magnetic pole is near the top (marked-side) of the package. Magnetic flux that
travels from the top to the bottom of the package results in negative millitesla values.

S
S N

PCB PCB

Figure 7-2. The Flux Direction for Positive B

7.3.2 Magnetic Response


When the DRV5055 is powered, the DRV5055 outputs an analog voltage according to Equation 1:

(
VOUT = VQ + B × Sensitivity (25°C) × (1 + STC × (TA ± 25° C)) ) (1)

where
• VQ is typically half of VCC
• B is the applied magnetic flux density
• Sensitivity(25°C) depends on the device option and VCC
• STC is typically 0.12%/°C for device options DRV5055A1 - DRV5055A4 and is 0%/°C for DRV5055Z1 -
DRV5055Z4 options
• TA is the ambient temperature
• VOUT is within the VL range
As an example, consider the DRV5055A3 with VCC = 3.3 V, a temperature of 50°C, and 67 mT applied.
Excluding tolerances, VOUT = 1650 mV + 67 mT × (15 mV/mT × (1 + 0.0012/°C × (50°C – 25°C))) = 2685 mV.

10 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated

Product Folder Links: DRV5055


DRV5055
www.ti.com SBAS640B – JANUARY 2018 – REVISED APRIL 2021

7.3.3 Sensitivity Linearity


The device produces a linear response when the output voltage is within the specified VL range. Outside this
range, sensitivity is reduced and nonlinear. Figure 7-3 graphs the magnetic response.
OUT
VCC
VL (MAX)

VCC / 2

VL (MIN)
0V
B
north 0 mT south
Figure 7-3. Magnetic Response

Equation 2 calculates parameter BL, the minimum linear sensing range at 25°C taking into account the maximum
quiescent voltage and sensitivity tolerances.

VL(MAX) ± VQ(MAX)
BL(MIN) =
S(MAX) (2)

The parameter SLE defines linearity error as the difference in sensitivity between any two positive B values, and
any two negative B values, while the output is within the VL range.
The parameter SSE defines symmetry error as the difference in sensitivity between any positive B value and the
negative B value of the same magnitude, while the output voltage is within the VL range.
7.3.4 Ratiometric Architecture
The DRV5055 has a ratiometric analog architecture that scales the quiescent voltage and sensitivity linearly with
the power-supply voltage. For example, the quiescent voltage and sensitivity are 5% higher when VCC = 5.25
V compared to VCC = 5 V. This behavior enables external ADCs to digitize a consistent value regardless of the
power-supply voltage tolerance, when the ADC uses VCC as its reference.
Equation 3 calculates the sensitivity ratiometry error:

S(VCC) / S(5V) S(VCC) / S(3.3V)


SRE = 1 ± for V CC = 4.5 V to 5.5 V, SRE = 1 ± for V CC = 3 V to 3.63 V
VCC / 5V VCC / 3.3V (3)

where
• S(VCC) is the sensitivity at the current VCC voltage
• S(5V) or S(3.3V) is the sensitivity when VCC = 5 V or 3.3 V
• VCC is the current VCC voltage

Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 11


Product Folder Links: DRV5055
DRV5055
SBAS640B – JANUARY 2018 – REVISED APRIL 2021 www.ti.com

Equation 4 calculates quiescent voltage ratiometry error:

VQ(VCC) / VQ(5V) VQ(VCC) / VQ(3.3V)


VQRE = 1 ± for V CC = 4.5 V to 5.5 V, VQRE = 1 ± for V CC = 3 V to 3.63 V
VCC / 5V VCC / 3.3V (4)

where
• VQ(VCC) is the quiescent voltage at the current VCC voltage
• VQ(5V) or VQ(3.3V) is the quiescent voltage when VCC = 5 V or 3.3 V
• VCC is the current VCC voltage
7.3.5 Operating VCC Ranges
The DRV5055 has two recommended operating VCC ranges: 3 V to 3.63 V and 4.5 V to 5.5 V. When VCC is
in the middle region between 3.63 V to 4.5 V, the device continues to function, but sensitivity is less known
because there is a crossover threshold near 4 V that adjusts device characteristics.
7.3.6 Sensitivity Temperature Compensation for Magnets
Magnets generally produce weaker fields as temperature increases. The DRV5055 can either compensate by
increasing sensitivity with temperature or by keeping the sensitivity constant, as defined by the parameters STC
and STCz, respectively. For device options DRV5055A1 - DRV5055A4, the sensitivity at TA = 125°C is typically
12% higher than at TA = 25°C. For device options DRV5055Z1 - DRV5055Z4, the sensitivity at TA = 125°C is
typically same as the value at TA = 25°C.
7.3.7 Power-On Time
After the VCC voltage is applied, the DRV5055 requires a short initialization time before the output is set. The
parameter tON describes the time from when VCC crosses 3 V until OUT is within 5% of VQ, with 0 mT applied
and no load attached to OUT. Figure 7-4 shows this timing diagram.
VCC

3V
tON

time

Output

95% × V Q

Invalid

time
Figure 7-4. tON Definition

12 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated

Product Folder Links: DRV5055


DRV5055
www.ti.com SBAS640B – JANUARY 2018 – REVISED APRIL 2021

7.3.8 Hall Element Location


Figure 7-5 shows the location of the sensing element inside each package option.
SOT-23
Top View

SOT-23
Side View

centered 650 µm
±50 µm ±80 µm

TO-92
Top View
2 mm 2 mm
TO-92
1.54 mm Side View

±50 µm 1030 µm
1.61 mm ±115 µm

Figure 7-5. Hall Element Location

7.4 Device Functional Modes


The DRV5055 has one mode of operation that applies when the Recommended Operating Conditions are met.

Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 13


Product Folder Links: DRV5055
DRV5055
SBAS640B – JANUARY 2018 – REVISED APRIL 2021 www.ti.com

8 Application and Implementation


Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.

8.1 Application Information


8.1.1 Selecting the Sensitivity Option
Select the highest DRV5055 sensitivity option that can measure the required range of magnetic flux density, so
that the output voltage swing is maximized.
Larger-sized magnets and farther sensing distances can generally enable better positional accuracy than very
small magnets at close distances, because magnetic flux density increases exponentially with the proximity to a
magnet. TI created an online tool to help with simple magnet calculations at https://www.ti.com/product/drv5013.
8.1.2 Temperature Compensation for Magnets
The DRV5055 temperature compensation is designed to directly compensate the average drift of neodymium
(NdFeB) magnets and partially compensate ferrite magnets. The residual induction (Br) of a magnet typically
reduces by 0.12%/°C for NdFeB, and 0.20%/°C for ferrite. When the operating temperature of a system is
reduced, temperature drift errors are also reduced.
8.1.3 Adding a Low-Pass Filter
As shown in Functional Block Diagram, an RC low-pass filter can be added to the device output for the
purpose of minimizing voltage noise when the full 20-kHz bandwidth is not needed. This filter can improve the
signal-to-noise ratio (SNR) and overall accuracy. Do not connect a capacitor directly to the device output without
a resistor in between because doing so can make the output unstable.
8.1.4 Designing for Wire Break Detection
Some systems must detect if interconnect wires become open or shorted. The DRV5055 can support this
function.
First, select a sensitivity option that causes the output voltage to stay within the VL range during normal
operation. Second, add a pullup resistor between OUT and VCC. TI recommends a value between 20 kΩ to
100 kΩ, and the current through OUT must not exceed the IO specification, including current going into an
external ADC. Then, if the output voltage is ever measured to be within 150 mV of VCC or GND, a fault condition
exists. Figure 8-1 shows the circuit, and Table 8-1 describes fault scenarios.

PCB

DRV5055
VCC
VCC
OUT Cable VOUT
GND

Figure 8-1. Wire Fault Detection Circuit

14 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated

Product Folder Links: DRV5055


DRV5055
www.ti.com SBAS640B – JANUARY 2018 – REVISED APRIL 2021

Table 8-1. Fault Scenarios and the Resulting VOUT


FAULT SCENARIO VOUT
VCC disconnects Close to GND
GND disconnects Close to VCC
VCC shorts to OUT Close to VCC
GND shorts to OUT Close to GND

8.2 Typical Application

S N

Figure 8-2. Common Magnet Orientation

8.2.1 Design Requirements


Use the parameters listed in Table 8-2 for this design example.
Table 8-2. Design Parameters
DESIGN PARAMETER EXAMPLE VALUE
VCC 5V
Magnet 15 × 5 × 5 mm NdFeB
Travel distance 12 mm
Maximum B at the sensor at 25°C ±75 mT
Device option DRV5055A3

8.2.2 Detailed Design Procedure


Linear Hall effect sensors provide flexibility in mechanical design, because many possible magnet orientations
and movements produce a usable response from the sensor. Figure 8-2 shows one of the most common
orientations, which uses the full north to south range of the sensor and causes a close-to-linear change in
magnetic flux density as the magnet moves across.
When designing a linear magnetic sensing system, always consider these three variables: the magnet, sensing
distance, and the range of the sensor. Select the DRV5055 with the highest sensitivity that has a BL (linear
magnetic sensing range) that is larger than the maximum magnetic flux density in the application. To determine
the magnetic flux density the sensor receives, TI recommends using magnetic field simulation software, referring
to magnet specifications, and testing.

Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 15


Product Folder Links: DRV5055
DRV5055
SBAS640B – JANUARY 2018 – REVISED APRIL 2021 www.ti.com

8.2.3 Application Curve


Figure 8-3 shows the simulated magnetic flux from a NdFeB magnet.

Figure 8-3. Simulated Magnetic Flux

16 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated

Product Folder Links: DRV5055


DRV5055
www.ti.com SBAS640B – JANUARY 2018 – REVISED APRIL 2021

8.3 Do's and Don'ts


Because the Hall element is sensitive to magnetic fields that are perpendicular to the top of the package, a
correct magnet approach must be used for the sensor to detect the field. Figure 8-4 shows correct and incorrect
approaches.

CORRECT

N S

S N

N S

INCORRECT

N S

Figure 8-4. Correct and Incorrect Magnet Approaches

Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 17


Product Folder Links: DRV5055
DRV5055
SBAS640B – JANUARY 2018 – REVISED APRIL 2021 www.ti.com

9 Power Supply Recommendations


A decoupling capacitor close to the device must be used to provide local energy with minimal inductance. TI
recommends using a ceramic capacitor with a value of at least 0.01 µF.
10 Layout
10.1 Layout Guidelines
Magnetic fields pass through most nonferromagnetic materials with no significant disturbance. Embedding Hall
effect sensors within plastic or aluminum enclosures and sensing magnets on the outside is common practice.
Magnetic fields also easily pass through most printed-circuit boards, which makes placing the magnet on the
opposite side possible.
10.2 Layout Examples

VCC

GND
VCC GND OUT

OUT

Figure 10-1. Layout Examples

18 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated

Product Folder Links: DRV5055


DRV5055
www.ti.com SBAS640B – JANUARY 2018 – REVISED APRIL 2021

11 Device and Documentation Support


11.1 Documentation Support
11.1.1 Related Documentation
For related documentation see the following:
• Texas Instruments, Overview Using Linear Hall Effect Sensors to Measure Angle application brief
• Texas Instruments, Incremental Rotary Encoder Design Considerations application brief
11.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
11.3 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
11.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
11.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.

11.6 Glossary
TI Glossary This glossary lists and explains terms, acronyms, and definitions.

12 Mechanical, Packaging, and Orderable Information


The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 19


Product Folder Links: DRV5055
PACKAGE OPTION ADDENDUM

www.ti.com 27-Jan-2021

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)

DRV5055A1QDBZR ACTIVE SOT-23 DBZ 3 3000 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 55A1

DRV5055A1QDBZT ACTIVE SOT-23 DBZ 3 250 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 55A1

DRV5055A1QLPG ACTIVE TO-92 LPG 3 1000 RoHS & Green SN N / A for Pkg Type -40 to 125 55A1

DRV5055A1QLPGM ACTIVE TO-92 LPG 3 3000 RoHS & Green SN N / A for Pkg Type -40 to 125 55A1

DRV5055A2QDBZR ACTIVE SOT-23 DBZ 3 3000 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 55A2

DRV5055A2QDBZT ACTIVE SOT-23 DBZ 3 250 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 55A2

DRV5055A2QLPG ACTIVE TO-92 LPG 3 1000 RoHS & Green SN N / A for Pkg Type -40 to 125 55A2

DRV5055A2QLPGM ACTIVE TO-92 LPG 3 3000 RoHS & Green SN N / A for Pkg Type -40 to 125 55A2

DRV5055A3QDBZR ACTIVE SOT-23 DBZ 3 3000 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 55A3

DRV5055A3QDBZT ACTIVE SOT-23 DBZ 3 250 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 55A3

DRV5055A3QLPG ACTIVE TO-92 LPG 3 1000 RoHS & Green SN N / A for Pkg Type -40 to 125 55A3

DRV5055A3QLPGM ACTIVE TO-92 LPG 3 3000 RoHS & Green SN N / A for Pkg Type -40 to 125 55A3

DRV5055A4QDBZR ACTIVE SOT-23 DBZ 3 3000 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 55A4

DRV5055A4QDBZT ACTIVE SOT-23 DBZ 3 250 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 55A4

DRV5055A4QLPG ACTIVE TO-92 LPG 3 1000 RoHS & Green SN N / A for Pkg Type -40 to 125 55A4

DRV5055A4QLPGM ACTIVE TO-92 LPG 3 3000 RoHS & Green SN N / A for Pkg Type -40 to 125 55A4

DRV5055Z1QDBZR ACTIVE SOT-23 DBZ 3 3000 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 55Z1

DRV5055Z1QDBZT ACTIVE SOT-23 DBZ 3 250 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 55Z1

DRV5055Z2QDBZR ACTIVE SOT-23 DBZ 3 3000 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 55Z2

DRV5055Z2QDBZT ACTIVE SOT-23 DBZ 3 250 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 55Z2

Addendum-Page 1
PACKAGE OPTION ADDENDUM

www.ti.com 27-Jan-2021

Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)

DRV5055Z3QDBZR ACTIVE SOT-23 DBZ 3 3000 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 55Z3

DRV5055Z3QDBZT ACTIVE SOT-23 DBZ 3 250 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 55Z3

DRV5055Z4QDBZR ACTIVE SOT-23 DBZ 3 3000 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 55Z4

DRV5055Z4QDBZT ACTIVE SOT-23 DBZ 3 250 RoHS & Green SN Level-2-260C-1 YEAR -40 to 125 55Z4

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

Addendum-Page 2
PACKAGE OPTION ADDENDUM

www.ti.com 27-Jan-2021

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF DRV5055 :

• Automotive: DRV5055-Q1

NOTE: Qualified Version Definitions:

• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects

Addendum-Page 3
PACKAGE MATERIALS INFORMATION

www.ti.com 27-Jan-2021

TAPE AND REEL INFORMATION

*All dimensions are nominal


Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
DRV5055A1QDBZR SOT-23 DBZ 3 3000 178.0 9.0 3.15 2.77 1.22 4.0 8.0 Q3
DRV5055A1QDBZR SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
DRV5055A1QDBZT SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
DRV5055A1QDBZT SOT-23 DBZ 3 250 178.0 9.0 3.15 2.77 1.22 4.0 8.0 Q3
DRV5055A2QDBZR SOT-23 DBZ 3 3000 178.0 9.0 3.15 2.77 1.22 4.0 8.0 Q3
DRV5055A2QDBZR SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
DRV5055A2QDBZT SOT-23 DBZ 3 250 178.0 9.0 3.15 2.77 1.22 4.0 8.0 Q3
DRV5055A2QDBZT SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
DRV5055A3QDBZR SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
DRV5055A3QDBZR SOT-23 DBZ 3 3000 178.0 9.0 3.15 2.77 1.22 4.0 8.0 Q3
DRV5055A3QDBZT SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
DRV5055A3QDBZT SOT-23 DBZ 3 250 178.0 9.0 3.15 2.77 1.22 4.0 8.0 Q3
DRV5055A4QDBZR SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
DRV5055A4QDBZR SOT-23 DBZ 3 3000 178.0 9.0 3.15 2.77 1.22 4.0 8.0 Q3
DRV5055A4QDBZT SOT-23 DBZ 3 250 178.0 9.0 3.15 2.77 1.22 4.0 8.0 Q3
DRV5055A4QDBZT SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
DRV5055Z1QDBZR SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
DRV5055Z1QDBZT SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3

Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION

www.ti.com 27-Jan-2021

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1


Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
DRV5055Z2QDBZR SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
DRV5055Z2QDBZT SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
DRV5055Z3QDBZR SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
DRV5055Z3QDBZT SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
DRV5055Z4QDBZR SOT-23 DBZ 3 3000 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3
DRV5055Z4QDBZT SOT-23 DBZ 3 250 180.0 8.4 3.15 2.77 1.22 4.0 8.0 Q3

*All dimensions are nominal


Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
DRV5055A1QDBZR SOT-23 DBZ 3 3000 180.0 180.0 18.0
DRV5055A1QDBZR SOT-23 DBZ 3 3000 213.0 191.0 35.0
DRV5055A1QDBZT SOT-23 DBZ 3 250 213.0 191.0 35.0
DRV5055A1QDBZT SOT-23 DBZ 3 250 180.0 180.0 18.0
DRV5055A2QDBZR SOT-23 DBZ 3 3000 180.0 180.0 18.0
DRV5055A2QDBZR SOT-23 DBZ 3 3000 213.0 191.0 35.0
DRV5055A2QDBZT SOT-23 DBZ 3 250 180.0 180.0 18.0
DRV5055A2QDBZT SOT-23 DBZ 3 250 213.0 191.0 35.0
DRV5055A3QDBZR SOT-23 DBZ 3 3000 213.0 191.0 35.0
DRV5055A3QDBZR SOT-23 DBZ 3 3000 180.0 180.0 18.0
DRV5055A3QDBZT SOT-23 DBZ 3 250 213.0 191.0 35.0

Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION

www.ti.com 27-Jan-2021

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
DRV5055A3QDBZT SOT-23 DBZ 3 250 180.0 180.0 18.0
DRV5055A4QDBZR SOT-23 DBZ 3 3000 213.0 191.0 35.0
DRV5055A4QDBZR SOT-23 DBZ 3 3000 180.0 180.0 18.0
DRV5055A4QDBZT SOT-23 DBZ 3 250 180.0 180.0 18.0
DRV5055A4QDBZT SOT-23 DBZ 3 250 213.0 191.0 35.0
DRV5055Z1QDBZR SOT-23 DBZ 3 3000 213.0 191.0 35.0
DRV5055Z1QDBZT SOT-23 DBZ 3 250 213.0 191.0 35.0
DRV5055Z2QDBZR SOT-23 DBZ 3 3000 213.0 191.0 35.0
DRV5055Z2QDBZT SOT-23 DBZ 3 250 213.0 191.0 35.0
DRV5055Z3QDBZR SOT-23 DBZ 3 3000 213.0 191.0 35.0
DRV5055Z3QDBZT SOT-23 DBZ 3 250 213.0 191.0 35.0
DRV5055Z4QDBZR SOT-23 DBZ 3 3000 213.0 191.0 35.0
DRV5055Z4QDBZT SOT-23 DBZ 3 250 213.0 191.0 35.0

Pack Materials-Page 3
PACKAGE OUTLINE
LPG0003A SCALE 1.300
TO-92 - 5.05 mm max height
TRANSISTOR OUTLINE

4.1
3.9

3.25
3.05 0.55
3X
0.40 5.05
MAX
1 3

3X (0.8)

3X
15.5
15.1

0.48 0.51
3X 3X
0.35 0.36
2X 1.27 0.05
2.64
2.44

2.68
2.28
1.62
2X (45 ) 1.42

1 2 3
(0.5425) 0.86
0.66
4221343/C 01/2018

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.

www.ti.com
EXAMPLE BOARD LAYOUT
LPG0003A TO-92 - 5.05 mm max height
TRANSISTOR OUTLINE

FULL R
0.05 MAX (1.07) TYP
METAL
ALL AROUND TYP 3X ( 0.75) VIA
TYP

2X
METAL

(1.7) 2X (1.7)

2X
SOLDER MASK
OPENING
1 2 3
(R0.05) TYP 2X (1.07)
(1.27)
SOLDER MASK
OPENING (2.54)

LAND PATTERN EXAMPLE


NON-SOLDER MASK DEFINED
SCALE:20X

4221343/C 01/2018

www.ti.com
TAPE SPECIFICATIONS
LPG0003A TO-92 - 5.05 mm max height
TRANSISTOR OUTLINE

0 1
13.0 0 1
12.4

1 MAX
21
18

2.5 MIN
6.5
5.5
9.5
8.5 0.25
0.15

19.0
17.5

3.8-4.2 TYP 0.45


6.55 12.9 0.35
6.15 12.5

4221343/C 01/2018

www.ti.com
4203227/C
PACKAGE OUTLINE
DBZ0003A SCALE 4.000
SOT-23 - 1.12 mm max height
SMALL OUTLINE TRANSISTOR

2.64 C
2.10
1.12 MAX
1.4
B A
1.2 0.1 C
PIN 1
INDEX AREA

0.95
3.04
1.9 2.80
3

2
0.5
3X
0.3
0.10
0.2 C A B (0.95) TYP
0.01

0.25
GAGE PLANE 0.20
TYP
0.08

0.6
TYP SEATING PLANE
0 -8 TYP 0.2

4214838/C 04/2017

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Reference JEDEC registration TO-236, except minimum foot length.

www.ti.com
EXAMPLE BOARD LAYOUT
DBZ0003A SOT-23 - 1.12 mm max height
SMALL OUTLINE TRANSISTOR

PKG
3X (1.3)
1

3X (0.6)

SYMM

3
2X (0.95)

(R0.05) TYP
(2.1)

LAND PATTERN EXAMPLE


SCALE:15X

SOLDER MASK
SOLDER MASK METAL METAL UNDER OPENING
OPENING SOLDER MASK

0.07 MAX 0.07 MIN


ALL AROUND ALL AROUND

NON SOLDER MASK SOLDER MASK


DEFINED DEFINED
(PREFERRED)

SOLDER MASK DETAILS

4214838/C 04/2017

NOTES: (continued)

4. Publication IPC-7351 may have alternate designs.


5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

www.ti.com
EXAMPLE STENCIL DESIGN
DBZ0003A SOT-23 - 1.12 mm max height
SMALL OUTLINE TRANSISTOR

PKG

3X (1.3)
1

3X (0.6)

SYMM
3
2X(0.95)

(R0.05) TYP
(2.1)

SOLDER PASTE EXAMPLE


BASED ON 0.125 THICK STENCIL
SCALE:15X

4214838/C 04/2017

NOTES: (continued)

6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
7. Board assembly site may have different recommendations for stencil design.

www.ti.com
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you
permission to use these resources only for development of an application that uses the TI products described in the resource. Other
reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party
intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages,
costs, losses, and liabilities arising out of your use of these resources.
TI’s products are provided subject to TI’s Terms of Sale (https:www.ti.com/legal/termsofsale.html) or other applicable terms available either
on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s
applicable warranties or warranty disclaimers for TI products.IMPORTANT NOTICE

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2021, Texas Instruments Incorporated

You might also like