NIKO-SEM N-Channel Logic Level Enhancement P3057LCG

Mode Field Effect Transistor SOT-89

Lead-Free

3
PRODUCT SUMMARY
V(BR)DSS RDS(ON) ID 1. GATE

2
2. DRAIN
25 50mΩ 6A G
3. SOURCE

1
S
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS SYMBOL LIMITS UNITS
Gate-Source Voltage VGS ±20 V
TC = 25 °C 6
Continuous Drain Current ID
TC = 100 °C 4 A
1
Pulsed Drain Current IDM 20
TC = 25 °C 3
Power Dissipation PD W
TC = 100 °C 1.2
Operating Junction & Storage Temperature Range Tj, Tstg -55 to 150
1
°C
Lead Temperature ( /16” from case for 10 sec.) TL 275

THERMAL RESISTANCE RATINGS

THERMAL RESISTANCE SYMBOL TYPICAL MAXIMUM UNITS
Junction-to-Case RθJC 18
°C / W
Junction-to-Ambient RθJA 160
1
Pulse width limited by maximum junction temperature.
2
Duty cycle ≤ 1%

ELECTRICAL CHARACTERISTICS (TC = 25 °C, Unless Otherwise Noted)

LIMITS
PARAMETER SYMBOL TEST CONDITIONS UNIT
MIN TYP MAX
STATIC
Drain-Source Breakdown Voltage V(BR)DSS VGS = 0V, ID = 250µA 25
V
Gate Threshold Voltage VGS(th) VDS = VGS, ID = 250µA 0.8 1.2 2.5
Gate-Body Leakage IGSS VDS = 0V, VGS = ±20V ±250 nA
VDS = 20V, VGS = 0V 25
Zero Gate Voltage Drain Current IDSS µA
VDS = 20V, VGS = 0V, TJ = 125 °C 250

On-State Drain Current1 ID(ON) VDS = 10V, VGS = 10V 6 A

Drain-Source On-State VGS = 4.5V, ID = 3A 70 115

RDS(ON) mΩ
Resistance1 VGS = 10V, ID = 6A 48 85
Forward Transconductance1 gfs VDS = 15V, ID = 6A 16 S

1 Jun-29-2004
NIKO-SEM N-Channel Logic Level Enhancement P3057LCG
Mode Field Effect Transistor SOT-89
Lead-Free

DYNAMIC
Input Capacitance Ciss 450
Output Capacitance Coss VGS = 0V, VDS = 15V, f = 1MHz 200 pF
Reverse Transfer Capacitance Crss 60
2
Total Gate Charge Qg 15
Gate-Source Charge 2
Qgs VDS = 0.5V(BR)DSS, VGS = 10V, 2.0 nC
Gate-Drain Charge 2
Qgd ID = 6A 7.0
2
Turn-On Delay Time td(on) 6.0
Rise Time2 tr VDS = 15V, RL = 1Ω 6.0
nS
Turn-Off Delay Time2 td(off) ID ≅ 12A, VGS = 10V, RGS = 2.5Ω 20

Fall Time2 tf 5.0

SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 °C)
Continuous Current IS 2.3
A
Pulsed Current3 ISM 4
Forward Voltage1 VSD IF = IS, VGS = 0V 1.5 V
1
Pulse test : Pulse Width ≤ 300 µsec, Duty Cycle ≤ 2%.
2
Independent of operating temperature.
3
Pulse width limited by maximum junction temperature.

REMARK: THE PRODUCT MARKED WITH “P3057G”, DATE CODE or LOT #

Orders for parts with Lead-Free plating can be placed using the PXXXXXXG parts name.

2 Jun-29-2004
NIKO-SEM N-Channel Logic Level Enhancement P3057LCG
Mode Field Effect Transistor SOT-89
Lead-Free

3 Jun-29-2004
NIKO-SEM N-Channel Logic Level Enhancement P3057LCG
Mode Field Effect Transistor SOT-89
Lead-Free

SOT-89 MECHANICAL DATA

mm mm
Dimension Dimension
Min. Typ. Max. Min. Typ. Max.

A 4.3 4.5 4.7 H 1.4 1.5 1.6

B 1.6 1.7 1.8 I 2.8 3.0 3.2

C 0.4 0.5 0.6 J 1.3 1.5 1.7

D 2.4 2.5 2.6 K 3.8 4.2 4.6

E 0.8 1.2 1.4 L 0.3 0.4 0.5

F 0.4 0.45 0.5 M

G 0.4 0.5 0.6 N

4 Jun-29-2004