From Source to Assembly Code
a+b=c
Instruction Set Architecture
Chapter 2
compiler
LOAD R1, a LOAD R2, b ADD R3, R1, R2 STORE R3, c
What Is an Instruction?
ALU
4
LOAD R1, (100) ADD R5, R1, R4 BZ R5, 540
In a CPU
M U X
NPC Zero? A IR Reg B
M U X M U X
result
operand1
operandn
PC
Cond
Cond
location (memory or register) opcode: type (INT, FP) which operation (ADD, MULT ) type of operands (INT, FP) ADD R1, R3, R4 ADD F1, F2, F3 SUB R1, R2, (100) FADD R1, R2, R3
Instruction cache
Data cache
ALU
IM
ALU Output
DM
LMD
M U X
opcode opcode
Sign extend
Imm
To main memory
BZ R5, R1, (100) LOAD 540 R4 ADD R5, R1,
To main memory
Instruction Set Architecture
Which operations will a processor support?
ADD, MULT, SUB
Goals for Instruction Set Design
Short instructions
Minimize instruction width minimize program size
Where can ALU operands reside?
Memory, registers, stack
Good instruction density
Minimize instruction count minimize program size
Where can ALU result be stored?
Memory, registers, stack
How many operands in each instruction?
Fixed or as many as we want
Fast operations
ADD (100), (200), (40) longer than ADD R1, R2, R3
Range of operands Length of an instruction
Fixed or variable
Simple circuitry Compiler optimisation
Instruction Classification:
By Type of Internal Storage (Where are ALU operands/result?)
Stack Accumulator General purpose register (GPR)
Register-memory Register-register (load-store) Memory-memory
A B C
Stack Architecture
stack
TOS memory
C=A+B
Push A Push B Add Pop C
ALU
Stack Architecture
stack
Stack Architecture
stack
TOS memory
A B C
C=A+B
Push A Push B Add Pop C
TOS memory
A B C
C=A+B
Push A Push B Add Pop C
ALU
ALU
Stack Architecture
stack
Stack Architecture
stack
TOS memory
A B C
C=A+B
Push A Push B Add Pop C
TOS memory
A B C
C=A+B
Push A Push B Add Pop C
ALU
ALU
Stack Architecture
Special instructions to access memory
push, pop
Accumulator Architecture
accumulator
Operands loaded from memory onto the stack ALU performs operation upon the last two elements on the stack Both operands and location of result are implicit First operand is removed from the stack, result is written in the place of the second operand Result has to be explicitly stored back into memory
C=A+B
memory
A B C
Load A Add B Store C
ALU
Accumulator Architecture
accumulator
Accumulator Architecture
accumulator
C=A+B
memory
A B C
C=A+B
memory
A B C
Load A Add B Store C
Load A Add B Store C
ALU
ALU
Accumulator Architecture
accumulator
Accumulator Architecture
Any operation can access memory First operand is loaded from the memory into accumulator Operation is performed on the accumulator and the second operand (from the memory) First operand and location of result are implicit Result is written into accumulator Result has to be explicitly stored back into memory
C=A+B
memory
A B C
Load A Add B Store C
ALU
Register-Memory Architecture
R1
Register-Memory Architecture
R1
R3
C=A+B
R3
C=A+B
memory
A B C
Load R1, A Add R3, R1, B Store R3, C
memory
A B C
Load R1, A Add R3, R1, B Store R3, C
ALU
ALU
Register-Memory Architecture
R1
Register-Memory Architecture
R1
R3
C=A+B
R3
C=A+B
memory
A B C
Load R1, A Add R3, R1, B Store R3, C
memory
A B C
Load R1, A Add R3, R1, B Store R3, C
ALU
ALU
Register-Memory Architecture
Any operation can access memory First operand is loaded from the memory into a register Operation is performed on the register and the second operand (from the memory) Both operands and location of result are explicit Result is written into a register Result has to be explicitly stored back into memory
Load-Store Architecture
R1 R2 R3
C=A+B
Load R1, A Load R2, B Add R3, R1, R2 Store R3, C
memory
A B C
ALU
Load-Store Architecture
R1 R2 R3
Load-Store Architecture
R1 R2 R3
C=A+B
Load R1, A Load R2, B Add R3, R1, R2 Store R3, C
C=A+B
Load R1, A Load R2, B Add R3, R1, R2 Store R3, C
memory
A B C
memory
A B C
ALU
ALU
Load-Store Architecture
R1 R2 R3
Load-Store Architecture
R1 R2 R3
C=A+B
Load R1, A Load R2, B Add R3, R1, R2 Store R3, C
C=A+B
Load R1, A Load R2, B Add R3, R1, R2 Store R3, C
memory
A B C
memory
A B C
ALU
ALU
Load-Store Architecture
Special instructions to access memory
load, store
Memory-Memory Architecture
First operand is loaded from the memory into a register Second operand is loaded from the memory into a register Operation is performed on the registers Both operands and location of result are explicit Result is written into a register, and has to be explicitly stored back into memory
C=A+B
memory
A B C
Add C, A, B
ALU
Memory-Memory Architecture
Memory-memory architecture: (obsolete)
Operation is performed on the memory locations Result is written into the memory
Which Architecture Is the Best?
Early computers used stack, accumulator, register-memory and memory-memory Current computers use load-store:
Register access is faster Registers can be named with fewer bits than memory Registers allow for compiler optimisations (out of order execution) Registers can be used to hold all the variables relevant for a specific code segment all operations are faster
Exercise
Write the code segment
In stack architecture In accumulator architecture In register-memory architecture In load-store architecture In memory-memory architecture
x*y=z z-w=z
