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TC80310APWS

EN DE FR
This Datasheet is presented by Dieses Datenblatt wird vom Cette fiche technique est
the manufacturer Hersteller bereitgestellt présentée par le fabricant
Freescale Semiconductor Document Number: TC80310
Advance Information Rev 4.0, 12/2013

Alternator Regulator with LIN

The 80310 is an integrated circuit intended to regulate the output 80310
voltage of an automotive alternator.
The IC supplies a current via a high side MOSFET to the excitation
coil of the alternator and provides an internal freewheeling diode. It AUTOMOTIVE ALTERNATOR
keeps the battery at its nominal charge and delivers current to REGULATOR
electrical devices within the vehicle.
The 80310 also provides a load response control mechanism
(LRC), and has an interface for the industry standard LIN protocol
(Revision 1.3) to allow an ECU to control the regulated voltage and the
LRC rate among other parameters. The ECU also can read back
information about the status of the regulator and the alternator via LIN.
It can be programmed for most functions using OTP (Non-volatile
memory) and fit a large number of alternators and applications.

Features
• High side field driver
• Internal freewheeling diode TOP VIEW
• Up to 8.0 A rotor current (excitation coil)
• Load response control (LRC) ORDERING INFORMATION
• Thermal protection
Temperature
• Thermal compensation Device Package
Range (TJ)
• LIN interface
• Set point voltage selectable from 10.6 to 16 V Devices part numbers are dependant on programming from
factory.
• Rotor control and die temperature monitoring via LIN
TO3 - Contact sales for information on limited engineering
sample quantities. Production version is die sales only.

1.5 μF/2.2 μF Master

Stator ECU
B+A
PH1 Diagnose
LIN
PH2 Control
SGND
EXC GND
+
TC80310 Battery
-
Rotor
Coil

Alternator
Figure 1. 80310 Simplified Application Diagram (LIN Mode)

1.5 μF/2.2 μF
Stator B+A
PH1
LIN
PH2
SGND
EXC GND
+
TC80310 Battery
-
Rotor
Coil

Alternator

Figure 2. 80310 Simplified Application Diagram (Standalone, Self-start Mode)

* This document contains certain information on a new product.

Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2009-2013. All rights reserved.
DEVICE VARIATIONS

DEVICE VARIATIONS

Table 1. Version Determined Electrical Parameters

Version Self- Self-start Phase Default Fstart Fstop LRC LRC Crest BUS Default Thermal Thermal Special Alternat Slave
start Threshol sensitivity Regulati (RPM) (RPM) Rate(s) disabl Regulatio inactivity LIN Fault Compensatio LIN or pole- Addres
d (RPM) (V) on e n (s) Reado Threshol n threshold Feature pair s
Voltage (RPM) ut d (°C) (°C)
(V)

Active/ 3000/ 0.45/0.9/ 13.5 to 800/ 500/ 0/3/ 2400/ Active / 1.31 / 3 T°/ 135/145/ 135/145/150/ Active/ 6/8 A/B
Not 4000 1.35/1.8 15 1050/ 650/ 6.4/ 3000/ Not Active Curren 150/160 160 Not
Active (100 mV 1300/ 850/ 12.3 4000/ t Active
steps) 1550/ 1000 Never
1800/
2050/
2300/
2500

Versions
TO3 Active 3000 0.45 14.3 800 500 3 3000 Not active 3 Curren 145 145 Active 6 A
t

Devices part numbers are dependant on programming from factory.

TC80310xHWS Various configurations are available and are programmable by OTP at the Freescale factory. Please contact your Freescale sales representative
for further details, based on your system requirements, and solutions available.

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 INTERNAL BLOCK DIAGRAM

INTERNAL BLOCK DIAGRAM

B+A

Trim Vlogic 5V
Trim MUX
Buffer Vanalog 5V BUS
ADC SUPPLY Vanalog_
Bpa_sense_ switch 5
buffer
÷ 10

T° Vpump 5V
Low Temperate
Pas Current 10 Bits
Filter 10 Bits
1.2KHz Start End
Conversion Conversion

Bandgap Trim
B +A
4.0MHz
CLK Charge
T° Measurement
Pump
Digital Core

CLK Phase ON/OFF

PH1 Drive and
High Phase Protection
Phase EXC
Processor Sensitivity S/C Current
Measurement
PH2
Internal BUS

POR OTP
PGN

SGN

Figure 3. 80310 Simplified Internal Block Diagram

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PIN CONNECTIONS

PIN CONNECTIONS

PH2

BUS 2
3 PH1

4
SGND B+A
5

PGND 6
7 EXC

Figure 4. TC80310 Die Connections

Bottom View Transparent Top View

Figure 5. JTO3 Pin Connections (Sample Configuration Only) Non-production

Table 2. 80310 Pin Definitions

A functional description of each pin can be found in the Functional Pin Description section beginning on page 9.
Pad Number Pin Number
Pin Name Pin Function Formal Name Definition
TC80310 TO3

1 1 PH2 (φ2) Input Phase 2 Signal from alternator phase 2

2 2 PH1 (φ1) Input Phase 1 Signal from alternator phase 1

3 3 BUS Input/Output LIN Bus LIN connected to master

4 4 SGND N/A Signal Ground Ground pin

5 5 B+A Power Supply Voltage This pin is connected to the battery of the vehicle

6 6 EXC Output Excitation This pin is connected to the rotor coil of the alternator

7 7 PGND N/A Power Ground Ground termination

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 ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

MAXIMUM RATINGS

Table 3. Maximum Ratings

All voltages are with respect to ground, unless otherwise noted. Exceeding these ratings may cause a malfunction or
permanent damage to the device. TA = 25 °C, unless otherwise stated.
Ratings Symbol Value Unit

ELECTRICAL RATINGS

B+A Supply Pin

VB+CONT 27 V
DC Voltage
VB+TRANS 40 V
Load Dump Transient Voltage (ISO7637-2)

Maximum Reverse B+A Voltage(1) V-B+A V

-2.4
(5 seconds)

Maximum Excitation Current at TJ = 150 oC(2) IEXC 5.0 A

o
Maximum Excitation Current at TJ = 25 C IEXC 8.0 A
Recirculation Diode Peak Current 8.0 A
Recirculation Diode Reverse Voltage 40 V
PHASE Input Voltage Range VPHASE ±40 V
BUS Pin Input Range -2.0 to +40 V
ESD Voltage(3) V
VESD1 ±6000
Human Body Model - All Pins (MIL std 883C)(4)
VESD2 ±200
Machine Model - All Pins
VESD3 ±8000
Accessible Pins (EN61.000-4-2) When Mounted on the Alternator (BUS &
B+A) by Contact Discharge
VESD4 ±15000
Air Discharges When Mounted on the Alternator(5)

Standard Transient Pulses ISO7637-1 & -3 Level 150 V

THERMAL RATINGS
Storage Temperature TSTOR -45 to +150 °C
Operating Junction Temperature(6) TJ -40 to +150 °C
Thermal Shutdown Temperature TJ-TSD 185 °C
Thermal Shutdown Hysteresis TTSD-HYST 10 °C

Notes
1. Not tested. Depends on package and bonding.
2. Characterized at 150°C but not production tested
3. Testing is performed in accordance with the Human Body Model (CZAP = 100 pF, RZAP = 1500 Ω), Charge Device Model, Robotic
(CZAP = 4.0 pF), or the EN61000-4-2 specification (CZAP = 150 pF, RZAP = 330 Ω).
4. Except Phase1 and Phase2 (+/-5000 V)
5. Product Powered. ESD done on pulley, B+ and metal alternator case (CZAP = 330 pF, RZAP = 2.0 kΩ)
6. Guaranteed by Design.

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ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS

STATIC ELECTRICAL CHARACTERISTICS

Table 4. Static Electrical Characteristics

Electrical parameters are tested at die level from 30 to 140 °C. Typical values noted reflect the approximate parameter mean
at TA = 25 °C under nominal conditions, unless otherwise noted. Parametric guaranteed from TJ = -40 to 150 °C, unless otherwise
noted. Operation is guaranteed by design up to TJ-TSD.

Characteristic Symbol Min Typ Max Unit

Operating Voltage, VB+A VB+A 8.0 – 27 V

Bus Operating Voltage (LIN) VBUS 8.0 – 18 V

Quiescent Current at VB+A=12.5 V (Phases at 0 V) ISB2.B+A-0 – – 110 μA

(including phase currents at 25 °C)

Quiescent Current at VB+A=12.5 V (Phases at 12.5 V) ISB2.B+A-1 – – 250 μA

(including phase currents at 25 °C)

Operating Current IOP – 12 16 mA

no EXC Load at 25 °C and VB+A = 13 V

Range of Regulation Voltage (50% DC) VREG 10.60 – 16.0 V

VREG Setting Accuracy Voltage ΔVREG1 -100 – +100 mV

at 50% for VREG = 13.8 V and TJ = 25 oC

VREG Setting Accuracy Voltage ΔVREG2 -150 – +150 mV

at 50% for VREG = 10.7 V and VREG = 16 V and TJ = 25 oC

Load Dump Detection Threshold Voltage VLD – 21 – V

ΔVREG with Load Voltage(7) ΔVREG-L -150 – 0 mV

ΔVREG with Speed Voltage(8) ΔVREG-S -100 – 100 mV

oC(9)
RDS-ON FIELD TMOS at IEXC = 5.0 A and TJ = 140 RDS.ON.EXC – – 100 mΩ

Over-voltage Detection(10) VEXC.SEN 0.3 0.6 1.0 V

Recirculation Diode Voltage at 5.0 A (Excitation Current) VF – 1.2 1.5 V

Phase Input High Threshold Voltage (PHASE OK) VP-H – 8.0 – V

Phase Input High Hysteresis Voltage (PHASE OK) VPH-HYST – 1.0 – V

Over-voltage (Fault) Threshold Voltage VOV 16.2 16.5 – V

(11)
EXC Short-circuit Protection Threshold IEXC-SC – 10 – A

LIN Peak Short-circuit Current ILIN-SC – 62 150 mA

Notes
7. Changing load from 5% to 90% of alternator capability.
8. At low load (5%) and varying alternator speed from 2000 RPM to 18000 RPM. By design, not tested.
9. The thermal capability of the packaging is critical to the full use of the output drive.
10. If there is a high voltage and the EXC pin is above this voltage a fault is detected.
11. Pulsed at low duty cycle.

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 ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS

Table 4. Static Electrical Characteristics (continued)

Electrical parameters are tested at die level from 30 to 140 °C. Typical values noted reflect the approximate parameter mean
at TA = 25 °C under nominal conditions, unless otherwise noted. Parametric guaranteed from TJ = -40 to 150 °C, unless otherwise
noted. Operation is guaranteed by design up to TJ-TSD.

Characteristic Symbol Min Typ Max Unit

Bus Voltage Low Level Receive (LIN)(12) VBUS-LOW-REC – – 0.3 * VB+A V

Bus Voltage Low Level Send (LIN)(12) VBUS-LOW-SEND – – 1.4 V

Bus Voltage High Level Receive (LIN)(12) VBUS-HIGH-REC – – 0.7*VB+A V

Bus Voltage High Level Send (LIN)(12) VBUS-HIGH-SEND 6.4 – – V

Emergency Regulation Voltage(13) VVCCLB – 8.5 9.5 V

Notes
12. Referred to regulator/alternator ground.
13. Operates asynchronous to the regulation cycle in case of a very rapid drop in B+A, usually caused by adding a heavy load without a
battery in the system.

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ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS

DYNAMIC ELECTRICAL CHARACTERISTICS

Table 5. Dynamic Electrical Characteristics

Electrical parameters are tested at die level from 30 to 140 °C. Typical values noted reflect the approximate parameter mean
at TA = 25 °C under nominal conditions, unless otherwise noted. TJ from -40 to 150 °C, unless otherwise noted. Operation is
guaranteed by design up to TJ-TSD.

Characteristic Symbol Min Typ Max Unit

Regulation Frequency FREG 106 122 137 Hz

Phase Noise Rejection Filter tLPH – 12.5 – μs

(14)
Fault Qualification Delay/Filter tFAULT – 400 – ms

Bus Signal Risetime (LIN) tRISE 5.0 – 40 μs

From 20% to 80% of VBUS with VB+A = 18 V

Bus Signal Falltime (LIN) tFALL 3.5 – 40 μs

From 20% to 80% of VBUS with VB+A = 18 V

Minimum Duty Cycle DCMIN – 4.1 – %

Start-up Duty Cycle DCSTARTUP – 13.5 – %

Delta LRC Duty Cycle ΔLRC – 3.125 – %

Notes
14. A fault has to be present for the entire time before it is considered valid.

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 FUNCTIONAL DESCRIPTION
INTRODUCTION

FUNCTIONAL DESCRIPTION

INTRODUCTION

The 80310 is an integrated circuit intended to regulate the The information sent back to the ECU:
output voltage of an automotive alternator. • Die temperature
The IC supplies a current via a high side MOSFET to the • Excitation current
excitation coil of the alternator and provides an internal • EXC duty cycle (DF)
freewheeling diode. It keeps the battery at its nominal charge • Manufacturer and class
and delivers current to electrical devices within the vehicle. • Faults:
The 80310 also provides a load response control •Electrical, mechanical, temperature
mechanism (LRC), and has an interface for the industry •LIN time out
standard LIN protocol (v1.3) to allow an ECU (master) to •LIN communication error: watchdog, check sum, Id
control the regulated voltage and the LRC rate among other parity, sync break
parameters.
The IC can be programmed as an OTP device (One Time
The ECU also can read back information about the status
Programmable) to fit a large number of alternators and
of the regulator and the alternator via LIN.
applications. These programmable parameters are described
The programmable parameters by the ECU: in the functional device operation (Table 6). This circuit is
• Regulated voltage specially designed to operate in harsh automotive
• LRC ramp time, LRC cut off environment.
• Excitation current limitation

FUNCTIONAL PIN DESCRIPTION

PHASE (PH1 AND PH2) LIN BUS (BUS)

These pins connect to stator windings. These signals are This LIN pin represents the single-wire bus transmitter and
used for the rotor speed measurement, stator voltage receiver. It is suited for automotive bus systems and is based
measurement as well as the self start detection. on the LIN bus specification v1.3.

GROUND PINS (PGND, SGND)


The 80310 has two different types of ground pins. The
 
 PGND pin is the power ground pin for the device. The SGND
is the signal ground pin.
Important: The PGND, the SGND pins must be connected
together to a ground external to the device.


SUPPLY VOLTAGE (B+A)
The 80310 is supplied by this B+A pin. This voltage is also
used as the feedback voltage by the control circuit.

EXCITATION (EXC)
This pin is connected to the excitation coil (rotor) of the
Figure 6. Internal Signals in Normal Mode alternator. The IC supplies a current via a high side MOSFET
In this situation the regulator stays in Normal mode. (P1 to the excitation winding to create a magnetic filed in the
and P2 represent internal signals coming from the phase rotor. This generates sinusoidal currents in the stator which
processor block, which are routed to the logic block). are rectified by a diode bridge.

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FUNCTIONAL DESCRIPTION
FUNCTIONAL INTERNAL BLOCK DESCRIPTION

FUNCTIONAL INTERNAL BLOCK DESCRIPTION

TC80310 - Functional Block Diagram

Integrated Supply
Power Stage
Divider/Filter Bandgap
POR
Charge Pump
Logic & Control
Phase Low & High
A/D Converter Drive and
Die Temperature
Protection
Clock OTP
Digital Current
LIN Measurement

Supply Voltage Logic& Control Power

Figure 7. Functional Internal Block Diagram

SUPPLY VOLTAGE: FILTER/DIVIDER, BANDGAP, LOGIC AND CONTROL:

AND POR
An input filter and divider provides a clean image of the DIGITAL
battery to the digital regulation loop circuit. The divider ratio The digital block gathers all the digital functions of the
can be adjusted by OTP. device. The main functionality is described in the device
The supply block provides the voltages for the internal operation paragraph.
blocks of the 80310:
• Main logic CLOCK
• Analog permanently powered or not This block is the clock reference for the digital block. The
• LIN transceiver oscillator generates a 5.0 V square wave at the frequency of
• Charge pump 4.0 MHz in Normal mode operation.
The purpose of the POR block is to generate a clean
power-on signal to the main logic. OTP
The Bandgap block provides the voltage and current This block allows an easy configuration and adjustment of
references for the other blocks. the circuit. A set of NVM bits can be programmed during the
factory test phase. They are described in Table 6.
POWER STAGE: CHARGE PUMP, DRIVE AND
PROTECTION, CURRENT MEASUREMENT PHASE LOW & HIGH
The power stage of the circuit consists of the gate driver The phase detector monitors the Phase inputs and sends
with a charge pump and protection to control a low side driver filtered low and high levels to the main logic when either one
switching the excitation current. A short-circuit is has reached the detection level (1.0 V at startup and 8.0 V
instantaneously detected and the excitation current is turned afterwards).
off until the next regulation cycle. A freewheeling diode is
inserted between the EXC and GND pins, across the ADC
excitation coil for the energy recirculation. The analog to digital converter is used in the voltage
The current measurement block provides a proportional regulation loop, in the current feedback and in temperature
value of the excitation current flowing in the high side switch. measurement.

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 FUNCTIONAL DESCRIPTION
FUNCTIONAL INTERNAL BLOCK DESCRIPTION

LIN digital number to be transmitted via the LIN bus to the

This block allows the LIN bus transmission and reception. controller.

T° MEASUREMENT POWER ON RESET (POR):

This block generates a voltage proportional to the die When a Power On Reset occurs, product internal registers
temperature. This voltage is converted by the ADC into a are reset and the product goes into standby mode.

5.00

4.80

4.60

4.40

4.20

4.00
-40.00 -10.00 20.00 50.00 80.00 110.00 140.00
Temp(deg C)

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FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES

FUNCTIONAL DEVICE OPERATION

OPERATIONAL MODES

The following figure describes the battery operating voltage.

DC BATTERY VOLTAGE
MAX RATING
40 V

27 V (1.0 MIN.)
LOAD DUMP DETECTION, EXCITATION OFF
21 V

16.5 V EXCITATION WITH MINIMUM PWM DUTY-CYCLE OVER-VOLTAGE FAULT

DETECTION (16.5 V)
16 V

13.8 V REGULATION RANGE (PWM REGULATION)

10.6 V
EXCITATION AVAILABLE WITH 100% OF DUTY-CYCLE
(TARGETED VALUE IN LOGIC RAM)
8.5 V
PREVIOUS LOGIC CONFIGURATION IS MAINTAINED.
(LAST TARGETED VALUE STORED IN LOGIC RAM). 100% DUTY-CYCLE. NO LRC.
5.0 V
LOGIC RESET (DEFAULT TARGET OF REGULATION)
-2.4 V (5.0 SEC.)
MAX RATING

Figure 8. Battery Operating Voltage Range

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 FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS

LOGIC COMMANDS AND REGISTERS

This IC is One Time Programmable (OTP), during the final are selectable by the customer. These Non-volatile Memory
test phase, in the factory. The OTP Programmable Options (NVM) bits are not alterable after the OTP operation at the
table (Table 6) describes the programmable functions that factory.

Table 6. OTP Programmable Options

Function OTP Bits Comments.

Default Regulation Voltage 4 13.5 to 15 V, 100 mV steps

Phase Start Regulating RPM(15), fSTART 3 800 - 2500 RPM, 8 possible values

(800, 1050, 1300, 1550, 1800, 2050, 2300, 2500)

Phase Stop Regulating RPM(15), fSTOP 2 500, 650, 850,1000 RPM

LRC Disable RPM Default(15),fLRC 2 2400, 3000, 4000 RPM & never

LRC Rate 2 0, 3.0, 6.4 & 12.3 seconds

Alternator Pole-pairs 2 6, 7, 8 & 9

Slave Address 1 Two address options, A or B

Phase Sensitivity (Startup) 2 0.45 V, 0.9 V, 1.35 V, 1.8 V(16)

Self-start (Auto-amorcage) 1 Yes or No.

Self-start Threshold 2 3000, 4000 RPM

Bus Inactivity or Data Corruption Timeout 1 1.31 or 3 seconds

Default LIN Readout Temp or EXC Current 1 Select Temperature or Current

Thermal Fault Threshold 2 135 °C, 145 °C, 150 °C, 160 °C

Thermal Compensation Threshold 2 135 °C, 145 °C, 150 °C, 160 °C

Low Voltage Threshold 1 75% of the target regulation voltage or none

Alternator Supplier and Class 3+5 Alternator Information.

Crest Regulation 1 Enabled or disabled

Parity Bit 1 Data Protection

Special LIN Features, nvm-lin-special, LIN com with global 1 Enabled or Disabled
ID (2B+3C)

Security “lock bits“ 1 EOL

Notes
15. These are adjustable independently, the IC internally compensates for the pole-pairs if the correct OTP setting is made. Frequency
measurements are made over multiple cycles (8) for greater accuracy.
16. Typical values at room temp (30 °C)

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 FUNCTIONAL DEVICE OPERATION
STATE MACHINE

STATE MACHINE

The following diagram describes the state machine of the TC80310:

- POR
Standby - LIN Timeout with no Phase
- LIN MID3C if nvm_lin_special
Edge on Phase
No edge on Phase but
Edge on LIN

Wake-up
- LIN = 10.6V with no Phase
on Phase - LIN = 10.6V whatever the Phase if
W ake-up
on LIN nvm_106V_ref_off

LIN Command with Vreg <> 10.6V:

See cont. in - MID 29 if nvm_ALT1
- MID2A if nvm_ALT2
Self-Start State - MID2B if nvm_lin_special
Machine
PRE-EXC

Phase > Start

Phase < Stop
No High Phase1 in the
previous cycle and Phase
Regulation is ON

Phase < Stop

Phase
Phase
REGULATION w LRC Regulation
REGULATION
(High Phase1 appears) or
(100%DC during 8 cycles =>
Phase > LRC Phase Regulation set OFF)
Phase < LRC and first Vreg reached with LRC

No High Phase1 in the

previous cycle and Phase
Regulation is ON
Phase
Phase
REGULATION w/o LRC Regulation
REGULATION
(High Phase 1 appears) or
(100%DC during 8 cycles =>
Phase Regulation set OFF)

Figure 9. LIN Wake-up State Machine

STANDBY: After a LIN timeout, if no valid instruction is decoded, then

The 80310 is in standby mode, if there is a LIN timeout and the device goes back into Stand-by mode.
in absence of alternator rotation (no phase), or in case of
power and reset (POR), or with a LIN MID3C command if PRE-EXC:
nvm_lin_special is set The pre-excitation state is reached as soon as a valid
• There is no excitation. instruction for the regulated value (VREG), different from
• The duty cycle (DC) is equal to zero. 10.6 V, is decoded.
The device needs a small amount of quiescent current to If B+A is lower than the expected (VREG), then the duty
feed some functions such as oscillator. cycle is equal to DCSTART UP, or else DCMIN.
LIN timeout means: The purpose of pre-excitation is to increase the
magnetization of the alternator, to guarantee a minimum
• No activity on the LIN bus during a specified time
phase voltage for the rotor speed measurement when the
• or on a LIN watchdog timeout during a specified time
engine starts.
The pre-excitation stays active until the detection of phase
WAKE-UP:
starts regulating RPM (fSTART).
This state is reached when a transition is detected on the
communication interface.
REGULATION WITH LRC:
• The logic is out of reset.
In this mode, the 80310 regulates the alternator output to
• All the blocks are on. the set reference level. The excitation is controlled by LRC if
• There is no regulation. DC = 0% this LRC mode is active until the detection of phase stop This

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 FUNCTIONAL DEVICE OPERATION
STATE MACHINE

LRC mode is active until the detection of phase stop with LRC mode. If the phase frequency goes below the phase
regulating RPM (fSTOP). In this case, the device goes back to stop regulating RPM, the device goes to pre-excitation mode.
the pre-excitation mode. If the phase frequency reaches the
LRC disable RPM default (fLRC), the device goes into RE-REGULATION:
regulation without LRC. The excitation is forced to 100%. This mode is active if
there is no high phase on non active phase (PHx < VPH) in
REGULATION WITHOUT LRC: the previous cycle, until the high phase comes back. At the
This mode is active when the phase frequency is above end of the 8th cycle, if there is still no high phase, the
the LRC disable RPM default (fLRC), the first VREG was regulation mode is set off and the device goes back to the
reached with LRC. regulation mode with or without LRC.
The excitation is controlled only by the internal comparator
of B+A and VREG. The DC can not be lower than DCMIN. B+A is lower than VREG. In any case, DC cannot be lower
If the phase frequency goes below the LRC disable RPM than DCMIN.
default (fLRC), then the 80310 comes back to the regulation
.
- POR
- L IN Tim eo ut w ith no Ph ase
S tand b y - L IN M ID 3 C if n vm _ lin _spe cial

E d ge on Pha se
. Re start tim er 10 0m s

W ake -u p on T im e ou t 100 m s
P ha se
L IN C om m a nd with V reg <> 1 0.6 V:
- MID 29 if n vm _AL T 1
- M ID 2A if nv m _AL T 2 Ph ase > Star t_ aa
- M ID 2B if n vm _lin _sp ec ial . R estart timer 1 00 ms

T ime o ut 100 m s
EX C 1 00 % D C

Hig h Ph ase 1
ap pears

PR E-EX C

P ha se > Start
P hase < Sto p
No High Ph ase1 in th e
pr ev io us cycle an d P hase
Ph ase < Stop Regu lation is ON
R EG U L A TIO N w LRC Ph ase
REG U LA T IO N
(High Phase1 appe ars) o r
(1 00% DC du rin g 8 cyc les = > Pha se
Phase > L RC Re gu la tion se t OF F)
Ph ase < L R C an d first Vre g rea ched
with L R C
No Hig h Ph ase 1 in th e
pr eviou s c ycle an d Ph ase
Re gu la tion is ON
REG U LA T IO N w /o LRC P ha se
(High P hase1 ap pear s) or
R EG U LA TIO N
(10 0% DC d uring 8 cycles =>
Pha se Regulation set OFF)

Figure 10. Self-start State Machine

This state machine runs only if self-start option has been The device needs a small amount of quiescent current to
programmed. feed some functions such as oscillator.
LIN timeout means:
STANDBY: • No activity on the LIN bus during a specified time
The 80310 is in Standby mode if there is a LIN timeout, • or on a LIN watchdog timeout during a specified time
and in absence of alternator rotation (no phase), if power and
reset (POR), or with a LIN MID3C command, if WAKE-UP:
nvm_lin_special is set.
This state is reached when an edge is detected on the
• There is no excitation phase (Phase voltage > Phase sensitivity)
• The duty cycle (DC) is equal to zero
• The logic is out of reset

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FUNCTIONAL DEVICE OPERATION
STATE MACHINE

• All the blocks are on RE-REGULATION:

• There is no regulation. DC=0% The excitation is forced to 100%. This mode is active if
After a 100 ms timeout, if the speed has not reached there is no high phase on non active phase (PHx < VPH) in
fSTART, then the device goes back to Standby mode. the previous cycle, until the high phase comes back. At the
end of the 8th cycle, if there is still no high phase, the
EXCITATION 100% DC: regulation mode is set to off and the device goes back to the
When the speed has reached Start_aa, then the device regulation mode, with or without LRC.
goes into this state until the high phase appears, or during a
100 ms maximum. LIN BUS INFORMATION:
• The logic is out of reset. The operational control and programming, required in the
• All the blocks are on. end application, is carried out through the LIN interface. Refer
• There is no regulation. DC = 100% to Tables 7 to 15.
The regulator shall only give pre-excitation when it
Start_aa (see Table 1): is a special threshold for the self-
receives a LIN command targeted for it, the shutdown
start when it is in Wake-up mode, before going in EXC 100%
command is the code that would otherwise set 10.6 V
DC, waiting for high phase. Once high phase appeared the
(“000000”).
state machine is exactly the same as with LIN wake-up
LIN addresses are listed in MID format, Table 8, while the
Start_aa can be programmed at 3000 rpm or 4000 rpm.
data fields are listed in [MSB:LSB] format
REGULATION WITH LRC: Table 10 lists the values for the Target/Programmed
Regulated voltage contained in the Alternator A/B write data
In this mode, the 80310 regulates the alternator output to
field (ID=29, 2A), byte 1.
the set reference level. The excitation is controlled by LRC, if
B+A is lower than VREG. DC can not be lower than DCMIN. Table 11 lists the values for the LRC Ramp Time and
Ramp Cut-off contained in the Alternator A/B write data field
This LRC mode is active until the detection of phase stop
(ID=29,2A), byte 2.
regulating RPM (fSTOP). In this case, the device goes back to
the Pre-excitation mode. If the phase frequency reaches the Table 12 lists the values for the die Temperature
LRC disable RPM default (fLRC), the device goes into contained in the Alternator A/B read data field (ID=11, 13),
regulation without LRC. byte 2.
Table 13 lists the values for the alternator Excitation
REGULATION WITHOUT LRC: Current contained in the Alternator A/B read data field(ID=11,
13), byte 2, as well as the Excitation duty cycle contained in
This mode is active when the phase frequency is above
the Alternator A/B read data field (ID=11, 13), byte1.
the LRC disable RPM default (fLRC), the first VREG was
reached with LRC. Table 14 lists values for the excitation Current Limit
contained in the Alternator A/B write data field (ID=29, 2A),
The excitation is controlled only by the internal comparator
byte 3.
of B+A and VREG. The DC can not be lower than DCMIN.
Table 15 lists the values for the alternator Manufacturer
If the phase frequency goes below the LRC disable RPM
and Class code contained in the Alternator A/Bread data field
default (fLRC), then the 80310 comes back to the regulation
(ID=12, 14), byte 1.
with LRC mode. If the phase frequency goes below the phase
stop regulating RPM, the device goes to Pre-excitation mode.

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16 Freescale Semiconductor
 FUNCTIONAL DEVICE OPERATION
COMMAND TABLES

COMMAND TABLES

Table 7. LIN Command Information

Function LIN Active Bits

VREG Digital W 6

LRC Rate W 4

LRC Disable Frequency W 4

Excitation Current Limitation (0 A to 7.75 A) W 5

Status & Diagnostic R 5

EXC Duty-Cycle R 5

Excitation Current (17)

R 6

Die Temperature R 6(18)

Manufacturing Information R 8

Notes
17. This information is given as 6 bits and is only accurate:
a) from 0 °C to 25 °C:
- from 0 A to 3.875 A: +/- 375 mA
- from 3.875 A to 7.75 A:+/- 10%
b) outside the previous temperature range:
- from 0 to 3.875 A: +/-625 mA
- from 3.875 A to 7.75 A: +/-15%
Currents higher than 7.75 A, which may be possible at low temperature, are reported as 7.75 A. Excitation Current and Die Temperature
functions are exclusive.
18. This gives a resolution of 3.5 degrees and the accuracy is +/-10 degrees. Excitation Current and Die Temperature functions are
exclusive.

Table 8. LIN Byte/Direction Data Format

The MID 0x27 is reserved. Therefore, especially if other nodes than the 80310 are placed on the LIN bus, the MID 0x27 is forbidden.

MID (hex) ID [5:1] Bytes Direction(19) Message Name

ALTERNATOR A

29 4 M to S Write Regulator Control Data to Alt. A

11 2 S to M Read Regulator Status 2 Bytes from Alt. A

12 2 S to M Read Regulator Identifier 2 Bytes from Alt. A

ALTERNATOR B

2A 4 M to S Write Regulator Control Data to Alt. B

13 2 S to M Read Regulator Status 2 Bytes from Alt. B

14 2 S to M Read Regulator Identifier 2 Bytes from Alt. B

GLOBAL

2B 4 M to S Write Regulator Control Data to Alt. A and Alt. B

3C 4 M to S Global Sleep Command (first byte 0x00)

Notes
19. M to S = Master to Slave; S to M = Slave to Master

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Freescale Semiconductor 17
FUNCTIONAL DEVICE OPERATION
COMMAND TABLES

Table 9. LIN Read/Write Data Format

ALTERNATOR A
DATA FIELD DESCRIPTION FOR ALTERNATOR A WRITE COMMAND: ID = 29

7 6 5 4 3 2 1 0

BYTE 1

x x Target Voltage [5:0]

BYTE 2

Ramp Cutoff [3:0] Ramp Rate [3:0]

BYTE 3

x x x Current LImit [4:0]

BYTE 4

x x x x x x x x

ALTERNATOR A
DATA FIELD DESCRIPTION FOR ALTERNATOR A READ COMMAND: ID = 11

7 6 5 4 3 2 1 0

BYTE 1

EXC Duty Cycle [4:0] F_EL F_MEC F_HT

BYTE 2

LIN Bus Timeout Com error Measured Current or Temperature [5:0]

ALTERNATOR A
DATA FIELD DESCRIPTION FOR ALTERNATOR A READ COMMAND: ID = 12

7 6 5 4 3 2 1 0

BYTE 1

Class[4:0] Manufacturer [2:0]

BYTE 2

0 0 0 0 Slave Not Checksum ID Parity Fault Sync Break

Responding Fault

ALTERNATOR B
DATA FIELD DESCRIPTION FOR ALTERNATOR B WRITE COMMAND: ID = 2A

7 6 5 4 3 2 1 0

BYTE 1

x x Target Voltage [5:0]

BYTE 2

Ramp Cutoff [3:0] Ramp Rate [3:0]

BYTE 3

x x x Current LImit [4:0]

BYTE 4

x x x x x x x x

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18 Freescale Semiconductor
 FUNCTIONAL DEVICE OPERATION
COMMAND TABLES

Table 9. LIN Read/Write Data Format

ALTERNATOR B
DATA FIELD DESCRIPTION FOR ALTERNATOR B READ COMMAND: ID = 13

7 6 5 4 3 2 1 0

BYTE 1

EXC Duty Cycle [4:0] F_EL F_MEC F_HT

BYTE 2

LIN Bus Timeout Com error Measured Current or Temperature [5:0]

ALTERNATOR B
DATA FIELD DESCRIPTION FOR ALTERNATOR B READ COMMAND: ID = 14

7 6 5 4 3 2 1 0

BYTE 1

Class[4:0] Manufacturer [2:0]

BYTE 2

0 0 0 0 Slave Not Checksum ID Parity Fault Sync Break

Responding Fault

GLOBAL
DATA FIELD DESCRIPTION FOR ALTERNATOR A+B WRITE COMMAND: ID = 2B(20)

7 6 5 4 3 2 1 0

BYTE 1

x x Target Voltage [5:0]

BYTE 2

Ramp Cutoff [3:0] Ramp Rate [3:0]

BYTE 3

x x x Current LImit [4:0]

BYTE 4

x x x x x x x x

GLOBAL
DATA FIELD DESCRIPTION FOR ALTERNATOR A+B SLEEP COMMAND: ID = 3C(20)

7 6 5 4 3 2 1 0

BYTE 1

0 0 0 0 0 0 0 0

BYTE 2

x x x x x x x x

BYTE 3

x x x x x x x x

BYTE 4

x x x x x x x x

Notes
20. To access this command, NVM bit “Special LIN Features” must have been programmed

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Freescale Semiconductor 19
FUNCTIONAL DEVICE OPERATION
COMMAND TABLES

Table 10. Target/Programmed Voltage

Code V Code V

000000 10.6/OFF(21) 100000 13.8(22)

000001 10.7 100001 13.9

000010 10.8 100010 14.0

000011 10.9 100011 14.1

000100 11.0 100100 14.2

000101 11.1 100101 14.3

000110 11.2 100110 14.4

000111 11.3 100111 14.5

001000 11.4 101000 14.6

001001 11.5 101001 14.7

001010 11.6 101010 14.8

001011 11.7 101011 14.9

001100 11.8 101100 15.0

001101 11.9 101101 15.1

001110 12.0 101110 15.2

001111 12.1 101111 15.3

010000 12.2 110000 15.4

010001 12.3 110001 15.5

010010 12.4 110010 15.6

010011 12.5 110011 15.7

010100 12.6 110100 15.8

010101 12.7 110101 15.9

010110 12.8 110110 16.0

010111 12.9 110111 16.0

011000 13.0 111000 16.0

011001 13.1 111001 16.0

011010 13.2 111010 16.0

011011 13.3 111011 16.0

011100 13.4 111100 16.0

011101 13.5 111101 16.0

011110 13.6 111110 16.0

011111 13.7 111111 16.0

Notes
21. If 000000 is sent the regulator will set 10.60 V or shutdown if no LIN command with a voltage setting
higher than 10.6 V was sent beforehand.
22. Default for self-start, adjustable in OTP between 13.5 V and 15.0 V.

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20 Freescale Semiconductor
 FUNCTIONAL DEVICE OPERATION
COMMAND TABLES

Table 11. LRC Programming Information

Ramp Time Seconds Ramp Cut-off RPM

0000 0 0000 2400

0001 1.3 0001 2530

0010 2.1 0010 2670

0011 3.0(23) 0011 2830

0100 3.8 0100 3000(23)

0101 4.7 0101 3200

0110 5.5 0110 3430

0111 6.4 0111 3690

1000 7.2 1000 4000

1001 8.1 1001 4360

1010 8.9 1010 4790

1011 9.8 1011 5320

1100 10.6 1100 5990

1101 11.5 1101 6860

1110 12.3 1110 8010

1111 13.2 1111 Always Active

Notes
23. Default, adjustable by OTP.

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FUNCTIONAL DEVICE OPERATION
COMMAND TABLES

Table 12. Temperature Information, Sent Back to the Master

Temperature oC Temperature oC

000000 -40 100000 72

000001 -36.5 100001 75.5

000010 -33 100010 79

000011 -29.5 100011 82.5

000100 -26 100100 86

000101 -22.5 100101 89.5

000110 -19 100110 93

000111 -15.5 100111 96.5

001000 -12 101000 100

001001 -8.5 101001 103.5

001010 -5 101010 107

001011 -1.5 101011 110.5

001100 2 101100 114

001101 5.5 101101 117.5

001110 9 101110 121

001111 12.5 101111 124.5

010000 16 110000 128

010001 19.5 110001 131.5

010010 23 110010 135

010011 26.5 110011 138.5

010100 30 110100 142

010101 33.5 110101 145.5

010110 37 110110 149

010111 40.5 110111 152.5

011000 44 111000 156

011001 47.5 111001 159.5

011010 51 111010 163

011011 54.5 111011 166.5

011100 58 111100 170

011101 61.5 111101 173.5

011110 65 111110 177

011111 68.5 111111 180.5

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22 Freescale Semiconductor
 FUNCTIONAL DEVICE OPERATION
COMMAND TABLES

Table 13. Excitation Information sent back to the Master

DF Code
EXC Code EXC Current (A)(24) DF (%)(25)
(EXC duty cycle)

000000 0 00000 0

000010 0.25 00001 3.

000100 0.5 00010 6.5

000110 0.75 00011 9.5

001000 1 00100 13

001010 1.25 00101 16

001100 1.5 00110 19.5

001110 1.75 00111 22.5

010000 2 01000 26

010010 2.25 01001 29

010100 2.5 01010 32.5

010110 2.75 01011 35.5

011000 3 01100 38.5

011010 3.25 01101 42

011100 3.5 01110 45

011110 3.75 01111 48.5

100000 4 10000 51.5

100010 4.25 10001 55

100100 4.5 10010 58

100110 4.75 10011 61.5

101000 5 10100 64.5

101010 5.25 10101 67.5

101100 5.5 10110 71

101110 5.75 10111 74

110000 6 11000 77.5

110010 6.25 11001 80.5

110100 6.5 11010 84

110110 6.75 11011 87

111000 7 11100 90.5

111010 7.25 11101 93.5

111100 7.5 11110 97

111110 7.75 11111 100

Notes
24. 6 bits of data will be available, but only 5 bits are tabulated.
25. Rounded to nearest half percent.

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FUNCTIONAL DEVICE OPERATION
COMMAND TABLES

Table 14. More Excitation Information, Received from the Master

Current Limitation(26) A

00000 No Limit
00001 2.0

00010 2.0

00011 2.0

00100 2.0

00101 2.0

00110 2.0

00111 2.0

01000 2.0

01001 2.25

01010 2.5

01011 2.75

01100 3.0

01101 3.25

01110 3.5

01111 3.75

10000 4.0

10001 4.25

10010 4.5

10011 4.75

10100 5.0

10101 5.25

10110 5.5

10111 5.75

11000 6.0

11001 6.25

11010 6.5

11011 6.75

11100 7.0

11101 7.25

11110 7.5

11111 7.75

Notes
26. Default is “00000”, no limitation.

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24 Freescale Semiconductor
 FUNCTIONAL DEVICE OPERATION
THERMAL COMPENSATION

THERMAL COMPENSATION

This function is activated when internal temperature is compensated to reduce internal temperature. The de-rating
above thermal threshold (135,145,150, or 160 degrees). In is calculated depending on the 4 categories of V setting.
this case, the V setting fixed by the LIN or by default is

Figure 11. Thermal Compensation

Table 15. Thermal Compensation
Ptc (mV/degree) Thermal Threshold (degrees)

Vset[5:4] Vset (V) 135 145 150 160

00 10.6-12.1 V 50 50 50 100

01 12.2-13.7 V 100 100 100 200

10 13.8-15.3 V 100 200 200 400

11 15.4-16 V 200 200 200 400

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FUNCTIONAL DEVICE OPERATION
PROTECTION AND DIAGNOSIS FEATURES

PROTECTION AND DIAGNOSIS FEATURES

FAULT DETECTION The programmed threshold in hexadecimal corresponds

to the following temperature in degrees:
General Notes • 6'b110010;//135degres
All fault reporting passes through a 400 ms digital filter to • 6'b110100;//145degres
avoid false indication problems, and transition from one fault • 6'b110110;//150degres
type to another should be “clean”. • 6'b111001;//160degres
ADDITIONAL ERRORS
MECHANICAL FAULT (F_MEC)
LIN Bus Timeout
The Phase is off (Low Phase RPM below stop_regulation
threshold). Reported in Alternator A/B read data field (ID=11, Check two timeouts:
13), byte 1. • Activity on RXD is below 3 or 8 seconds (depending on
the OTP bit)
ELECTRICAL FAULT (F_EL) • Time between two consecutive valid messages is below
If one of these faults appear: 3 or 8 seconds (depending on the OTP bit)
• The number of “1”s in all the OTP bits, NVM[80:1] is not This flag is reset once the microcontroller sends MID 11 for
ODD. The parity bit is included in the calculation ALTA, or MID 13 for Alt B. Reported in Alternator A/B read
• The Phase is on (Low Phase RPM above data field (ID=11, 13), byte 2.
stop_regulation threshold) but High Phase 1 is not
detected Comm Error
• B+A reaches 16.5 V with EXC at 100% DC Checks the ID parity bits + Checksum byte + (TXD = RXD
• Short circuit excitation load when responding) + LIN Physical layout not in over-current
• B+A stays at 75% of the target voltage when LRC is off limitation. Reported in Alternator A/B read data field (ID=11,
13), byte 2.
Note: This 5th additional condition is enabled only when
the NVM bit “Low Voltage Threshold” is enabled. Reported in
LIN protocol errors:
Alternator A/B read data field (ID=11, 13), byte 1.
• Sync Break Error: This flag is up when Synchro break
ELECTRICAL FAULT (HP MASK) Field duration is lower than 10Tbits.
• Identifier parity Error: Comm error flag also reported in
A fault detection when High phase signal is cut is reported
MID11
on the electrical fault.
• Checksum Error: Comm error flag also reported in
Option (OTP) available to remove this fault detection.
MID11
• Slave not responding Error: Tframe Max exceeded (LIN
THERMAL FAULT (F_HT) Specification revision 1.3).
A thermal fault is reported when the die temperature These flags are reset once the microcontroller sends MID
exceeds the programmed threshold. Reported in Alternator 12 for ALTA, or MID 14 for Alt B. Reported in Alternator A/B
A/B read data field (ID=11, 13), byte 1. read data field (ID=12, 14), byte 2.

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26 Freescale Semiconductor
 PACKAGING
DIE DIMENSIONS

PACKAGING

DIE DIMENSIONS

5050μm

PH2
1

PH1
2
BUS
3
ORIGIN (0,0)
SGND
6080 μm 4 Y Axis
B+A
5

EXC
6

PGND
7

SCALE = Approximately 20:1

X Axis

Die Coordinates
(Origin at Center of Die)
Pad Function
X /μm Y /μm

1 PH2 2166 2158

2 PH1 2098 1217

3 BUS -1989 834

4 SIGNAL GROUND(27) -1989 0

5 B+A 1179 -840

6 EXC 1179 -1987

7 POWER GROUND(27) - 367 -2631

Notes
27. Both Signal and Power Grounds must be connected for correct operation.

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PACKAGING
DIE CHARACTERISTICS

DIE CHARACTERISTICS

The die is designed to be fitted into a customer designed package, however as so many wiring configurations exist not all
may be possible from the same die design. Due to thermal considerations, soldering is the preferred die attach method, but under
some circumstances, conductive epoxy may be acceptable.

Table 16. Physical Die Characteristics.

Mechanical data Length Width Units

Main Bonding Pad Size (200 μm wire) 0.66 0.5 mm

Die Size (Length x Width) 6.08 5.05 mm

Die Thickness 0.36 N/A mm

Die Back Metal Composition Ti/Ni/V/Ag N/A N/A

Die Back Metal Thickness, Typical 1.45 N/A μm

Die Top Metal Thickness, Typical 2.0 N/A μm

Die Top Metal Composition 99.5 Al 0.5 Cu %

OTP DEFAULT CONFIGURATION (WITHOUT ANY PROGRAMMING)

Default Regulation Voltage: 13.5 V

Phase Start Regulation: 800 RPM
Phase Stop Regulation: 500 RPM
LRC disable: 2400 RPM
LRC Rate: No LRC
Alternator Pole-pairs: 6
Slave Address: MID 29/11/12
Self start: ON
Self start threshold: 3000 RPM
BUS Time-out: 3 s
LIN Readout: Current
Thermal Compensation Threshold: 160 °C
10.6 V Reg: OFF.
The 10.6 V command is a real 10.6 V regulation when phase is ON (if Programmed, this command becomes a
regulation OFF command; lower regulation command is 10.7 V)
EL Fault HP mask: ON
The fault detection when the high phase signal is cut, is reported on the electrical fault (if programmed, this part of the
electrical fault is masked)
Low voltage threshold: none
One pole Filter: No, default is 2 pole filter
Crest regulation: OFF
LIN Com with Global ID (MID 2B + 3C): OFF

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28 Freescale Semiconductor
 PACKAGING
OTP DEFAULT CONFIGURATION (WITHOUT ANY PROGRAMMING)

CREST REGULATION
Crest regulation bit OFF: The product is in load dump mode. EXC is stopped when the internal filter reaches Load dump
detection threshold (21 V typ.). The delay is given by the internal filter (~1.0 ms).
Crest regulation bit is ON: The product is in crest regulation mode. EXC is stopped immediately when internal ADC reaches
21 V. The delay is given by the ADC (~16 µs).
For these two modes, Load Dump or Crest regulation, EXC is always OFF if the condition on B+A is present.

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Freescale Semiconductor 29
REVISION HISTORY

REVISION HISTORY

REVISION DATE DESCRIPTION OF CHANGES

1.0 12/2008 • Initial Release

2.0 5/2011 • Add ESD values and electrical characteristics

• Add limits max/min in electrical characteristics table + graphs
• Remove backmetal option
• Add Table1 Page 2. Version-determined Electrical parameters
• Change Thermal Shutdown value, Modification in the LIN fault detection paragraph.
• Change wording in LIN Fault detection paragraph
• Add machine Model in electrical ratings table
• Change LIN timeout value (1.3s instead of 8s) + slight changes in diagrams
• Wording change
• Change in table 1 page 3 on BUS inactivity column from 3/8 to 1.31/3
• Change in figure 1 and 2 + device table
• Added TC80310AWS to the ordering information
3.0 8/2012 • Replaced TC80310xWS by TC80310xHWS in Table 1, Version Determined Electrical Parameters
• Replaced Die Back Metal Composition "Cr/CrAg/Ag" by "Ti/Ni/V/Ag" in Table 16, Physical Die
Characteristics.
• Updated BYTE 3 in Data field description for alternator A Write Command: ID = 29 on page 18
• Updated BYTE 3 in Data field description for alternator B Write Command: ID = 2A on page 18
• Updated BYTE 3 in Data field description for alternator A+B Write Command: ID = 2B(20) on page
19
• Updated BYTE 1 in Data field description for alternator B Read Command: ID = 14 on page 19
• Updated Freescale form and style
4.0 12/2013 • Added the description “The MID 0x27 is reserved. Therefore, especially if other nodes than the
80310 are placed on the LIN bus, the MID 0x27 is forbidden” under Table 8, LIN Byte/Direction Data
Format on page 17.

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30 Freescale Semiconductor
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Document Number: TC80310

Rev 4.0
12/2013
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