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SSC338D/SSC338Q

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High-Integrated IP Camera SoC
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Preliminary Product Brief Version 0.8

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© 2021 SigmaStar Technology. All rights reserved.

SigmaStar Technology makes no representations or warranties including, for example but not limited to,
warranties of merchantability, fitness for a particular purpose, non-infringement of any intellectual property
right or the accuracy or completeness of this document, and reserves the right to make changes without further
notice to any products herein to improve reliability, function or design. No responsibility is assumed by
SigmaStar Technology arising out of the application or use of any product or circuit described herein; neither
does it convey any license under its patent rights, nor the rights of others.

SigmaStar is a trademark of SigmaStar Technology. Other trademarks or names herein are only for
identification purposes only and owned by their respective owners.
 SSC338D/SSC338Q
High-Integrated IP Camera SoC Processor
Preliminary Product Brief Version 0.8

REVISION HISTORY
Revision No. Description Date
0.1  Initial release 01/17/2020
0.2  Added DLA function 03/02/2020
0.3  Updated Features 05/11/2020
 Updated Mechanical Dimensions
0.4  Updated CA7 Spec. 05/29/2020
0.5  Updated Features 09/28/2020
 Added Interface Characteristics and Thermal Resistance Data

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0.6  Added Minimum Order Quantity and Moisture Sensitivity Level 01/21/2021

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0.7  Updated audio spec. and I2C SDA Hold Time min. value 04/26/2021
 Added Ambient Temperature during OTP programming

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0.8  Updated Recommended Operating Conditions 06/30/2021

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Security Level: Confidential B -i- 6/30/2021

Copyright © 2021 SigmaStar Technology. All rights reserved.
 SSC338D/SSC338Q
High-Integrated IP Camera SoC Processor
Preliminary Product Brief Version 0.8

TABLE OF CONTENTS

REVISION HISTORY ............................................................................................................................ i

TABLE OF CONTENTS .......................................................................................................................... ii
1. CHIP OVERVIEW .......................................................................................................................... 1
2. BLOCK DIAGRAM ......................................................................................................................... 2
3. FEATURES .................................................................................................................................... 3
4. PACKAGE DESCRIPTION .............................................................................................................. 5
4.1. Pin Diagram .............................................................................................................................. 5
4.2. Signal Description ...................................................................................................................... 6
4.3. Mechanical Dimensions............................................................................................................. 11

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5. ELECTRICAL CHARACTERISTIC ................................................................................................. 12
5.1. Interface Characteristics ........................................................................................................... 12
5.2. Absolute Maximum Ratings ....................................................................................................... 13

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5.3. Recommended Operating Conditions ......................................................................................... 13
6. Thermal Resistance ................................................................................................................... 15
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6.1. Thermal simulation mode ......................................................................................................... 15
7. ORDERING GUIDE ..................................................................................................................... 16
7.1. Marking Information ................................................................................................................ 16
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Security Level: Confidential B - ii - 6/30/2021

Copyright © 2021 SigmaStar Technology. All rights reserved.
 SSC338D/SSC338Q
High-Integrated IP Camera SoC Processor
Preliminary Product Brief Version 0.8

1. CHIP OVERVIEW

The SSC338D/SSC338Q series products are highly integrated multimedia System-on-Chip (SoC) products for
high-resolution intelligent video recording applications like IP camera, CAR camera, and USB camera.

The chip includes a 32-bit dual-core RISC processor, advanced Image Signal Processor (ISP), high performance

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MJPEG/H.264/H.265 video encoder, Deep Learning Accelerator (DLA), Intelligent Video Engine (IVE), as well as

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high speed I/O interfaces like MIPI, and Ethernet.

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Advanced low-power, low-voltage architecture and optimized design flow are implemented to fulfill long time
usage applications. Hardwired AES/DES/3DES cipher engines are integrated to support secure boot,
authentication, and video/audio stream encryption in security system.
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The SSC338D/SSC338Q, powered by SigmaStar Technology, comes with a complete hardware platform and
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software SDK, allowing customers to speed up "Time-to-Market."
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Security Level: Confidential B -1- 6/30/2021

Copyright © 2021 SigmaStar Technology. All rights reserved.
 SSC338D/SSC338Q
High-Integrated IP Camera SoC Processor
Preliminary Product Brief Version 0.8

2. BLOCK DIAGRAM

Figure 2-1 shows the major functional blocks of SSC338D/SSC338Q series chip.

Camera Module

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MIPI/
I2C
DVP

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Video Interface

ISP
GOP
Scalar
fid
MJPEG
Encoder

IVE
UART
on
DMA
Pan/Tilt Motors
LDC
PWMs/GPIOs
rC

H.264/265 Security
DLA
Encoder
OTP

SPI
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PLL

Dual CA7 up to 1.2 GHz

Neon + FPU
32768Hz
L1:32KB+32KB
aS
RTC

L2: 256KB
EJTAG

Microphone
m

Audio
Memory Controller

MCP
ADC/
DRAM
Driver

USB2.0
Audio

DAC
g

Speaker Host/Device USB Wi-Fi

Module
Si

Ethernet SD/SDIO
Flash SDIO slave
eMAC Controller
Controller
Ethernet ePHY

Serial Serial
eMMC
NOR NAND

Figure 2-1: SSC338D/SSC338Q Block Diagram

Security Level: Confidential B -2- 6/30/2021

Copyright © 2021 SigmaStar Technology. All rights reserved.
 SSC338D/SSC338Q
High-Integrated IP Camera SoC Processor
Preliminary Product Brief Version 0.8

3. FEATURES

 High Performance Processor Core  Flip, Mirror, and Rotation with 90 or 270
 ARM Cortex-A7 Dual Core degree
 Clock rate up to 1.2GHz  Lens distortion correction (LDC/FishEye)
 Neon and FPU  Rolling shutter compensation

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 Memory Management Unit for Linux support  Fully programmable multi-function scaling

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 DMA Engine engines
 Image/Video Processor  Advanced Color Engine

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 Supports 8/10/12-bit parallel interface for  Luma gain/offset adjustment
raw data input  Supports 2D peaking with user definition
 Supports MIPI interface with 2/4 data lanes filter
and 1 clock lane
 Supports one MIPI interface
fid  Horizontal noise masking
 Direct Luma Correction (DLC)
on
 Supports sensor interface with both parallel  Black/White Level Extension (BLE/WLE)
and MIPI  IHC/ICC/IBC for chroma adjustment
 Supports 8/10-bit CCIR656 interface  Histogram statistics
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 Supports max. 4K (3840x2160) pixels video  Spatial domain IIR filter to reduce noise
recording and image snapshot  H.265/HEVC
 Bad pixel compensation  Supports H.265/HEVC main profile
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 Temporal-domain Noise Reduction (3DNR)  Supported Prediction Unit (PU) size: 32x32,
 Bayer domain Spatial-domain Noise 16x16, 8x8
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Reduction (2DNR)  Supported Transform Unit (TU) size: 32x32

 Bayer domain filter to remove purple false to 4x4
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color in highlight regions  Search range [H: +/-128, V: +/-64]

 Optical black correction  Supports up to quarter-pixel
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 Lens shading compensation  Supports frame level and MB level rate

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 Auto White Balance (AWB) / Auto Exposure control

(AE) / Auto Focus (AF)  Supports ROI encoding with custom QP map
 CFA color interpolation  Supports max. 4K with 20 fps encoding
 Color correction  H.264 Encoder
 Gamma correction  Supports H.264 baseline, constrained
 Video stabilization baseline, main, and high profile
 High Dynamic Range (HDR) with two  Supports 16x16, 8x8 and 4x4 block sizes
exposure frames and de-ghost function  Search range [H: +/-64, V: +/-32]
 Frame buffer data compression and de-  Supports up to quarter-pixel
compression to save memory bandwidth  Supports frame level and MB level rate
 Wide Dynamic Range (WDR) with local tone control
mapping  Supports ROI encoding with custom QP map
 Supports max. 4K with 20 fps encoding

Security Level: Confidential B -3- 6/30/2021

Copyright © 2021 SigmaStar Technology. All rights reserved.
 SSC338D/SSC338Q
High-Integrated IP Camera SoC Processor
Preliminary Product Brief Version 0.8

 JPEG Encoder  DRAM Memory

 Supports JPEG baseline encoding  Embedded 1Gb or 2Gb 16-bit DDR3 memory
 Supports YUV422 or YUV420 formats with max. 2133Mbps
 Supports max. 4K with 20 fps encoding  Connectivity
 Supports real-time mode and frame encode  Built-in 10/100M Ethernet MAC and Ethernet
mode PHY
 Video Encoding Performance  USB 2.0 Host Controller could be used for
 Supports 4K + HD + D1 20fps H.265/HEVC USB Wi-Fi Dongle or Module
encoding  One SDIO 2.0 Host Controller could be used
 Supports 4K + HD + D1 20fps H.264 for SDIO Wi-Fi module
encoding  Supports Wake-on-LAN (WOL)

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 Supports MJPEG up to 4K 20 fps encoding  Supports BT.656 8-bit output with max.

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 Deep Learning Accelerator 75MHz clock rate (single clock edge)
 Pure hardwired accelerator  Supports BT.656 YUV422 format and

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 Supports various video analysis functions like progressive mode
FD/FR, human detection, MD/OD, object  Security Engines
tracking, etc.  Supports AES/DES/3DES/RSA/SHA-I/SHA-256
 Audio Processor
 One stereo ADC for microphone input
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
 Supports secure booting
Real Time Clock (RTC)
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 2-pin DMIC input  Built-in RTC working with 32.768 KHz crystal
 One mono DAC for lineout  Alarm interrupt for wakeup
 Supports 8K/16K/32KHz/48KHz sampling rate  Tick time interrupt (millisecond)
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audio recording  Built-in regulator

 Digital and analog gain adjustment  Supports low leakage RTC-mode for long
 I2S digital audio input and output with TDM battery application
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up to 8-ch input and 2-ch output  Peripherals

 NOR/NAND Flash Interface  Dedicated GPIOs for system control
aS

 Compliant with standard, dual and quad SPI  Supports max. 11 PWM outputs
Flash memory components  Three generic UARTs and one fast UART with
m

 High speed clock/data rate up to 108MHz flow control

 SD Card/eMMC Interface  Three generic timers and one watchdog timer
g

 Compatible with SD spec. 2.0, data bus 1/4  Two SPI masters
bit mode  Four I2C Masters
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 Supports eMMC 4.3 interface  Built-in SAR ADC with 4-channel analog
 SDIO 2.0 Interface inputs for different kinds of applications
 Compatible with SDIO spec. 2.0, data bus  Supports internal temperature sensor
1/4 bit mode  Operating Voltage Range
 Compatible with SD spec. 2.0, data bus 1/4  Core: Typ. 0.9V
bit mode  I/O: 1.8/3.3V
 USB Interface  DRAM: 1.5V (DDR3) or 1.35V (DDR3L)
 One USB 2.0 configurable host or device  Power Consumption: TBD
− Host mode supports EHCI specification  Package
− Device mode supports up to 8 endpoints  QFN with 128 pins, 12.3mm x 12.3mm
 Supports suspend/hibernation/wake-up  Moisture Sensitivity Level: 3
power saving mode

Security Level: Confidential B -4- 6/30/2021

Copyright © 2021 SigmaStar Technology. All rights reserved.
 SSC338D/SSC338Q
High-Integrated IP Camera SoC Processor
Preliminary Product Brief Version 0.8

4. PACKAGE DESCRIPTION

4.1. Pin Diagram

SE_XTAL_OUT

AVDD_XTAL
XTAL_OUT

SR0_IO19
SR0_IO18
SR0_IO17
SR0_IO16
SR0_IO14

SR0_IO10
SR0_IO09
SR0_IO08
SR0_IO07
SR0_IO06
SR0_IO05
SR0_IO04
SR0_IO03
SR0_IO02
SR0_IO01
SR0_IO11

SR0_IO00
VDDP_2A
XTAL_IN
VDDP_0
GPIO15
GPIO14
GPIO13
GPIO12
SPI_CZ

GPIO9
GPIO8
VDD

VDD

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128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
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SPI_CK 1 96 VDD
SPI_DI 2 95 GPIO1
Pin 1

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SPI_DO 3 94 GPIO0
SPI_WPZ 4 93 FUART_RTS
SPI_HLD 5 92 FUART_CTS
SD0_GPIO0 6 91 FUART_TX
SD0_CDZ
SD0_D1
SD0_D0
7
8
9
fid 90
89
88
FUART_RX
VDDP_1
VDD
on
SD0_CLK 10 87 VDD
XXXXX
XXXXXXXX
SSC338D/SSC338Q

SD0_CMD 11 86 XTAL_OUT_32K
SD0_D3 12 85 XTAL_IN_32K
SD0_D2 13 84 AVDD_RTC
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I2S0_MCLK 14 83 RESET
I2S0_BCK 15 82 NC_0
I2S0_WCK 16 81 NC_1
I2S0_DI 17 80 NC_2
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I2S0_DO 18 79 NC_4
I2C0_SCL 19 78 NC_5
I2C0_SDA 20 77 SAR_GPIO3
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ETH_LED0 21 76 SAR_GPIO2
ETH_LED1 22 75 SAR_GPIO1
VDD 23 74 SAR_GPIO0
AVDD_ETH 24 73 DVDD_NODIE
m

ETH_RN 25 72 AVDD_PM_SPI
ETH_RP 26 71 PM_SPI_HLD
g

ETH_TN 27 70 PM_SPI_WPZ
ETH_TP 28 69 PM_SPI_DO
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AVDD3P3_USB 29 68 PM_SPI_DI
USB2_DM 30 67 PM_SPI_CK
USB2_DP 31 66 PM_SPI_CZ
AVDD_AUD 32 65 AVDD_NODIE
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
PM_UART_TX
VDDIO_DATA

VDDIO_DATA
AVDD_PLL

VDDIO_MCLK
AUD_VAG

AUD_MICIN0
AUD_MICCM0
AUD_MICIN1
AUD_MICCM1
AUD_LINEOUT_L0

PM_UART_RX1
PM_UART_TX1

PM_GPIO0

PM_GPIO4
PM_GPIO5
PM_GPIO6
PM_GPIO7
PM_GPIO8
PM_GPIO1
PM_GPIO2
PM_GPIO3
AUD_VRM_ADC

VDD

VDD
DVDD_DDR
DVDD_DDR_RX

PM_UART_RX
AVDDIO_DRAM

AVDDIO_DRAM

PM_I2CM_SCL
PM_I2CM_SDA

Security Level: Confidential B -5- 6/30/2021

Copyright © 2021 SigmaStar Technology. All rights reserved.
 SSC338D/SSC338Q
High-Integrated IP Camera SoC Processor
Preliminary Product Brief Version 0.8

4.2. Signal Description

Signal Name Signal Function QFN128
Type Pin Location
System Reset Interface

RESET I System Reset 83

(Active High)
Debug UART Interface

PM_UART_RX I Debug UART Receive Data Input with Pull Up 50

Resistor /
Slave I2C Serial Clock

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PM_UART_TX O Debug UART Transmit Data Output with Pull 51
Up Resistor /
Slave I2C Serial Data

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PM_UART_RX1 I PM_UART1 Receive Data Input with Pull Up 52
Resistor in Power Manage group domain
PM_UART_TX1 O PM_UART1 Transmit Data Output with Pull Up 53

System Interface
fid
Resistor in Power Manage group domain
on
XTAL_IN I 24MHz Crystal Input 117

XTAL_OUT O 24MHz Crystal Output 118

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XTAL_IN_32K I 32.768KHz Crystal Input 85

XTAL_OUT_32K O 32.768KHz Crystal Output 86

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SE_XTAL_OUT O 24MHz Clock Output 119

8051 SPI Flash Interface

aS

PM_SPI_CZ O SPI Flash Chip Select 66

(Active Low)
m

PM_SPI_CK O SPI Flash Clock 67

g

PM_SPI_DI O SPI Flash Serial Data To Device (MOSI) 68

Si

PM_SPI_DO I SPI Flash Serial Data From Device (MISO) 69

PM_SPI_WPZ O SPI Flash Write Protect 70

PM_SPI_HLD O SPI Flash Hold 71

GPIO Interface

GPIO0 I/O General Purpose Input/Output 0 94

GPIO1 I/O General Purpose Input/Output 1 95
GPIO8 I/O General Purpose Input/Output 8 121

GPIO9 I/O General Purpose Input/Output 9 122

GPIO12 I/O General Purpose Input/Output 12 123

GPIO13 I/O General Purpose Input/Output 13 124

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Copyright © 2021 SigmaStar Technology. All rights reserved.
 SSC338D/SSC338Q
High-Integrated IP Camera SoC Processor
Preliminary Product Brief Version 0.8

Signal Name Signal Function QFN128

Type Pin Location
GPIO14 I/O General Purpose Input/Output 14 125
GPIO15 I/O General Purpose Input/Output 15 126

PM GPIO Interface

PM_GPIO0 I/O Power Manage Group General Purpose 56

Input/Output 0
PM_GPIO1 I/O Power Manage Group General Purpose 57
Input/Output 1
PM_GPIO2 I/O Power Manage Group General Purpose 58

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Input/Output 2
PM_GPIO3 I/O Power Manage Group General Purpose 59
Input/Output 3

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PM_GPIO4 I/O Power Manage Group General Purpose 60
Input/Output 4
PM_GPIO5 I/O Power Manage Group General Purpose 61

PM_GPIO6 I/O
Input/Output 5 fid
Power Manage Group General Purpose 62
on
Input/Output 6
PM_GPIO7 I/O Power Manage Group General Purpose 63
Input/Output 7
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PM_GPIO8 I/O Power Manage Group General Purpose 64

Input/Output 8
SAR ADC Interface
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SAR_GPIO0 I General Purpose Input/Output or 74

Muxed to SARADC Input Channel 0
aS

SAR_GPIO1 I General Purpose Input/Output or 75

Muxed to SARADC Input Channel 1
m

SAR_GPIO2 I General Purpose Input/Output or 76

Muxed to SARADC Input Channel 2
g

SAR_GPIO3 I General Purpose Input/Output or 77

Muxed to SARADC Input Channel 3
Si

CA7 SPI Flash Interface

SPI_CZ O Master SPI Chip Select 128

(Active Low)
SPI_CK O Master SPI Serial Clock 1

SPI_DI I/O Master SPI Serial Data To Device (MOSI) / 2

SDIO0 - 4x IO mode
SPI_DO I/O Master SPI Serial Data From Device (MISO) / 3
SDIO1 - 4x IO mode
SPI_WPZ I/O Master SPI Write Protect (Active Low) / 4
SDIO2 - 4x IO mode
SPI_HLD I/O Master SPI Hold input (Active Low) / 5
SDIO3 - 4x IO mode

Security Level: Confidential B -7- 6/30/2021

Copyright © 2021 SigmaStar Technology. All rights reserved.
 SSC338D/SSC338Q
High-Integrated IP Camera SoC Processor
Preliminary Product Brief Version 0.8

Signal Name Signal Function QFN128

Type Pin Location
I2S Interface

I2S0_MCLK O I2S Master Clock 14

I2S0_BCK O I2S Bit Clock 15

I2S0_WCK O I2S Word Clock 16

I2S0_DI I I2S Data Input 17

I2S0_DO O I2S Data Output 18

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Master I2C Interface

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I2C0_SCL O Non-PM Domain I2C 0 Master I2C Clock 19
I2C0_SDA I/O Non-PM Domain I2C 0 Master I2C Data 20

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PM_I2CM_SCL O PM Domain I2C Master I2C Clock 54

PM_I2CM_SDA

Fast UART Interface

I/O
fid
PM Domain I2C Master I2C Data 55
on
FUART_RX I Fast UART Receive Data Input 90

FUART_TX O Fast UART Transmit Data Output 91

rC

FUART_CTS I Fast UART Clear to Send 92

FUART_RTS O Fast UART Request to Send 93
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Image Sensor Interface

SR0_IO00 I/O Sensor General Purpose Input/Output 0 98

aS

SR0_IO01 I/O Sensor General Purpose Input/Output 1 99

SR0_IO02 I/O Sensor General Purpose Input/Output 2 100
m

SR0_IO03 I/O Sensor General Purpose Input/Output 3 101

g

SR0_IO04 I/O Sensor General Purpose Input/Output 4 102

Si

SR0_IO05 I/O Sensor General Purpose Input/Output 5 103

SR0_IO06 I/O Sensor General Purpose Input/Output 6 104

SR0_IO07 I/O Sensor General Purpose Input/Output 7 105
SR0_IO08 I/O Sensor General Purpose Input/Output 8 106

SR0_IO09 I/O Sensor General Purpose Input/Output 9 107

SR0_IO10 I/O Sensor General Purpose Input/Output 10 108

SR0_IO11 I/O Sensor General Purpose Input/Output 11 109

SR0_IO14 I/O Sensor General Purpose Input/Output 14 110

SR0_IO16 I/O Sensor General Purpose Input/Output 16 111

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Copyright © 2021 SigmaStar Technology. All rights reserved.
 SSC338D/SSC338Q
High-Integrated IP Camera SoC Processor
Preliminary Product Brief Version 0.8

Signal Name Signal Function QFN128

Type Pin Location
SR0_IO17 I/O Sensor General Purpose Input/Output 17 112
SR0_IO18 I/O Sensor General Purpose Input/Output 18 113

SR0_IO19 I/O Sensor General Purpose Input/Output 19 114

10/100M Ethernet Interface

ETH_RN I 10/100M Ethernet Differential Pair of Receiver 25

Signal Negative
ETH_RP I 10/100M Ethernet Differential Pair of Receiver 26

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Signal Positive

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ETH_TN O 10/100M Ethernet Differential Pair of 27
Transmitter Signal Negative
ETH_TP O 10/100M Ethernet Differential Pair of 28

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Transmitter Signal Positive
ETH_LED0 O 10/100M Ethernet LED0 Control 21

ETH_LED1 O
fid
Driven Active When Linked
10/100M Ethernet LED1 Control
Driven Active When Linked in 100 Base-TX and
22
on
Blinking When Transmitting or Receiving Data
SD 2.0 Card Interface
rC

SD0_CLK O SD 2.0 Clock 10

SD0_CMD O SD 2.0 Command 11

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SD0_D0 I/O SD 2.0 Data Bus 0 9

SD0_D1 I/O SD 2.0 Data Bus 1 8

aS

SD0_D2 I/O SD 2.0 Data Bus 2 13

SD0_D3 I/O SD 2.0 Data Bus 3 12

m

SD0_CDZ I Power Manage SD 2.0 Card Detect 7

g

SD0_GPIO0 I/O SD0 General Purpose Input/Output 0 6

Si

Audio Line Out Interface

AUD_LINEOUT_L0 O Audio Left Channel Line Output 39

AUD_VAG O Audio Reference Voltage from 1/2 AVDD_AUD 33
AUD_VRM_ADC I Audio Reference Voltage for ADC 34

Analog Microphone Interface

AUD_MICIN0 I Audio Left Channel Microphone Positive Input 35

AUD_MICCM0 I Audio Left Channel Microphone Negative Input 36
AUD_MICIN1 I Audio Right Channel Microphone Positive Input 37

AUD_MICCM1 I Audio Right Channel Microphone Negative 38

Input

Security Level: Confidential B -9- 6/30/2021

Copyright © 2021 SigmaStar Technology. All rights reserved.
 SSC338D/SSC338Q
High-Integrated IP Camera SoC Processor
Preliminary Product Brief Version 0.8

Signal Name Signal Function QFN128

Type Pin Location
USB 2.0 Interface

USB2_DM I/O USB 2.0 Differential Pair, Negative 30

USB2_DP I/O USB 2.0 Differential Pair, Positive 31

Test Interface

NC_0 I/O RTC Test Pin (NC) 82

NC_1 I/O RTC Test Pin (NC) 81

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NC_2 I/O RTC Test Pin (NC) 80

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NC_4 I/O RTC Test Pin (NC) 79
NC_5 I/O RTC Test Pin (NC) 78

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Power pins

VDD

VDDP_0
Core Power Digital Core Power

3.3V Power
fid
Digital Input/Output Power for Domain 0
23, 45, 47, 87, 88,
96, 115, 120
127
on
VDDP_1 1.8/3.3V Digital Input/Output Power for Domain 1 89
Power
rC

VDDP_2A 1.8/3.3V Digital Input/Output Power for Domain 2A 97

Power (Sensor IO Group 0 Power)
DVDD_DDR_RX Core Power Digital Power for DDR RX LDO (0.1uF CAP to 43
ta

GND)
DVDD_DDR Core Power Digital Power for DDR TX 44
aS

VDDIO_DATA DDR Power IO Power for DDR Data 41, 46

VDDIO_MCLK DDR Power IO Power for DDR Clock 48

m

AVDDIO_DRAM DDR Power IO Power for embedded DRAM 40, 49

g

AVDD_NODIE 3.3V Power Analog Power for PM Domain 65

Si

DVDD_NODIE Output PM Domain LDO Output (1uF Cap to GND) 73

AVDD_PM_SPI 3.3V Power Analog Power for PM SPI Domain 72
AVDD_PLL 3.3V Power Analog Power for PLL 42

AVDD_XTAL 3.3V Power Analog Power for XTAL 116

AVDD_RTC 3.3V Power Analog Power for RTC 84

AVDD3P3_USB 3.3V Power Analog Power for USB2.0 29
AVDD_ETH 3.3V Power Analog Power for Ethernet 24

AVDD_AUD 3.3V Power Analog Power for Audio 32

GND GND Ground ePad

Security Level: Confidential B - 10 - 6/30/2021

Copyright © 2021 SigmaStar Technology. All rights reserved.
 SSC338D/SSC338Q
High-Integrated IP Camera SoC Processor
Preliminary Product Brief Version 0.8

4.3. Mechanical Dimensions

Top View Side View

D A
128

Pin 1 corner

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E

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Bottom View
J
33 64
L Millimeter Inch
32 65
Symbol
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Min. Nom. Max. Min. Nom. Max.

A 0.80 0.85 0.90 0.031 0.033 0.035

e
aS

D 12.20 12.30 12.40 0.480 0.484 0.488

E 12.20 12.30 12.40 0.480 0.484 0.488

m

J 8.40 8.50 8.60 0.331 0.335 0.339

K K 8.40 8.50 8.60 0.331 0.335 0.339

c
g

b 0.10 0.15 0.20 0.004 0.006 0.008

Si

e -- 0.35 -- -- 0.014 --

L 0.30 0.40 0.50 0.012 0.016 0.020

Note: E-pad has to connect to system GND net.

1 96

128 97
b

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Copyright © 2021 SigmaStar Technology. All rights reserved.
 SSC338D/SSC338Q
High-Integrated IP Camera SoC Processor
Preliminary Product Brief Version 0.8

5. ELECTRICAL CHARACTERISTIC

5.1. Interface Characteristics

Parameter Symbol Min. Typ. Max. Unit
DIGITAL INPUTS
Input Voltage, High VIH VDDP*0.7Note V
Input Voltage, Low VIL VDDP*0.2 Note
V

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Input Current, High IIH -1.0 uA
Input Current, Low IIL 1.0 uA
Input Capacitance 5 pF

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DIGITAL OUTPUTS
Output Voltage, High VOH VDDP-0.1Note V
Output Voltage, Low
SAR ADC Input
VOL fid
0
0.1
3.3
V
V
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AUDIO OUTPUTS
Line-Out 2.54 Vp-p
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24MHz XTAL Specifications

Input Voltage, High VIH 2.0 3.6 V
Input Voltage, Low VIL -0.3 0.8 V
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Clock frequency 24 MHz

Crystal accuracy +/-30 ppm
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Long-term jitter +/-500 ps

32KHz XTAL Specifications
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XIN Vswing Vswing 140 mV

XOUT Vswing Vswing 175 mV
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Crystal accuracy 20 ppm

Si

Note: VDDP typical voltage is 3.3V or 1.8V

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 SSC338D/SSC338Q
High-Integrated IP Camera SoC Processor
Preliminary Product Brief Version 0.8

5.2. Absolute Maximum Ratings

Parameter Symbol Min Typ. Max. Unit
Core Power Supply Voltage VDD -0.3 1.26 V
3.3V I/O Supply Voltage VDDP_0 -0.3 3.63 V
AVDD_PM_SPI
1.8/3.3V I/O Supply Voltage VDDP_1 -0.3 3.63 V
VDDP_2A
DDR Digital Power Supply Voltage DVDD_DDR* -0.3 1.26 V
DDR IO Power Supply Voltage (DDR3/L) VDDIO_* -0.3 1.8 V

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AVDD*_DRAM

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PM IO Power Supply Voltage AVDD_NODIE -0.3 3.63 V
3.3V Analog Power Supply Voltage AVDD* -0.3 3.63 V

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0.9V Analog Power Supply Voltage AVDDL* -0.3 1.26 V
Storage Temperature TSTG -40 150 °C
Note:
fid
Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a
stress rating only and does not imply functional operation of device. Exposure to absolute maximum ratings for
extended periods may affect device reliability.
on
5.3. Recommended Operating Conditions
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Parameter Description Min. Typ. Max Unit

VDD Digital Core Power 0.87 0.9 1.05 V
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VDDP_0 Digital Input/Output Power for Domain 0 2.97 3.3 3.63 V

Digital Input/Output Power for Domain 1 2.97 3.3 3.63 V
aS

VDDP_1
Digital Input/Output Power for Domain 1 1.62 1.8 1.98 V
Digital Input/Output Power for Domain 2A
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2.97 3.3 3.63 V

(Sensor IO Group 0 Power)
VDDP_2A
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Digital Input/Output Power for Domain 2A

1.62 1.8 1.98 V
(Sensor IO Group 0 Power)
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Digital Power for DDR RX LDO (0.1uF CAP to

DVDD_DDR_RX TBD 0.9 TBD V
GND)
DVDD_DDR Digital Power for DDR TX TBD 0.9 TBD V
VDDIO_DATA (DDR3) IO Power for DDR Data 1.45 1.5 1.55 V
VDDIO_MCLK (DDR3) IO Power for DDR Clock 1.45 1.5 1.55 V
AVDDIO_DRAM (DDR3) IO Power for embedded DRAM 1.45 1.5 1.55 V
AVDD_NODIE Analog Power for PM Domain 2.97 3.3 3.63 V
DVDD_NODIE PM Domain LDO Output (1uF Cap to GND) TBD 0.9 TBD V
AVDD_PM_SPI External power supply for 3.3V IO 2.97 3.3 3.63 V
AVDD_PLL Analog Power for PLL 3.14 3.3 3.46 V

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Copyright © 2021 SigmaStar Technology. All rights reserved.
 SSC338D/SSC338Q
High-Integrated IP Camera SoC Processor
Preliminary Product Brief Version 0.8

Parameter Description Min. Typ. Max Unit

AVDD_XTAL Analog Power for XTAL 3.14 3.3 3.46 V
AVDD_RTC Analog Power for RTC 1.6 3 3.6 V
AVDD3P3_USB Analog Power for USB2.0 3.14 3.3 3.46 V
AVDD_ETH Analog Power for Ethernet 3.14 3.3 3.46 V
AVDD_AUD Analog Power for Audio 3.14 3.3 3.46 V
Main Die 125
Junction Temperature °C
DDR3 Die 125
Ambient Temperature

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during OTP 0 125 °C
programming

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fid
on
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ta
aS
g m
Si

Security Level: Confidential B - 14 - 6/30/2021

Copyright © 2021 SigmaStar Technology. All rights reserved.
 SSC338D/SSC338Q
High-Integrated IP Camera SoC Processor
Preliminary Product Brief Version 0.8

6. THERMAL RESISTANCE

6.1. Thermal simulation mode

PCB condition: JEDEC JESD51-5
PCB layers: 4L

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PCB dimensions: 76.2 x 114.3 (mm x mm)
PCB thickness: 1.6 (mm)

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Part Number Package Thermal Resistance
(°C/W)
PCB Layer fid θJA θJC

SSC338D/SSC338Q QFN128_12.3x12.3 4L PCB 25.4 7.6

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ta
aS
g m
Si

Security Level: Confidential B - 15 - 6/30/2021

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 SSC338D/SSC338Q
High-Integrated IP Camera SoC Processor
Preliminary Product Brief Version 0.8

7. ORDERING GUIDE

Part Number Temperature Range Package Description Package Option Minimum Order Quantity

SSC338D/SSC338Q -20°C to +60°C QFN 128 1216ea

7.1. Marking Information

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SSC338D/SSC338Q
Part Number

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Lot Number
Operation Code A

Operation Code B
Date Code (YYWW)
fid
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DISCLAIMER
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SIGMASTAR TECHNOLOGY RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE
TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. NO
RESPONSIBILITY IS ASSUMED BY SIGMASTAR TECHNOLOGY ARISING OUT OF THE APPLICATION
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OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY
LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
aS

Electrostatic charges accumulate on both test equipment and human body and can discharge
m

without detection. SSC338D/SSC338Q comes with ESD protection circuitry; however, the device
may be permanently damaged when subjected to high energy discharges. The device should be
handled with proper ESD precautions to prevent malfunction and performance degradation.
g
Si

Security Level: Confidential B - 16 - 6/30/2021

Copyright © 2021 SigmaStar Technology. All rights reserved.