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Assignment 03 S24

DLD_Updated

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Azwa Khan Sury
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0% found this document useful (0 votes)
21 views2 pages

Assignment 03 S24

DLD_Updated

Uploaded by

Azwa Khan Sury
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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University of Central Punjab

Department of Computer Sciences

DIGITAL LOGIC DESIGN


ASSIGNMENT # 03
Instructor Name: Max Points: 50
Program: BSCS
Instruction:
I. Assignment should be submitted on time. Late submission will not be accepted.
II. You should create your own solution according to your logic. Any similarity with
other student and internet will be consider as cheating and your assignment will
be marked as ZERO.
III. Assignment should be handwritten and done on Assignment papers and solution
images should be uploaded in PDF format only.
IV. Write (don’t Type) your Name, Registration# and Section on each page.

This assignment will test your CLO3

CLO 3 Apply the acquired knowledge to simulate C3 2


and implement small-scale digital circuits.

Before solving the assignment read instruction carefully.


Question#1:
Design a 4-bit Arithmetic Logic unit that can perform the following operations. For this
purpose, you will design a 4-bit adder logic diagram and then use this 4-bit adder along with
other necessary logic components to implement the ALU. Don’t forget to implement the logic
to detect the type of result. For example, if the result is negative (N), result is zero (Z), result
produces a carry (C). Your system will indicate it by updating the bits output bits of N, Z, C
accordingly.

Deliverables:
a. Diagram of full adder
b. Diagram of 4-bit full adder block diagram
c. Logic diagram of 4-bit ALU according to the table 1.
d. Fill and complete the operation table 2 for the given operand values X and Y.

Table-1

Select operation! Operation type

S3 S2 S1 S0
0 0 0 0 G= X+Y
0 0 0 1 G= X+Y+1
0 0 1 0 G=X+Y’
0 0 1 1 G=X-Y
0 1 0 0 G=X+1
0 1 0 1 G=X+2
0 1 1 0 G=2X
0 1 1 1 G=2X+1
1 0 0 0 G=X AND Y’
1 0 0 1 G=X OR Y
1 0 1 0 G=X XOR Y
1 0 1 1 G=X’
1 1 0 0 G=X
1 1 0 1 G=Y
1 1 1 0 NOT USED
1 1 1 1 NOT USED

Table2:

Input Operation Input Expected Output


S3 S2 S1 S0 X Y G C N Z
0 0 0 0 G= X+Y 0011 0010 0100 0 0 0

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