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Top Module

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0% found this document useful (0 votes)
9 views2 pages

Top Module

Uploaded by

engrmm101
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as TXT, PDF, TXT or read online on Scribd
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module TopModule (

input clk,
input reset_n,
input [31:0] instruction_in, // Instruction from instruction memory
output [31:0] pc_out // Program counter output
);

wire [31:0] pc_value; // Output from Program Counter


wire [31:0] current_instruction; // Instruction to Decode Unit
wire [31:0] current_pc; // Current PC to Decode Unit
wire [3:0] operation; // Operation to Execution Unit
wire [$clog2(32)-1:0] src1_addr, src2_addr, dest_addr; // Register addresses
wire [31:0] imm; // Immediate value from Decode Unit
wire use_imm; // Immediate use flag
wire is_load_store; // Load/store indication
wire [31:0] operand_a, operand_b; // Operands from Register File
wire [31:0] exec_result; // Result from Execution Unit
wire branch_taken; // Branch flag
wire reg_write; // Register write enable
wire [31:0] write_data; // Data to write back to Register File
wire [31:0] memory_read_data; // Data read from Memory Unit

// Program Counter
Program_Counter pc (
.clk(clk),
.reset_n(reset_n),
.branch_flag(branch_taken),
.instruction_in(instruction_in),
.pc_value(pc_value)
);

// Assign current PC to the Decode Unit


assign current_pc = pc_value;

// Decode Unit
DecodUnit decoder (
.clk(clk),
.reset_n(reset_n),
.current_instruction(instruction_in),
.current_pc(current_pc),
.operation(operation),
.src1_addr(src1_addr),
.src2_addr(src2_addr),
.dest_addr(dest_addr),
.imm(imm),
.use_imm(use_imm),
.is_load_store(is_load_store)
);

// Register File
registerfile register_file (
.clk(clk),
.reset_n(reset_n),
.src1_addr(src1_addr),
.src2_addr(src2_addr),
.dest_addr(dest_addr),
.operand_a(operand_a),
.operand_b(operand_b),
.write_data(exec_result),
.wr_en(reg_write)
);

// Execution Unit
execution_unit exec_unit (
.clk(clk),
.reset_n(reset_n),
.operation(operation),
.imm(imm),
.use_imm(use_imm),
.operand_a(operand_a),
.operand_b(operand_b),
.branch_taken(branch_taken),
.result(exec_result)
);

// Memory Unit
MemoryUnit memory_unit (
.clk(clk),
.we(is_load_store), // Control signal for memory write
.addr(exec_result), // Using exec_result as address for simplicity
.writeData(operand_b), // Example write data
.readData(memory_read_data)
);

// Write Back Unit


WriteBackUnit write_back (
.clk(clk),
.regWrite(reg_write),
.writeReg(dest_addr),
.writeData(exec_result)
);

// Output the current PC value


assign pc_out = pc_value;

endmodule

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