KNOWLEDGE INSTITUTE OF TECHNOLOGY
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Report
On
“VLSI Design”
Virtual Internship
Bachelor of Engineering
(Computer Science & Engineering)
Third Year
Submitted to Submitted by
Learnflu (E-learning provider) Kishore Kumar S
Online learning service private limited 2k22cse080@kiot.ac.in
NAME KISHORE KUMAR S
COLLEGE KNOWLEDGE INSTITUTE OF TECHNOLOGY
COURSE VLSI (Mode: Online)
INTRODUCTION:
A Johnson counter, also known as a twisted ring counter, is a type of digital counter used
extensively in sequential logic circuits. It is a variation of a shift register counter, where the
inverted output of the last flip-flop is fed back to the input of the first flip-flop. This unique
feedback mechanism creates a specific sequence of states, which can be used in various digital
applications such as frequency division, digital displays, and signal generation.
Key Characteristics of a Johnson Counter:
1. Configuration: Consists of a series of flip-flops connected in a feedback loop, with the
inverted output of the last flip-flop fed into the first.
2. Sequence: For an n-bit Johnson counter, the sequence is 2n states long, which means it
generates a sequence of 2n unique states.
3. Clock Pulse: The state of the counter changes with each clock pulse.
4. Outputs: Each flip-flop provides a distinct output which can be used for various timing
and sequencing applications.
Example: 4-bit Johnson Counter
Let's look at a 4-bit Johnson counter. It has 4 flip-flops (let's call them Q0, Q1, Q2, and Q3), and
the sequence it generates will have 8 states (2 * 4).
Truth Table for a 4-bit Johnson Counter:
Consider a 4-bit Johnson counter with four flip-flops (Q0, Q1, Q2, Q3). The states will change as
follows:
Clock Pulse Q3 Q2 Q1 Q0
0 0 0 0 0
1 1 0 0 0
2 1 1 0 0
3 1 1 1 0
4 1 1 1 1
5 0 1 1 1
6 0 0 1 1
7 0 0 0 1
Operation:
1. Initial State: All flip-flops are cleared, so Q0, Q1, Q2, and Q3 are all 0.
2. Clock Pulse 1: The inverted output of Q3 (which is 0) is fed to Q0, resulting in Q0 = 1.
3. Clock Pulse 2: The inverted output of Q3 (still 0) is fed to Q0, and Q1 is set to 1.
4. Clock Pulse 3 and beyond: This pattern continues until all flip-flops are set to 1. Once
all flip-flops are set, the inverted output of Q3 (now 1) starts clearing the flip-flops one
by one.
Implementation: (Verilog)
File Name : johnson_counter.v.txt
module johnson_counter( out,reset,clk);
input clk,reset;
output [3:0] out;
reg [3:0] q;
always @(posedge clk)
begin
if(reset)
q=4'd0;
else
begin
q[3]<=q[2];
q[2]<=q[1];
q[1]<=q[0];
q[0]<=(~q[3]);
end
end
assign out=q;
endmodule
File Name : jc_tb.v.txt
module jc_tb;
reg clk,reset;
wire [3:0] out;
johnson_counter dut (.out(out), .reset(reset), .clk(clk));
always
#5 clk =~clk;
initial begin
reset=1'b1; clk=1'b0;
#20 reset= 1'b0;
end
initial
begin
$monitor( $time, " clk=%b, out= %b, reset=%b", clk,out,reset);
#105 $stop;
end
endmodule
To Run :
iverilog -o my_design jc_tb.v.txt johnson_counter.v.txt
Output :
0 clk=0, out= xxxx, reset=1
5 clk=1, out= 0000, reset=1
10 clk=0, out= 0000, reset=1
15 clk=1, out= 0000, reset=1
20 clk=0, out= 0000, reset=0
25 clk=1, out= 0001, reset=0
30 clk=0, out= 0001, reset=0
35 clk=1, out= 0011, reset=0
40 clk=0, out= 0011, reset=0
45 clk=1, out= 0111, reset=0
50 clk=0, out= 0111, reset=0
55 clk=1, out= 1111, reset=0
60 clk=0, out= 1111, reset=0
65 clk=1, out= 1110, reset=0
70 clk=0, out= 1110, reset=0
75 clk=1, out= 1100, reset=0
80 clk=0, out= 1100, reset=0
85 clk=1, out= 1000, reset=0
90 clk=0, out= 1000, reset=0
95 clk=1, out= 0000, reset=0
100 clk=0, out= 0000, reset=0
** VVP Stop(0) **
** Flushing output streams.
** Current simulation time is 105 ticks.
Image Attachment:
Code :
Output :
Applications:
1. Frequency Division: Used to divide the frequency of a clock signal by an integer factor.
2. Digital Displays: Useful in creating repetitive sequences for driving LED displays.
3. Counters: Employed in digital systems for counting purposes.
4. Sequencers: Generates a series of timed signals for various digital operations.
Advantages:
Simplicity: Simple to design and implement with minimal logic gates.
Predictable Sequence: Generates a predictable and easily programmable sequence of
states.
Disadvantages:
Speed: Limited by the propagation delay through the flip-flops.
Scalability: For larger sequences, more flip-flops are required, increasing complexity.
Conclusion
Johnson counters are versatile and valuable components in digital electronics. Their
ability to generate specific sequences and timing signals makes them indispensable in a wide
range of applications, from simple counters to complex digital systems. Their straightforward
design and predictable operation make them a popular choice for engineers and designers in the
field of digital electronics.
