Questions Ch_5

1. A computer uses a memory unit with 4096 words of 16 bits each. An instruction at 03B location of memory
has I=1, opcode of ADD instruction and address part equal to 075. The memory word at 075 contains value
032A. The memory word at 32A contains value 9C37 and the content of AC is 54AC
a. Give block diagram of memory unit to give snapshot of the above representation.
b. Go over the instruction cycle and determine the content in hexadecimal of the following registers:
AR,DR,PC,AC,IR when the instruction at 03B is executed. Give the answer in table with column for
each register and row for each timing signal.
2. How many data lines and address lines are needed for the memory units with the following capacity.
a. 53K x 16 b. 24M x 32
3. How many 128 x 8 memory chips are needed to provide a memory capacity of 4096 x 16.
4. Differentiate between PC and AR.
5. Write microoperations for implementing the following memory reference instructions
a. BSA b. ISZ
6. A non pipe line system takes 30 ns to process a task. The same task can be processed in a four – segment
pipe line with a clock cycle of 10ns. Determine the speedup ratio of the pipe line for 100 tasks.
7. Explain briefly the following microoperations:
 M [AR] ← PC, PC ← AR+1
 If (FGI = 1) then PC ← AR
 E ← Cout
 If (AC(15) = 1) then S ← 0
 (IEN)(FGO+FGI): R←1
8. The content of AC in hexadecimal is BF43 and the initial value of E is 1. The initial value of PC in hexadecimal
is 08F. The three instructions (CIR, SNA & CMA) will execute in the following sequence: CIR SNA CMA
Determine the contents of AC, E, PC, AR and IR in hexadecimal after the execution of every instruction.
9. A computer uses a memory unit with 128 K words of 32 bits each. A binary instruction code is stored in one
word of memory. The instruction has 4 parts: an indirect bit, an operation code, a register code part to
specify one of 16 registers and an address part.
a. How many bits are there in the operation code, the register code part and address part?
b. Draw the instruction word format and indicate the number of bits in each part.
c. How many bits are there in the data inputs of the memory?
10. Draw a space-time diagram for a five-segment pipeline showing the time to process seven tasks.
11. Determine the number of clock cycles that it takes to process 150 asks in six segment pipeline.
12. Draw a space-time diagram for a six-segment pipeline to process eight tasks. A non-pipelined system takes
50ns to process a task. The same task processed in six segment pipeline with a clock cycle of 20ns.
Determine the speed up ratio of pipeline for 200 tasks.
13. A computer uses a memory unit with 65536 words of 32 bits each. A binary instruction code is stored in one
word of memory. The instruction has four parts: an indirect bit, an operation code, address mode part to
specify one of the four addressing modes, register code part to specify one of the 50 registers and an address
part?

(i) How many bits are there in the operation code, addressing mode part, register code part, and
address part?

(ii) Draw the instruction word format.

14. The content of AC in the basic computer is hexadecimal A937 and the initial value of E is 1. Determine the
contents of AC, E, PC, AR, and IR in hexadecimal after the execution of the CLA instruction. The initial value of
PC is hexadecimal 021.
15. An instruction at address 021 in the basic computer has I 0, an operation code of the AND instruction, and an
address part equal to 083 (all numbers are in hexadecimal). The memory word at address 083 contains the
operand B8F2 and the content of AC is A937. Go over the instruction cycle and determine the con tents of
the following registers at the end of the execute phase: PC, AR, DR, AC, and IR.
16. Show the contents in hexadecimal of registers PC, AR, DR, IR, and SC of the basic computer when an ISZ
indirect instruction is fetched from memory and executed. The initial content of PC is 7FF. The content of
memory at address 7FF is EA9F. The content of memory at address A9F is 0C35. The content of memory at
address C35 is FFFF. Give the answer in a table with five columns, one for each register and a row for each
timing signal.
17. The content of PC in the basic computer is 3AF (all numbers are in hexadecimal). The content of AC is 7EC3.
The content of memory at address 3AF is 932E. The content of memory at address 32E is 09AC. The content
of memory at address 9AC is 8B9F.
a. What is the instruction that will be fetched and executed next?
b. Show the binary operation that will be performed in the AC when the instruction is executed.
c. Give the contents of registers PC, AR, DR, AC, and IR in hexadecimal and the values of E, I, and the
sequence counter SC in binary at the end of the instruction cycle.
18. The content of PC in the basic computer is 2AC. The content of AC is 2EC3. The instruction format has three
parts: mode, opcode, and address. The content of memory at address 2AC is 832E. The content of memory at
address 32E is 0821. The content of memory at address 821 is 8B9F (all numbers are in hexadecimal).

(i) Draw a block diagram of memory unit to give snapshot of the above representation and
specify the instruction that will be executed.

(ii) Perform the binary operation in AC when the instruction is executed. Also, specify the values
of PC, AR, DR, AC and IR in hexadecimal at the end of the instruction cycle.

19. A computer uses a memory of 65,536 words with eight bits in each word. It has the following registers: PC,
AR, TR (16 bits each), and AC, DR, IR (eight bits each). A memory-reference instruction consists of three
words: an 8-bit operation-code (one word) and a 16-bit address (in the next two words). All operands are
eight bits. There is no indirect bit.
i. Draw a block diagram of the computer showing the memory and registers
ii. Draw a diagram showing the placement in memory of a typical three-word instruction and the
corresponding 8-bit operand.
iii. List the sequence of microoperations for fetching a memory reference instruction and then placing
the operand in DR. Start from timing signal T0.
20. A digital computer has a memory unit with a capacity of 16,384 words, 40 bits per word. The instruction code
format consists of six bits for the operation part and 14 bits for the address part (no indirect mode bit). Two
instructions are packed in one memory word, and a 40-bit instruction register IR is available in the control
unit. Formulate a procedure for fetching and executing instructions for this computer.