American International University- Bangladesh (AIUB)

Faculty of Engineering (FE)

ELECTRONIC DEVICES LAB

Course Name : Course Code : EEE 2104
Spring -2023-2024
Semester : Sec : J
MD. ALOMGIR KABIR
Lab Instructor : Group: 3

Experiment No : 09
Experiment Name : Study of JFET and MOSFET Characterization.

Submitted by (NAME): Student ID:

Group Members ID Name

1. Istiaque Mahbub Isti 22-49167-3
2. Eshika Rani Pall 22-49200-3
3. Khadija Akter 22-48295-3
Ibrahim Khalil Ullah
4. 22-48301-3
Midul
5. Wasif Asad Alvi 22-46451-1

Performance Date : 16/04/24 Due Date : 23/03/2024

Marking Rubrics (to be filled by Lab Instructor)

Proficient Good Acceptable Secured
Category Unacceptable [1]
[6] [4] [2] Marks
All information, All Information Most information
Theoretical Much information
measures and variables provided that is correct, but some
Background, Methods missing and/or
are provided and sufficient, but more information may be
& procedures sections inaccurate.
explained. explanation is needed. missing or inaccurate.
Experimental results
All of the criteria are Most criteria are met,
don’t match exactly Experimental results
met; results are but there may be some
Results with the theoretical are missing or
described clearly and lack of clarity and/or
values and/or analysis incorrect;
accurately; incorrect information.
is unclear.
Demonstrates thorough Hypotheses are clearly
Conclusions don’t
and sophisticated stated, but some Some hypotheses
match hypotheses, not
understanding. concluding statements missing or misstated;
Discussion supported by data; no
Conclusions drawn are not supported by data conclusions not
integration of data from
appropriate for or data not well supported by data.
different sources.
analyses; integrated.
Title page, placement
of figures and figure
Minor errors in Major errors and/or
General formatting captions, and other Not proper style in text.
formatting. missing information.
formatting issues all
correct.
Writing is strong and
Writing is clear and
easy to understand;
easy to understand; Most of the required
ideas are fully
ideas are connected; criteria are met, but
elaborated and
Writing & effective transitions some lack of clarity, Very unclear, many
connected; effective
organization between sentences; typographic, spelling, errors.
transitions between
minor typographic, or grammatical errors
sentences; no
spelling, or are present.
typographic, spelling,
grammatical errors.
or grammatical errors.

Total Marks
Comments:
(Out of ):
Title: Study of JFET and MOSFET Characterization.
Theory: JFET (Junction Field-Effect Transistor) and MOSFET (Metal-Oxide-Semiconductor Field-Effect
Transistor) are both crucial semiconductor devices used in electronic circuits for various applications. JFETs
utilize a reverse-biased pn junction to control current flow through a semiconductor channel, modulated by
the voltage applied to the gate terminal. They exhibit high input impedance and are primarily used in low-
power applications such as amplifiers and switches. In contrast, MOSFETs employ a metal gate insulated
from the semiconductor by a thin oxide layer. They offer high input impedance, low power consumption,
and scalability, making them ideal for integrated circuit design. MOSFETs come in two main types:
enhancement mode, requiring a positive voltage to turn on, and depletion mode, which is normally on and
requires a negative voltage to turn off. They are widely used in digital logic circuits, power amplifiers, and
many other applications requiring high-speed switching and efficient power handling. Both JFETs and
MOSFETs play critical roles in modern electronics, each offering unique characteristics suited to specific
design requirements
JFET Structure and Operation:
A JFET (Junction Field-Effect Transistor) is a three-terminal semiconductor device consisting of a
conducting channel made of a single semiconductor material, usually silicon. It has two junctions: the
source-channel junction and the drain-channel junction. The conducting channel is doped to either p-type or
n-type semiconductor material, depending on the type of JFET (p-channel or n-channel). The gate terminal
is made of a region of opposite doping type (p-type for n-channel JFET, and n-type for p-channel JFET),
which creates a depletion region that controls the flow of current between the source and drain terminals. By
applying a voltage to the gate terminal, the width of the depletion region changes, affecting the conductivity
of the channel and thereby controlling the current flow between the source and drain terminals. JFETs
operate in the depletion mode, meaning that they are normally conducting in the absence of a gate-source
voltage and can be turned off by applying a reverse bias voltage to the gate terminal. JFETs are known for
their high input impedance and voltage-controlled current characteristics, making them suitable for various
applications such as amplifiers, switches, and voltage-controlled resistors.
MOSFET Structure and Operation:
A MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) is a key semiconductor device with three
terminals: source, drain, and gate. Its structure consists of a semiconductor substrate, typically silicon, with a
thin layer of insulating material (oxide) and a metal gate electrode on top. The semiconductor substrate
between the source and drain terminals forms a channel. When a voltage is applied to the gate terminal, an
electric field is created in the channel, modulating its conductivity. In an enhancement-mode MOSFET, no
current flows between the source and drain terminals until a voltage is applied to the gate, enabling current
flow. In contrast, a depletion-mode MOSFET conducts by default and requires a gate voltage to reduce or
stop current flow. MOSFETs offer high input impedance, low power consumption, and fast switching
speeds, making them integral components in digital and analog circuits, power electronics, and integrated
circuits.
Apparatus:

Circuit diagram:
Table:
Table 1 Measured data of the voltage and current for the transfer characteristic curve of a JFET. Dain to-
Source voltage, VDS = 1 V.
Gate Voltage, VGS (V) Drain Current, IDS
(mA)
1 0.76
2 0.29
3 0
4 0
5 0
6 0
 7 0
8 0
9 0
10 0
11 0
12 0

Table 2 Measured data of the voltage and current for the transfer characteristic curve of a JFET. Gate to-
Source voltage, VGS = 5 V.
Drain Voltage, VDS (V) Drain Current, IDS
(mA))
1 0
2 0
3 0
4 0.49
5 1.19
6 2.13
7 3.11
8 4.03
9 5.05
10 5.70
11 6.66
12 7.48

Table 3 Measured data of the voltage and current for the transfer characteristic curve of a MOSFET.

Gate Voltage, VGS (V) Drain Current, IDS

(mA)
1 0
2 0
3 0.30
4 0.97
5 0.97
6 0.97
7 0.97
8 0.97
9 0.97
 10 0.97
11 0.97
12 0.97
Table 4 Measured data of the voltage and current for the transfer characteristic curve of a JFET. Gate to-
Source voltage, VGS = 5 V.
Drain Voltage, VDS (V) Drain Current, IDS
(mA)
1 0.95
2 2.11
3 3.04
4 3.97
5 5.01
6 6.13
7 7.08
8 8.08
9 9.09
10 10.11
11 11.16
12 12.15
13 13.34
14 14.4
15 15.36

Simulation:
Figure: VDS = 1 V and VGS vries from 1V-12V
Figure: VGS = 5 V and VDS varies 1V-12V
Figure: VDS = 1 V and VGS vries from 1V-12V(n-channel MOSFET)
Figure: VGS = 5 V and VDS varies 1V-12V(n-channel MOSFET)
Graph:
Discussion:
From this experiment the characteristics of JFET and MOSFET can be observed. The readings of VGS and ID from the
experiment were measured as accurately as possible. The measurements were noted down carefully. After plotting
the ID vs VGS Graph of Table -1 and Table-2 the characteristic of JFET can be noticed. Similarly from the ID vs VGS
Graph Table-3 and Table-4, the characteristic of MOSFET can be observed. From this experiment, it can be learned
that JFETs can only be operated in depletion mode, whereas MOSFETs can operate in both depletion mode and
enhancement mode. JFETs have high input impedance on the order of 1010 ohms which makes them sensitive to
input voltage signals. MOSFETs offer even higher input impedance than the JFETs which makes them much more
resistive at the gate terminal, thanks to the metal oxide insulator. MOSFETs are more susceptible to damage from
electrostatic discharge because of the additional metal oxide insulator which reduces the capacitance of the gate
making the transistor vulnerable to high voltage damages. JFETs, on the other hand, are less susceptible to ESD
damages because they offer higher input capacitance than MOSFETs.

Conclusion:
The goal of the experiment was to comprehend the fundamental workings of JFETs and MOSFETs and establish the
threshold voltage and to quantify the I-V characteristics and identify the various JFET and MOSFET operating zones,
this was done successfully. The experiment yielded expected results corresponding to theoretical knowledge of JFET
and MOSFET characteristics. The results obtained from the experiment was fairly identical to the results obtained
from simulation. Neglecting the unavoidable human errors, the experiment can be considered accurate enough to
fulfil the purpose of this experiment