STKNX
STKNX
Datasheet
                                                        Features
                                                        •     Very thin fine pitch 4 x 4 mm VQFNPN24 package
                                                        •     KNX certified, KNX TP1-256 supported
                                                        •     Easy interface to microcontroller
                                                        •     Very small system solution
                                                        •     Two integrated voltage regulators for external use in application
                                                              –    Selectable 3.3 V / 5 V - 20 mA linear regulator
VFQFPN24 (4 x 4 x 1.0 mm, 0.5 mm
pitch)                                                        –    Adjustable 1 V to 12 V - 150 mA high- efficiency DC/DC step down
                                                                   switching converter
                                                        •     KNX bus power extractor supporting bus current up to 30 mA
                                                        •     Adjustable KNX bus current slew rate dI/dt
                                                        •     No crystal required
                                                        •     Operating temperature range -40 °C to +85 °C
                                                        Applications
                                                        •     KNX twisted pair network (KNX TP1-256)
                                                        Description
                                                        The STKNX is a transceiver device for KNX TP communication. The small package
                                                        and few external components enable very compact KNX node design.
             Product status link                        The simple interface to the microcontroller allows easy replacement of physical layer
                                                        discrete component implementations.
                     STKNX
                                                        The STKNX device features two integrated voltage regulators for external use in the
              Product summary                           application: the selectable 3.3 V / 5 V - 20 mA linear regulator and the adjustable 1 V
                                                        to 12 V - 150 mA high-efficiency DC/DC step down switching converter.
 Order code          STKNX          STKNXTR
                                                        The integrated KNX bus power extractor supports bus current up to 30 mA to power
   Package                 VFQFPN24
                                                        external devices and the STKNX transceiver's own power needs, while limiting the
   Packing            Tube         Tape & Reel          bus current slew rate according to KNX specifications.
                                                        The STKNX ensures safe coupling to the bus and provides the bus monitoring
                 Product label
                                                        warning for the loss of bus power.
                    Figure 1. Typical application circuit, buck converter enabled, linear regulator supplied by impedance
                                                                   modulator
                                                              VDDHV
                                      VREF
VDD_REGIN VFLT
                                                              KNX_AC
                                      VCCCORE
STKNX VGATE
                                                               KNX_A
                                      VCC_OK
                                                                 R68
                                      KNX_OK
                                                                CPH
                                      KNX_TX
KNX_RX CPL
Figure 2. Typical application circuit, buck converter enabled, linear regulator supplied by buck converter
                                                              VDDHV
                                      VREF
VDD_REGIN VFLT
                                                              KNX_AC
                                      VCCCORE
STKNX VGATE
                                                               KNX_A
                                      VCC_OK
KNX_OK R68
KNX_TX CPH
KNX_RX CPL
Note:             The VOUT level needs to be compliant with VDD_REGIN recommended operating conditions.
                  VCORE selectable to 3.3 V / 5 V through VCC_SEL (3.3 V in the example).
                                                               VDDHV
                                       VREF
VDD_REGIN VFLT
                                                               KNX_AC
                                       VCCCORE
STKNX VGATE
                                                                KNX_A
                                       VCC_OK
KNX_OK R68
KNX_TX CPH
KNX_RX CPL
                                                                       VDDHV
                                         VREF
VDD_REGIN VFLT
                                                                     KNX_AC
                                         VCCCORE
STKNX VGATE
                                                                       KNX_A
                                         VCC_OK
KNX_OK R68
KNX_TX CPH
KNX_RX CPL
Note:             The VOUT level needs to be compliant with VCCCORE recommended operating conditions.
                  VCC_SEL needs to be set according to the VCCCORE level (3.3 V in the example).
Capacitors
                                                                        Inductors
                                                                                    IR > 150 mA
                     L        Power inductor             33 µH                                     Buck converter output inductor
                                                                                   ISAT > 550 mA
                                                                          Diodes
                                                                                    VBR > 50 V Input diode (protection from reverse
                     D1           Diode           LL4148 or equivalent
                                                                              VF (50 mA) < 1 V polarity connection)
                                    Linear regulator supply input. Short to VCCCORE to disable the linear regulator and supply VCCCORE
                   1    VDD_REGIN
                                    externally.
                   2     KNX_AC     BUS AC-coupled sense for the Rx input and Tx feedback. DC biased to 9.7 V typ.
                   3       R68      KNX transmitter output
                   4      KNX_B     Analog ground
                   5      CP_H      Equalization cap connection to KNX supply (KNX+)
                   6      CP_L      Equalization cap connection to KNX ground (KNX-)
                   7      VFLT      Impedance modulator compensation
                   8      VREF      Impedance modulator reference
                   9     VDDHV      VDDHV supply input and impedance modulator feedback
                  10    VDDHV_PD Impedance modulator power output
                  11      KNX_A     KNX power supply input (KNX+)
                  12      KNX_B     Analog ground
                  13      VGATE     Impedance modulator storage capacitor connection
                  14     DCDC_IN      Step down converter supply input. Short to ground or leave floating to disable the switching converter.
                  15     DCDC_LX      Step down converter switching output
                  16    DCDC_GND Step down converter power ground
                  17     DCDC_SS      Step down converter soft-start programming pin
                  18     DCDC_FB      Step down converter feedback input. Sets output voltage (1 V - 12 V range) through the resistor divider.
                  19     VCC_OK       VCCCORE power good CMOS digital output
                  20    VCCCORE       Linear regulator output (3.3 V / 5 V selectable). Supply voltage for digital I/O.
                  21     KNX_OK       KNX bus power good CMOS digital output
                                      Selects linear regulator output voltage. Internally pulled down (6 µA typ.).
                  22     VCC_SEL
                                      Tie to VCCCORE to select 5 V. Short to ground or leave floating to select 3.3 V.
                  23     KNX_RX       Receiver CMOS digital output
                  24      KNX_TX      Transmitter digital input. Internally pulled down (6 µA typ.).
                                      Connect to analog ground.
                   -    Exposed pad For thermal optimization, maximize the area of the ground layer on which the exposed pad is soldered
                                    and provide good thermal connection with the bottom ground layer through vias.
3 Thermal characteristics
4 Electrical specifications
IDCDC Continuous output current from DCDC switching converter (3) - - 150 mA
                  1. Indicates DC value. With the active and equalization pulse bus voltage must be between 11 V and 45 V.
                  2. Short VDD_REGIN to VCCCORE to disable the internal linear regulator and provide VCCCORE voltage externally.
                  3. The maximum current capability refers to the voltage regulator only. The usable current capability can be limited by the KNX
                     bus current consumption specification.
                                                                           Power supply
                                                                           Excluding active and equalization
                       V(KNX_A)         DC supply voltage on KNX_A pin                                              20          -          32          V
                                                                           pulse
                                                                           V(KNX_A) = 32 V, no activity on
                                        Bus current consumption, no
                                                                           bus, no transmission, no external         -         1            -         mA
                                        load
                                                                           load
                       I(KNX_A)                                            V(KNX_A) = 32 V, no activity on
                                        Bus current consumption, 30 mA     bus, no transmission, 30 mA load
                                                                                                                     -         31           -         mA
                                        load                               on VDDHV rail (including linear
                                                                           regulator and switching converter)
                      KNX_OKRIS         KNX_OK rising threshold
                                                                           VREF rising                               -          -          13.5        V
                        (VREF)          referred to VREF voltage
                                                                        Impedance modulator
                                                                           V(KNX_A) = 20 V DC
                                        V(KNX_A) - V(VDDHV)
                      VDDHV drop                                           ILOAD = 5 mA                              -          -          6.5         V
                                        voltage drop
                                                                           D3 = LL4148 or equivalent
                                                                           V(KNX_A) = 20 V DC,
                                        V(KNX_A) - V(VDDHV)
                      VDDHV drop                                           ILOAD = 30 mA,                            -          -          7.2         V
                                        voltage drop
                                                                           D3 = LL4148 or equivalent
                                        V(KNX_A) - V(REF)                  V(KNX_A) = 20 V DC, VREF
                      VREF drop                                                                                      3        4.3           5          V
                                        voltage drop                       settled
                                                                 Transmitter
                    RDS(ON)    Tx MOSFET on resistance           -                             -         5        -          Ω
5 Device description
                  The STKNX is a transceiver device for twisted pair communication, following the KNX twisted pair standard (KNX
                  TP1-256). Detailed information on the KNX bus can be found in the KNX standards and on the KNX website
                  (www.knx.org).
                  The STKNX is composed of two main functional blocks: the bus interface and the voltage regulators.
                  •    The bus interface consists of the transmitter, receiver and impedance modulator
                  •    The voltage regulators block consists of an adjustable output voltage step down switching converter with
                       integrated power MOSFETs and a 3.3 V / 5 V programmable linear regulator
VBUS
Veq
                  DC level
                       Vact
Logic 0 Logic 1
                                             35                   69
                                                           104                                       104
KNX_RX
                      KNX_TX
                      (if transmitting)
5.1.1             Transmitter
                  The transmitter converts logic level signals received at the KNX_TX pin to analog signals on the KNX bus. To
                  transmit a logic 1 (equivalent to transmitter in idle state), the KNX_TX pin has to be kept low for 104 µs. To
                  transmit a logic 0, the KNX_TX has to be forced high for 35 µs (active pulse) and then low for 69 µs.
                  During the active pulse, the transmitter forces a voltage drop of 7.5 V typ. on the KNX bus, by sinking current
                  through the R68 pin.
5.1.2             Receiver
                  The receiver detects the beginning and the end of the active pulse and provides a logic level output on the
                  KNX_RX pin. The KNX_RX pin is high during the active pulse, low during the equalization phase and idle state.
                  The detection threshold for the start of the active pulse is 0.6 V typ. below the bus DC voltage.
                     10 mA                       47 µF                                              100 µF
                     30 mA                   10 µF - 47 µF                                          220 µF
6 Layout recommendations
                  PCB layout is an important part of DC-DC switching converter design. A poor board layout can compromise
                  important parameters of the DC-DC converter such as efficiency, output voltage ripple, line and load regulation
                  and stability.
                  Good layout for the STKNX can be implemented by following the few simple design rules listed in this section.
                  These rules have been applied to the STKNX routed area on the STKNX evaluation board (EVALKITSTKNX),
                  where only the TOP and BOTTOM layers have been used from the four available, so it can be transposed
                  on a low cost 2-layer PCB. It is then easy to implement the rules on a final KNX product. The source files of
                  EVALKITSTKNX PCB layout are available for download from www.st.com.
Figure 8. STKNX area routed using top and bottom layers only
                  Refer to Figure 9 and Figure 10 below for the recommendations described below:
                  •    Place CIN (C13) close to the STKNX and connect it between pins VIN and DCDC_GND directly on top layer
                       (DCDC_LX trace crosses between CIN pads)
                  •    Connect COUT (C24) to DCDC_GND directly on top layer
                  •    Keep the following power loops short:
                       –     CIN → DCDC_IN → DCDC_LX → L1 → COUT → CIN (green)
                       –     COUT → DCDC_GND → DCDC_LX → L1 → COUT (red)
                       –     CIN → DCDC_IN → DCDC_GND → CIN (purple)
                  •    Use properly sized traces or shapes for power paths (DCDC_IN, DCDC_GND, VDCDC, LX)
                       –     Keep FB/Feedback and SS/Soft-Start components (Rfbx, Cfb1, Css) away from switching / noisy node
                             (DCDC_LX), shielding with quiet nets (DCDC_GND in the image) is recommended (black)
                       –     Connect DCDC_GND pin (16) and KNX_B pins (4 and 12) to the exposed pad shape below the IC, as
                             shown in Figure 10, to ensure ground consistency
                       –     Place several GND vias on STKNX package exposed pad (x9 in EVALKITSTKNX).
7 Package information
                  In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages,
                  depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product
                  status are available at: www.st.com. ECOPACK is an ST trademark.
                                                               Dimensions [mm]
                  Symbol
                                        Min.                         Nom.                           Max.
                    A                   0.80                           -                            1.00
                   A1                   0.00                           -                            0.05
                   A2                    -                           0.65                             -
                   A3                    -                           0.20                             -
                    b                   0.20                         0.25                           0.30
                    D                   3.9                           4.0                            4.1
                   D2                   2.7                           2.8                            2.9
                    e                    -                            0.5                             -
                    E                   3.9                           4.0                            4.1
                   E2                   2.7                           2.8                            2.9
                    L                   0.30                         0.35                           0.40
                    k                   0.20                           -                              -
                    N                    -                            24                              -
                  Symbol                               Tolerance of form and position [mm]
                   aaa                                                0.15
                   bbb                                                0.10
                   ccc                                                0.10
                   ddd                                                0.05
                   eee                                                0.08
                    fff                                               0.10
Revision history
Contents
1       Typical application circuit and block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
        1.1        Typical application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
        1.2        Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5.1.2 Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
List of figures
Figure 1.         Typical application circuit, buck converter enabled, linear regulator supplied by impedance modulator .                                   .   .   .   .   .   .   . 2
Figure 2.         Typical application circuit, buck converter enabled, linear regulator supplied by buck converter . . . . . .                              .   .   .   .   .   .   . 3
Figure 3.         Typical application circuit, buck converter disabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .              .   .   .   .   .   .   . 4
Figure 4.         Typical application circuit, linear regulator disabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .            .   .   .   .   .   .   . 5
Figure 5.         STKNX Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .       .   .   .   .   .   .   . 7
Figure 6.         Pin connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .     .   .   .   .   .   .   . 8
Figure 7.         KNX bus voltage and corresponding digital signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .                 .   .   .   .   .   .    15
Figure 8.         STKNX area routed using top and bottom layers only . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .                    .   .   .   .   .   .    18
Figure 9.         Layout recommendations description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .             .   .   .   .   .   .    19
Figure 10.        Layout recommendations application. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .             .   .   .   .   .   .    19
Figure 11.        VFQFPN 4 x 4 x 1.0 24 pitch 0.5 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .                 .   .   .   .   .   .    20
Figure 12.        Suggested footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .   .   .   .   .   .   .    22
List of tables
Table 1.     External components typical value . . . . . . . . . . . . . . . . . .          .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   . 5
Table 2.     STKNX Pin description . . . . . . . . . . . . . . . . . . . . . . . . . .      .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   . 8
Table 3.     Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . .     .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   10
Table 4.     Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . .         .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .    11
Table 5.     Recommended operating conditions. . . . . . . . . . . . . . . . .              .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .    11
Table 6.     Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   12
Table 7.     Recommended CGATE and CVDDHV vs. fan-in . . . . . . . .                        .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   16
Table 8.     VFQFPN 4 x 4 x 1.0 24 pitch 0.5 package mechanical data .                      .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   21
Table 9.     Document revision history . . . . . . . . . . . . . . . . . . . . . . . .      .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   23