32-Position Manual Up/Down Control

Potentiometer
Data Sheet AD5228
FEATURES FUNCTIONAL BLOCK DIAGRAM
32-position digital potentiometer
10 kΩ, 50 kΩ, 100 kΩ end-to-end terminal resistance UP/DOWN D
E
AD5228
VDD CONTROL
Simple manual up/down control LOGIC C
O
Self-contained, requires only 2 pushbutton tactile switches R1 R2
D A
E
Built-in adaptive debouncer DISCRETE W
Discrete step-up/step-down control STEP/AUTO
SCAN DETECT
Autoscan up/down control with 4 steps per second PUSH-UP
B
BUTTON
Pin-selectable zero-scale/midscale preset PU
Low potentiometer mode tempco, 5 ppm/°C ADAPTIVE ZERO- OR MID-
PD DEBOUNCER SCALE PRESET
Low rheostat mode tempco, 35 ppm/°C

04422-0-001
PUSH-DOWN
Digital control compatible BUTTON
Ultralow power, IDD = 0.4 µA typ and 3 µA max PRE GND

Low operating voltage, 2.7 V to 5.5 V

Temperature range, −40°C to +105°C Figure 1.
Compact thin SOT-23-8 (2.9 mm × 3 mm) Pb-free package
The AD5228 can increment or decrement the resistance in
APPLICATIONS discrete steps or in autoscan mode. When the PU or PD button
Mechanical potentiometer and trimmer replacements is pressed briefly (no longer than 0.6 s), the resistance of the
LCD backlight, contrast, and brightness controls AD5228 changes by one step. When the PU or PD button is
Digital volume control held continuously for more than a second, the device activates
Portable device-level adjustments the autoscan mode and changes four resistance steps per
Electronic front panel-level controls second.
Programmable power supply
The AD5228 can also be controlled digitally; its up/down
features simplify microcontroller usage. The AD5228 is available
GENERAL DESCRIPTION in a compact thin SOT-23-8 (TSOT-8) package. The part is
The AD5228 is Analog Devices’ latest 32-step-up/step-down guaranteed to operate over the temperature range of −40°C to
control digital potentiometer emulating mechanical potenti- +105°C.
ometer operation1. Its simple up/down control interface allows
The AD5228’s simple interface, small footprint, and very low
manual control with just two external pushbutton tactile
cost enable it to replace mechanical potentiometers and
switches. The AD5228 is designed with a built-in adaptive
trimmers with typically 3× improved resolution, solid-state
debouncer that ignores invalid bounces due to contact bounce
reliability, and faster adjustment, resulting in considerable cost
commonly found in mechanical switches. The debouncer is
saving in end users’ systems.
adaptive, accommodating a variety of pushbutton tactile
switches that generally have less than 10 ms of bounce time Users who consider EEMEM potentiometers should refer to the
during contact closures. When choosing the switch, the user recommendations in the Applications section.
should consult the timing specification of the switch to ensure
Table 1. Truth Table
its suitability in an AD5228 application.
PU PD Operation1
0 0 RWB Decrement
0 1 RWB Increment
1 0 RWB Decrement
1 1 RWB Does Not Change
1
RWA increments if RWB decrements and vice versa.
1
The terms digital potentiometer and RDAC are used interchangeably.

Rev. B Document Feedback

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AD5228 Data Sheet

TABLE OF CONTENTS
Features .............................................................................................. 1 Terminal Voltage Operation Range ......................................... 13
Applications ....................................................................................... 1 Power-Up and Power-Down Sequences .................................. 14
General Description ......................................................................... 1 Layout and Power Supply Biasing ............................................ 14
Revision History ............................................................................... 2 Applications..................................................................................... 15
Electrical Characteristics ................................................................. 3 Manual Adjustable LED Driver ................................................ 15
Interface Timing Diagrams ......................................................... 4 Adjustable Current Source for LED Driver ............................ 15
Absolute Maximum Ratings............................................................ 5 Adjustable High Power LED Driver ........................................ 15
ESD Caution .................................................................................. 5 Automatic LCD Panel Backlight Control................................ 16
Pin Configuration and Function Descriptions ............................. 6 Audio Amplifier with Volume Control ................................... 16
Typical Performance Characteristics ............................................. 7 Constant Bias with Supply to Retain Resistance Setting ...... 17
Theory of Operation ...................................................................... 11 Outline Dimensions ....................................................................... 18
Programming the Digital Potentiometers ............................... 12 Ordering Guide .......................................................................... 18
Controlling Inputs ...................................................................... 13

REVISION HISTORY
6/15—Rev. A to Rev. B
Changes to Features Section and General Description Section .... 1
Changes to Ordering Guide ........................................................... 18

4/09—Rev. 0 to Rev. A
Changes to Table 2………………………………………………3

4/04—Revision 0: Initial Version

Rev. B | Page 2 of 18
Data Sheet AD5228

ELECTRICAL CHARACTERISTICS
10 kΩ, 50 kΩ, 100 kΩ versions: VDD = 3 V ± 10% or 5 V ± 10%, VA = VDD, VB = 0 V, −40°C < TA < +105°C, unless otherwise noted.

Table 2.
Parameter Symbol Conditions Min Typ1 Max Unit
DC CHARACTERISTICS, RHEOSTAT MODE
Resistor Differential Nonlinearity2 R-DNL RWB, A terminal = no connect −0.5 ±0.05 +0.5 LSB
Resistor Integral Nonlinearity2 R-INL RWB, A terminal = no connect −0.5 ±0.1 +0.5 LSB
3
Nominal Resistor Tolerance ∆RAB/RAB −20 +20 %
4
Resistance Temperature Coefficient (∆RAB/RAB) × 10 /∆T 35 ppm/°C
Wiper Resistance RW VDD = 2.7 V 100 250 Ω
VDD = 2.8 V to 5.5 V 50 200 Ω
DC CHARACTERISTICS, POTENTIOMETER DIVIDER MODE
(Specifications apply to all RDACs)
Resolution N 5 Bits
Integral Nonlinearity3 INL −0.5 ±0.05 +0.5 LSB
Differential Nonlinearity3, 5 DNL −0.5 ±0.05 +0.5 LSB
4
Voltage Divider Temperature Coefficient (∆VW/VW) × 10 /∆T Midscale 5 ppm/°C
Full-Scale Error VWFSE ≥+15 steps from midscale −1 .2 −0.5 0 LSB
Zero-Scale Error VWZSE ≤−16 steps from midscale 0 0.3 0.6 LSB
RESISTOR TERMINALS
Voltage Range6 VA, B, W With respect to GND 0 VDD V
4
Capacitance A, B CA, B f = 1 MHz, measured to GND 140 pF
Capacitance4 W CW f = 1 MHz, measured to GND 150 pF
Common-Mode Leakage ICM V A = VB = V W 1 nA
PU, PD INPUTS
Input High VIH VDD = 5 V 2.4 5.5 V
Input Low VIL VDD = 5 V 0 0.8 V
Input Current II VIN = 0 V or 5 V ±1 μA
Input Capacitance4 CI 5 pF
POWER SUPPLIES
Power Supply Range VDD VDD = 5 V, PU = PD = VDD 2.7 5.5 V
Supply Standby Current IDD_STBY 0.4 3 μA
7
Supply Active Current IDD_ACT VDD = 5 V, PU or PD = 0 V 50 110 μA
7, 8
Power Dissipation PDISS VDD = 5 V 17 μW
Power Supply Sensitivity PSSR VDD = 5 V ± 10% 0.01 0.05 %/%
Footnotes on next page.

Rev. B | Page 3 of 18
AD5228 Data Sheet
Parameter Symbol Conditions Min Typ1 Max Unit
DYNAMIC CHARACTERISTICS 4, 9, 10, 11
Built-in Debounce and Settling Time 12 tDB 6 ms
PU Low Pulse Width tPU 12 ms
PD Low Pulse Width tPD 12 ms
PU High Repetitive Pulse Width tPU_REP 1 μs
PD High Repetitive Pulse Width tPD_REP 1 μs
Autoscan Start Time tAS_START PU or PD = 0 V 0.6 0.8 1.2 s
Autoscan Time tAS PU or PD = 0 V 0.16 0.25 0.38 s
Bandwidth –3 dB BW_10 RAB = 10 kΩ, midscale 460 kHz
BW_50 RAB = 50 kΩ, midscale 100 kHz
BW_100 RAB = 100 kΩ, midscale 50 kHz
Total Harmonic Distortion THD VA = 1 V rms, RAB = 10 kΩ, 0.05 %
VB = 0 V dc, f = 1 kHz
Resistor Noise Voltage eN_WB RWB = 5 kΩ, f = 1 kHz 14 nV/√Hz
1
Typicals represent average readings at 25°C, VDD = 5 V.
2
Resistor position nonlinearity error, R-INL, is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic.
3
INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. VA = VDD and VB = 0 V.
4
Guaranteed by design and not subject to production test.
5
DNL specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions.
6
Resistor Terminals A, B, and W have no limitations on polarity with respect to each other.
7 PU
and PD have 100 kΩ internal pull-up resistors, IDD_ACT = VDD/100 kΩ + IOSC (internal oscillator operating current) when PU or PD is connected to ground.
8
PDISS is calculated based on IDD_STBY × VDD only. IDD_ACT duration should be short. Users should not hold PU or PD pin to ground longer than necessary to elevate power
dissipation.
9
Bandwidth, noise, and settling time are dependent on the terminal resistance value chosen. The lowest R value results in the fastest settling time and highest
bandwidth. The highest R value results in the minimum overall power consumption.
10
All dynamic characteristics use VDD = 5 V.
11
Note that all input control voltages are specified with tR = tF = 1 ns (10% to 90% of VDD) and timed from a voltage level of 1.6 V. Switching characteristics are measured
using VDD = 5 V.
12
The debouncer keeps monitoring the logic-low level once PU is connected to ground. Once the signal lasts longer than 11 ms, the debouncer assumes the last
bounce is met and allows the AD5228 to increment by one step. If the PU signal remains at low and reaches tAS_START, the AD5528 increments again, see Figure 7. Similar
characteristics apply to PD operation.

INTERFACE TIMING DIAGRAMS

tPD
tPU
PU tPU_REP PU tPD_REP

tDB
04422-0-004

tDB

04422-0-006
RWB RWB

Figure 2. Increment RWB in Discrete Steps

Figure 4. Decrement RWB in Discrete Steps

PU PD

tAS_START
tAS_START tAS
tDB
04422-0-005

04422-0-007

tAS
RWB tDB RWB

Figure 3. Increment RWB in Autoscan Mode Figure 5. Decrement RWB in Autoscan Mode

Rev. B | Page 4 of 18
Data Sheet AD5228

ABSOLUTE MAXIMUM RATINGS

Table 3. Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
Parameter Rating
stress rating only; functional operation of the product at these
VDD to GND −0.3 V, +7 V
or any other conditions above those indicated in the operational
VA, VB, VW to GND 0 V, VDD
section of this specification is not implied. Operation beyond
PU, PD, PRE Voltage to GND 0 V, VDD
the maximum operating conditions for extended periods may
Maximum Current
affect product reliability.
IWB, IWA Pulsed ±20 mA
IWB Continuous (RWB ≤ 5 kΩ, A open)1 ±1 mA
IWA Continuous (RWA ≤ 5 kΩ, B open)1 ±1 mA ESD CAUTION
IAB Continuous ±500 μA/±100 μA/
(RAB = 10 kΩ/50 kΩ/100 kΩ)1 ±50 μA
Operating Temperature Range −40°C to +105°C
Maximum Junction Temperature 150°C
(TJmax)
Storage Temperature −65°C to +150°C
Lead Temperature 245°C
(Soldering, 10 s – 30 s)
Thermal Resistance2 θJA 230°C/W
1
Maximum terminal current is bounded by the maximum applied voltage
across any two of the A, B, and W terminals at a given resistance, the
maximum current handling of the switches, and the maximum power
dissipation of the package. VDD = 5 V.
2
Package power dissipation = (TJmax – TA) / θJA.

Rev. B | Page 5 of 18
AD5228 Data Sheet

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

PU 1 8 VDD
PD 2 7 PRE
AD5228
A 3 B

04422-0-003
6

GND 4 5 W

Figure 6. SOT-23-8 Pin Configuration

Table 4. Pin Function Descriptions

Pin No. Mnemonic Description
1 PU Push-Up Pin.
Connect to the external pushbutton. Active low. A 100 kΩ pull-up resistor is connected to VDD.
2 PD Push-Down Pin.
Connect to the external pushbutton. Active low. A 100 kΩ pull-up resistor is connected to VDD.
3 A Resistor Terminal A. GND ≤VA ≤ VDD.
4 GND Common Ground.
5 W Wiper Terminal W. GND ≤ VW ≤ VDD.
6 B Resistor Terminal B. GND ≤ VB ≤ VDD.
7 PRE Power-On Preset. Output = midscale if PRE = GND; output = zero scale if PRE = VDD. Do not let the PRE pin float.
No pull-up resistor is needed.
8 VDD Positive Power Supply, 2.7 V to 5.5 V.

Rev. B | Page 6 of 18
Data Sheet AD5228

TYPICAL PERFORMANCE CHARACTERISTICS

0.10 0.10
TA = 25C –40C
0.08 0.08 +25C
+85C
+105C
0.06 0.06

RHEOSTAT MODE DNL (LSB)

VDD = 5.5V
RHEOSTAT MODE INL (LSB)

5.5V
0.04 0.04
2.7V
0.02 0.02

0 0

–0.02 –0.02

–0.04 –0.04

–0.06 –0.06

04422-0-008

04422-0-011
–0.08 –0.08

–0.10 –0.10
0 4 8 12 16 20 24 28 32 0 4 8 12 16 20 24 28 32
CODE (Decimal) CODE (Decimal)

Figure 7. R-INL vs. Code vs. Supply Voltages Figure 10. R-DNL vs. Code vs. Temperature, VDD = 5 V

0.10 0.10
–40C TA = 25C
0.08 +25C 0.08
+85C
+105C POTENTIOMETER MODE INL (LSB)
0.06 0.06
VDD = 5.5V
RHEOSTAT MODE INL (LSB)

2.7V
0.04 0.04

0.02 0.02
5.5V
0 0

–0.02 –0.02

–0.04 –0.04

–0.06 –0.06
04422-0-009

04422-0-012
–0.08 –0.08

–0.10 –0.10
0 4 8 12 16 20 24 28 32 0 4 8 12 16 20 24 28 32
CODE (Decimal) CODE (Decimal)

Figure 8. R-INL vs. Code vs. Temperature, VDD = 5 V Figure 11. INL vs. Code vs. Supply Voltages

0.10 0.10
TA = 25C –40C
0.08 0.08 +25C
+85C
POTENTIOMETER MODE INL (LSB)

+105C
0.06 0.06
RHEOSTAT MODE DNL (LSB)

VDD = 5.5V
0.04 0.04
2.7V 5.5V
0.02 0.02

0 0

–0.02 –0.02

–0.04 –0.04

–0.06 –0.06
04422-0-010

04422-0-013

–0.08 –0.08

–0.10 –0.10
0 4 8 12 16 20 24 28 32 0 4 8 12 16 20 24 28 32
CODE (Decimal) CODE (Decimal)

Figure 9. R-DNL vs. Code vs. Supply Voltages Figure 12. INL vs. Code, VDD = 5 V

Rev. B | Page 7 of 18
AD5228 Data Sheet
0.10 0.50
TA = 25C
0.08 0.45
POTENTIOMETER MODE DNL (LSB)

0.06 0.40

0.04 0.35 VDD = 2.7V

5.5V
0.02 0.30

ZSE (LSB)
0 0.25
VDD = 5.5V
–0.02 0.20

–0.04 0.15

–0.06 0.10
2.7V

04422-0-014

04422-0-017
–0.08 0.05

–0.10 0
0 4 8 12 16 20 24 28 32 –40 –20 0 20 40 60 80 100
CODE (Decimal) TEMPERATURE (C)

Figure 13. DNL vs. Code vs. Supply Voltages Figure 16. Zero-Scale Error vs. Temperature

0.10 1
–40C VDD = 5.5V
0.08 +25C IDD_ACT = 50A TYP
+85C
POTENTIOMETER MODE DNL (LSB)

+105C SUPPLY STANDBY CURRENT (A)

0.06
VDD = 5.5V
0.04

0.02

–0.02

–0.04

–0.06
04422-0-015

04422-0-018
–0.08

–0.10 0.1
0 4 8 12 16 20 24 28 32 –40 –20 0 20 40 60 80 100
CODE (Decimal) TEMPERATURE (C)

Figure 14. DNL vs. Code, VDD = 5 V Figure 17. Supply Current vs. Temperature

–0.50 120

VDD = 5.5V
–0.55 RAB = 100k
100
NOMINAL RESISTANCE RAB (k)

–0.60

80
–0.65
FSE (LSB)

VDD = 5.5V
–0.70 60
RAB = 50k

–0.75
VDD = 2.7V 40
–0.80

20
04422-0-016

04422-0-019

–0.85 RAB = 10k

–0.90 0
–40 –20 0 20 40 60 80 100 –40 –20 0 20 40 60 80 100
TEMPERATURE (C) TEMPERATURE (C)

Figure 15. Full-Scale Error vs. Temperature Figure 18. Nominal Resistance vs. Temperature

Rev. B | Page 8 of 18
Data Sheet AD5228
120 REF LEVEL /DIV MARKER 469 390.941Hz
0dB 6.0dB MAG (A/R) –8.966dB
6
VDD = 2.7V TA = 25C
100 0 VDD = 5.5V
VA = 50mV rms
16 STEPS
WIPER RESISTANCE, RW ()

–6
80 8 STEPS
–12
4 STEPS
–18

GAIN (dB)
60 2 STEPS
VDD = 5.5V –24
1 STEP
40 –30

–36
20

04422-0-020
–42

04422-0-050
–48
0
–40 –20 0 20 40 60 80 100
–54
TEMPERATURE (C) 1k 10k 100k 1M
START 1 000.000Hz STOP 1 000 000.000Hz

Figure 19. Wiper Resistance vs. Temperature Figure 22. Gain vs. Frequency vs. Code, RAB = 10 kΩ

150 REF LEVEL /DIV MARKER 97 525.233Hz

10k 0dB 6.0dB MAG (A/R) –9.089dB
RHEOSTAT MODE TEMPCO, RWB/T (ppm/C)

50k 6
TA = 25C
100k
120 0 VDD = 5.5V
VDD = 5.5V VA = 50mV rms
A = OPEN 16 STEPS
–6
90 8 STEPS
–12
4 STEPS
–18
GAIN (dB)

60
2 STEPS
–24
1 STEP
30 –30

–36
0
04422-0-021

–42

04422-0-051
–48
–30
0 4 8 12 16 20 24 28 32
–54
CODE (Decimal) 1k 10k 100k 1M
START 1 000.000Hz STOP 1 000 000.000Hz

Figure 20. Rheostat Mode Tempco ΔRWB/ΔT vs. Code

Figure 23. Gain vs. Frequency vs. Code, RAB = 50 kΩ

REF LEVEL /DIV MARKER 51 404.427Hz

20 0dB 6.0dB MAG (A/R) –9.123dB
10k 6
POTENTIOMETER MODE TEMPCO, VWB/T (ppm/C)

50k TA = 25C
15 100k VDD = 5.5V
0
VDD = VA = 5.5V VA = 50mV rms
16 STEPS
10 VB = 0V –6
8 STEPS
–12
5
4 STEPS
–18
GAIN (dB)

0 2 STEPS
–24
–5 1 STEP
–30

–10 –36

–42
04422-0-022

–15
04422-0-052

–48
–20
0 4 8 12 16 20 24 28 32 –54
CODE (Decimal) 1k 10k 100k 1M
START 1 000.000Hz STOP 1 000 000.000Hz

Figure 21. Potentiometer Mode Tempco ΔVWB/ΔT vs. Code Figure 24. Gain vs. Frequency vs. Code, RAB = 100 kΩ

Rev. B | Page 9 of 18
AD5228 Data Sheet
0
STEP = MIDSCALE, VA = VDD, VB = 0V

PU
1

–20
PSRR (dB)

VDD = 5V DC 10% p-p AC

VW

VDD = 3V DC 10% p-p AC

–40 VDD = 5V
VA = 5V
VB = 0V

04422-0-029
2

04422-0-026
–60 CH1 5.00V CH2 200mV M2.00ms A CH1 2.80V
100 1k 10k 100k 1M
T 800.000ms
FREQUENCY (Hz)

Figure 25. PSRR Figure 28. Autoscan Increment

1.2
: 8.32ms : 4.00mV VA = OPEN
@: 8.24ms @: 378mV TA = 25C
1.0
PU THEORETICAL IWB_MAX (mA)
1
RAB = 10k
0.8

0.6
RAB = 50k
VW

0.4
VDD = 5V
VA = 5V
VB = 0V 0.2

04422-0-030
RAB = 100k
04422-0-027

2 0
0 4 8 12 16 20 24 28 32
CH1 5.00V CH2 100mV M2.00ms A CH1 3.00V
CODE (Decimal)
T 3.92000ms

Figure 29. Maximum IWB vs. Code

Figure 26. Basic Increment

PU
1

VW

VDD = 5V
VA = 5V
2 VB = 0V
04422-0-028

CH1 5.00V CH2 100mV M2.00ms A CH1 2.60V

T 59.8000ms

Figure 27. Repetitive Increment

Rev. B | Page 10 of 18
Data Sheet AD5228

THEORY OF OPERATION
The AD5228 is a 32-position manual up/down digitally con-
trolled potentiometer with selectable power-on preset. The
AD5228 presets to midscale when the PRE pin is tied to ground
and to zero-scale when PRE is tied to VDD. Floating the PRE pin
is not allowed. The step-up and step-down operations require
the activation of the PU (push-up) and PD (push-down) pins.
These pins have 100 kΩ internal pull-up resistors that the PU
and PD activate at logic low. The common practice is to apply
external pushbuttons (tactile switches) as shown in Figure 30. 1

04422-0-033
UP/DOWN D AD5228
VDD CONTROL E
LOGIC C
O CH1 1.00V M100s A CH1 2.38V
D A T 20.20%
R1 R2 E
Figure 32. Close-Up of Initial Bounces
DISCRETE W
STEP/AUTO
SCAN DETECT B
PUSH-UP
BUTTON
PU
ADAPTIVE ZERO- OR MID-
PD DEBOUNCER SCALE PRESET
04422-0-031

PUSH-DOWN
BUTTON
PRE GND

Figure 30. Typical Pushbutton Interface

Because of the bounce mechanism commonly found in the 1

switches during contact closures, a single pushbutton press

04422-0-034
usually generates numerous bounces during contact closure.
Note that the term pushbutton refers specifically to a
CH1 1.00V M10.0s A CH1 2.38V
pushbutton tactile switch or a similar switch that has 10 ms or T 20.20%
less bounce time during contact closure. Figure 31 shows the Figure 33. Close-Up of Final Bounces
characteristics of one such switch, the KRS-3550 tactile switch. The following paragraphs describes the PU incrementing
Figure 32 and Figure 33 show close ups of the initial bounces
operation. Similar characteristics apply to the PD decrementing
and end bounces, respectively.
operation.
The AD5228 features an adaptive debouncer that monitors the
duration of the logic-low level of PU signal between bounces. If
the PU logic-low level signal duration is shorter than 7 ms, the
debouncer ignores it as an invalid incrementing command.
Whenever the logic-low level of PU signal lasts longer than
11 ms, the debouncer assumes that the last bounce is met and
therefore increments RWB by one step.
1 Repeatedly pressing the PU button for fast adjustment without
missing steps is allowed, provided that each press is not shorter
04422-0-032

than tPU, which is 12 ms (see Figure 2). As a point of reference,

an advanced video game player can press a pushbutton switch
CH1 1.00V M40.0ms A CH1 2.38V
T 20.40% in 40 ms.
Figure 31. Typical Tactile Switch Characteristics

Rev. B | Page 11 of 18
AD5228 Data Sheet
If the PU button is held for longer than 1 second, continuously The end-to-end resistance, RAB, has 32 contact points accessed
holding it activates autoscan mode such that the AD5228 by the wiper terminal, plus the B terminal contact if RWB is used.
increments by four RWB steps per second (see Figure 3). Pushing the PU pin discretely increments RWB by one step. The
Whenever the maximum RWB (= RAB) is reached, RWB stops total resistance becomes RS + RW as shown in Figure 34. The
incrementing regardless of the state of the PU pin. Any continu- change of RWB can be determined by the number of discrete PU
ous holding of the PU pin to logic-low simply elevates the supply executions provided that its maximum setting is not reached
during operation. ∆RWB can, therefore, be approximated as
current.
 R 
When both PU and PD buttons are pressed, RWB decrements RWB   PU AB  RW  (1)
 32 
until it stops at zero scale.
All the preceding descriptions apply to PD operation. Due to  R 
RWB   PD AB  RW  (2)
the tolerance of the internal RC oscillator, all the timing  32 
information given previously is based on the typical values, where:
which can vary ±30%.
PU is the number of push-up executions.
The AD5228 debouncer is carefully designed to handle common
PD is the number of push-down executions.
pushbutton tactile switches. Other switches that have excessive
RAB is the end-to-end resistance.
bounces and duration are not suitable to use in conjunction
RW is the wiper resistance contributed by the on-resistance of
with the AD5228.
the internal switch.
A
Similar to the mechanical potentiometer, the resistance of the
RS
RDAC between the Wiper W and Terminal A also produces a
complementary resistance, RWA. When these terminals are used,
D0
RS
D1 the B terminal can be opened or shorted to W. RWA can also be
D2
D3 RS
approximated if its maximum and minimum settings are not
D4 reached.
W

RDAC RW

 
R 
RWA   32  PU AB  RW 
32
3)
UP/DOWN
CTRL AND
 

 
DECODE
 R 
RWA   32  PD AB  RW  (4)
04422-0-035

RS
B  32 
RS = RAB/32

Figure 34. AD5228 Equivalent RDAC Circuit Note that Equations 1 to 4 do not apply when PU and PD = 0
execution.
PROGRAMMING THE DIGITAL POTENTIOMETERS
Because in the lowest end of the resistor string, a finite wiper
Rheostat Operation
resistance is present, care should be taken to limit the current
If only the W-to-B or W-to-A terminals are used as variable flow between W and B in this state to a maximum pulse current
resistors, the unused terminal can be opened or shorted with W. of no more than 20 mA. Otherwise, degradation or possible
Such operation is called rheostat mode and is shown in Figure 35. destruction of the internal switches can occur.
A A A
The typical distribution of the resistance tolerance from device
W W W to device is process lot dependent, and ±20% tolerance is possible.
04422-0-036

B B B
Figure 35. Rheostat Mode Configuration

Rev. B | Page 12 of 18
Data Sheet AD5228
Potentiometer Mode Operation CONTROLLING INPUTS
If all three terminals are used, the operation is called potenti- All PU and PD inputs are protected with a Zener ESD structure
ometer mode. The most common configuration is the voltage as shown in Figure 37.
divider operation as shown in Figure 36. VDD
VI A
100k
VC DECODE
PU AND
W DEBOUNCE

04422-0-037
CKT

04422-0-038
B

Figure 36. Potentiometer Mode Configuration

Figure 37. Equivalent ESD Protection in PU and PD Pins
The change of VWB is known provided that the AD5228
maximum or minimum scale has not been reached during PU and PD pins are usually connected to pushbutton tactile
operation. If the effect of wiper resistance is ignored, the switches for manual operation, but the AD5228 can also be
transfer functions can be simplified as controlled digitally. It is recommended to add external
MOSFETs or transistors that simplify the logic controls.
PU
VWB   VA (5)
32
UP/DOWN D AD5228
VDD CONTROL E
PD LOGIC C
VWB  VA (6) O
32 R1 R2
D
E
A

Unlike in rheostat mode operation where the absolute tolerance DISCRETE W

STEP/AUTO
is high, potentiometer mode operation yields an almost ratio- SCAN DETECT B
metric function of PU/32 or PD/32 with a relatively small error
PU
contributed by the RW term. The tolerance effect is, therefore, ADAPTIVE ZERO- OR MID-
N1 PD
almost canceled. Although the thin film step resistor RS and DEBOUNCER SCALE PRESET

04422-0-039
UP N2
CMOS switch resistance, RW, have very different temperature
2N7002 DOWN
coefficients, the ratiometric adjustment also reduces the overall PRE GND
2N7002
temperature coefficient effect to 5 ppm/°C except at low value
codes where RW dominates. Figure 38. Digital Control with External MOSFETs

Potentiometer mode operations include an op amp input and TERMINAL VOLTAGE OPERATION RANGE
feedback resistors network and other voltage scaling applications. The AD5228 is designed with internal ESD diodes for
The A, W, and B terminals can be input or output terminals and protection. These diodes also set the voltage boundary of the
have no polarity constraint provided that |VAB|, |VWA|, and |VWB| terminal operating voltages. Positive signals present on
do not exceed VDD-to-GND. Terminal A, B, or W that exceed VDD are clamped by the
forward-biased diode. There is no polarity constraint between
VA, VW, and VB, but they cannot be higher than VDD or lower
than GND.
VDD

B
04422-0-040

GND
Figure 39. Maximum Terminal Voltages Set by VDD and GND

Rev. B | Page 13 of 18
AD5228 Data Sheet
POWER-UP AND POWER-DOWN SEQUENCES LAYOUT AND POWER SUPPLY BIASING
Because of the ESD protection diodes that limit the voltage It is always a good practice to use compact, minimum lead
compliance at Terminals A, B, and W (Figure 39), it is length layout design. The leads to the input should be as direct
important to power on VDD before applying any voltage to as possible with a minimum conductor length. Ground paths
Terminals A, B, and W. Otherwise, the diodes are forward- should have low resistance and low inductance. It is also good
biased such that VDD is powered on unintentionally and can practice to bypass the power supplies with quality capacitors.
affect other parts of the circuit. Similarly, VDD should be Low ESR (equivalent series resistance) 1 μF to 10 μF tantalum
powered down last. The ideal power-on sequence is in the or electrolytic capacitors should be applied at the supplies to
following order: GND, VDD, and VA/B/W. The order of powering minimize any transient disturbance and to filter low frequency
VA, VB, and VW is not important as long as they are powered on ripple. Figure 39 illustrates the basic supply bypassing configu-
after VDD. The states of the PU and PD pins can be logic high or ration for the AD5228.
floating, but they should not be logic low during power-on.
AD5228
VDD VDD
+ C2 C1
10F 0.1F

GND

04422-0-041
Figure 40. Power Supply Bypassing

Rev. B | Page 14 of 18
Data Sheet AD5228

APPLICATIONS
MANUAL ADJUSTABLE LED DRIVER ADJUSTABLE HIGH POWER LED DRIVER
The AD5228 can be used in many electronics-level adjustments
The previous circuit works well for a single LED. Figure 43
such as LED drivers for LCD panel backlight controls. Figure 41
shows a circuit that can drive three to four high power LEDs.
shows a manually adjustable LED driver. The AD5228 sets the
The ADP1610 is an adjustable boost regulator that provides the
voltage across the white LED D1 for the brightness control.
voltage headroom and current for the LEDs. The AD5228 and
Since U2 handles up to 250 mA, a typical white LED with VF of
the op amp form an average gain of 12 feedback network that
3.5 V requires a resistor, R1, to limit U2 current. This circuit is
servos the RSET voltage and the ADP1610 FB pin 1.2 V band gap
simple but not power efficient. The U2 shutdown pin can be
reference voltage. As the loop is set, the voltage across RSET is
toggled with a PWM signal to conserve power.
regulated around 0.1 V and adjusted by the digital
5V 5V C3
0.1F potentiometer.
C1 C2 V+ VRSET (8)
1F 0.1F U1
AD5228 – I LED 
U2 RSET
PUSH-UP VDD AD8591
A
BUTTON W R1
+ SD 6 RSET should be small enough to conserve power but large enough
PU 10k V– WHITE
B LED
D1
to limit maximum LED current. R3 should also be used in par-
PD
PRE GND PWM allel with AD5228 to limit the LED current within an achievable
04422-0-042

PUSH-DOWN
BUTTON
range. A wider current adjustment range is possible by lowering
Figure 41. Low Cost Adjustable LED Driver the R2 to R1 ratio as well as changing R3 accordingly.
ADJUSTABLE CURRENT SOURCE FOR LED DRIVER 5V
Because LED brightness is a function of current rather than of C2
10F R4 IN L1
U2
forward voltage, an adjustable current source is preferred as 13.5k
ADP1610 10F

shown in Figure 42. The load current can be found as the VWB PWM SD SW VOUT
FB D1 C3
of the AD5228 divided by RSET. 1.2V 10F
COMP
VWB (7) RC
I D1  100k
SS RT GND
R SET
CC D2
390pF CSS
The U1 ADP3333ARM-1.5 is a 1.5 V LDO that is lifted above 10nF D3
or lowered below 0 V. When VWB of the AD5228 is at its C8 5V
0.1F D4
minimum, there is no current through D1, so the GND pin of U1
U3
is at –1.5 V if U3 is biased with the dual supplies. As a result, V+
+
some of the U2 low resistance steps have no effect on the output
until the U1 GND pin is lifted above 0 V. When VWB of the AD8541
RSET
AD5228 is at its maximum, VOUT becomes VL + VAB, so the U1 U1 – 0.25
V– U1
supply voltage must be biased with adequate headroom. Similarly, L1–SLF6025-100M1R0 AD5228
D1–MBR0520LT1
PWM signal can be applied at the U1 shutdown pin for power R2 W R1
1.1k B A 100
efficiency.
10k

04422-0-044
5V VIN VOUT
U1 R3
ADP3333 U2 200
ARM-1.5 AD5228
Figure 43. Adjustable Current Source for LEDs in Series
SD 5V VDD
GND
PRE
PUSH-UP B
PWM BUTTON W
PU 10k
A
PD
GND
PUSH-DOWN RSET
BUTTON R1 0.1
418k
5V

V+
–
U3
AD8591
+ VL
04422-0-043

V–
D1
ID

Figure 42. Adjustable Current Source for LED Driver

Rev. B | Page 15 of 18
AD5228 Data Sheet
AUTOMATIC LCD PANEL BACKLIGHT CONTROL AUDIO AMPLIFIER WITH VOLUME CONTROL
With the addition of a photocell sensor, an automatic brightness The AD5228 and SSM2211 can form a 1.5 W audio amplifier
control can be achieved. As shown in Figure 44, the resistance with volume control that has adequate power and quality for
of the photocell changes linearly but inversely with the light portable devices such as PDAs and cell phones. The SSM2211
output. The brighter the light output, the lower the photocell can drive a single speaker differentially between Pins 5 and 8
resistance and vice versa. The AD5228 sets the voltage level that without any output capacitor. The high-pass cutoff frequency is
is gained up by U2 to drive N1 to a desirable brightness. With fH1 = 1/(2 × π × R1 × C1). The SSM2211 can also drive two
the photocell acting as the variable feedback resistor, the change speakers as shown in Figure 45. However, the speakers must be
in the light output changes the R2 resistance, therefore causing configured in single-ended mode, and output coupling capacitors
U2 to drive N1 accordingly to regulate the output. This simple are needed to block the dc current. The output capacitor and
low cost implementation of an LED controller can compensate the speaker load form an additional high-pass cutoff frequency
for the temperature and aging effects typically found in high as fH2 = 1/(2 × π × R5 × C3). As a result, C3 and C4 must be
power LEDs. Similarly, for power efficiency, a PWM signal can large to make the frequency as low as fH1.
be applied at the gate of N2 to switch the LED on and off 2.5V p-p
R2
AUDIO_INPUT
without noticeable effect. U1 10k
5V VDD C5 5V
5V 5V C6 C7
10F 0.1F PRE 0.1F
R2 C3
470F
C1 R1
R1 D1 PUSH-UP A 1F 10k
1k PHOTOCELL BUTTON W 4 6
WHITE – V+ R5
5V LED PU 10k 5 8
5V C3 U2
0.1F B SSM2211
PD
GND 3 V– 8
PUSH-DOWN + C44
C1 C2 V+ 1 470F
1F 0.1F U1 – N1 BUTTON
7
AD5228 R3
U2 4.75k 2
VDD R6
PUSH-UP A AD8531 C2 8
BUTTON W 2N7002 5V 0.1F
+ –
PU 10k V– U3
R3 AD8591
B 10k
PD N2
PRE GND +
PUSH-DOWN

04422-0-046
BUTTON
04422-0-045

PWM R4
10k
2N7002
Figure 45. Audio Amplifier with Volume Control
Figure 44. Automatic LCD Panel Backlight Control

Rev. B | Page 16 of 18
Data Sheet AD5228
VDD
CONSTANT BIAS WITH SUPPLY TO
RETAIN RESISTANCE SETTING SW1 U1 U2 U3

Users who consider EEMEM potentiometers but cannot justify AD5228 VDD VDD
VDD
the additional cost and programming for their designs can +

SYSTEM POWER
BATTERY OR
consider constantly biasing the AD5228 with the supply to COMPONENT X COMPONENT Y
retain the resistance setting as shown in Figure 46. The AD5228
is designed specifically with low power to allow power conser- GND GND GND

04422-0-047
vation even in battery-operated systems. As shown in Figure 47, – GND
a similar low power digital potentiometer is biased with a 3.4 V Figure 46. Constant Bias AD5228 for Resistance Retention
450 mA/hour Li-Ion cell phone battery. The measurement shows
that the device drains negligible power. Constantly biasing the 3.50
TA = 25C
potentiometer is a practical approach because most of the 3.49

portable devices do not require detachable batteries for charging. 3.48

Although the resistance setting of the AD5228 is lost when the

BATTERY VOLTAGE (V)

3.47
battery needs to be replaced, this event occurs so infrequently
3.46
that the inconvenience is minimal for most applications.
3.45

3.44

3.43

3.42

04422-0-048
3.41

3.40
0 2 4 6 8 10 12
DAYS
Figure 47. Battery Consumption Measurement

Rev. B | Page 17 of 18
AD5228 Data Sheet

OUTLINE DIMENSIONS
2.90 BSC

8 7 6 5

1.60 BSC 2.80 BSC

1 2 3 4

PIN 1
INDICATOR
0.65 BSC
1.95
*0.90 BSC
0.87
0.84
*1.00 MAX 0.20
0.08
0.60
8° 0.45
0.10 MAX 0.38
4° 0.30
0.22 SEATING
PLANE 0°

*COMPLIANT TO JEDEC STANDARDS MO-193-BA WITH

THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS.
Figure 48. 8-Lead Small Outline Transistor Package [TSOT]
(UJ-8)
Dimensions shown in millimeters

ORDERING GUIDE
Model1, 2 RAB (kΩ) Temperature Range Package Description Package Option Ordering Quantity Branding
AD5228BUJZ10-RL7 10 −40°C to +105°C 8-Lead TSOT UJ-8 3000 D3K
AD5228BUJZ10-R2 10 −40°C to +105°C 8-Lead TSOT UJ-8 250 D3K
AD5228BUJZ50-RL7 50 −40°C to +105°C 8-Lead TSOT UJ-8 3000 D3L
AD5228BUJZ100-RL7 100 −40°C to +105°C 8-Lead TSOT UJ-8 3000 D3M
AD5228BUJZ100-R2 100 −40°C to +105°C 8-Lead TSOT UJ-8 250 D3M
EVAL-AD5228DBZ 10 Evaluation Board 1
1
The end-to-end resistance RAB is available in 10 kΩ, 50 kΩ, and 100 kΩ. The final three characters of the part number determine the nominal resistance value,
for example,10 kΩ = 10.
2
Z = RoHS Compliant Part.

©2004–2015 Analog Devices, Inc. All rights reserved. Trademarks and

registered trademarks are the property of their respective owners.
D04422-0-6/15(B)

Rev. B | Page 18 of 18