AS1109 - 8 LED Display Driver
AS1109 - 8 LED Display Driver
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Datasheet: AS1109 8-Bit LED Driver with Diagnostics
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A S 110 9
Constant-Current, 8-Bit LED Driver with Diagnostics
registers store global fault status information during load as well as             Low Shutdown Mode Current: 3µA
the detailed temperature/open-LED/shorted-LED diagnostics results.
                                                                                   Fast Serial Interface: up to 50MHz
The AS1109 also features a low-current diagnostic mode to minimize
display flicker during fault testing.                                              Cascaded Configuration
With an operating temperature range from -40 to +125°C the                         Fast Output Drivers Suitable for PWM
AS1109 is also ideal for industrial applications.
                                                                                   16-pin SOIC-150,     16-pin QFN (4x4mm) and 16-pin QSOP-150
The AS1109 is available in a 16-pin SOIC-150, a 16-pin QFN
(4x4mm) and the 16-pin QSOP-150 package.                                               Package
                                                                                  3 Applications
                                                                                  The device is ideal for fixed- or slow-rolling displays using static or
                                                                                  multiplexed LED matrix and dimming functions, large LED matrix
                                                                                  displays, mixed LED display and switch monitoring, displays in
                                                                                  elevators, public transports (underground, trains, buses, taxis,
                                                                                  airplanes, etc.), large displays in stadiums and public areas, price
                                                                                  indicators in retail stores, promotional panels, bar-graph displays,
Figure 1. Main Diagram and Pin Assignments                                        industrial controller displays, white good panels, emergency light
                                                                                  indicators, and traffic signs.
+VLED
                                                                                                             GND 1                         16 VDD
                                                                                                               SDI 2                       15 REXT
                 OUTN0    OUTN1    OUTN2    OUTN3    OUTN4    OUTN5       OUTN6     OUTN7
                                                                                                              CLK 3                        14 SDO
                                                                                                               LD 4                        13 OEN
           SDI
                                              AS1109                                           SDO                         AS1109
                                                                                                            OUTN0 5                        12 OUTN7
                                                                                                            OUTN1 6                        11 OUTN6
                                                                                                            OUTN2 7                        10 OUTN5
                    CLK           LD          OEN            REXT           GND          VDD
                                                                                                            OUTN3 8                         9 OUTN4
4 Pin Assignments
Figure 2. Pin Assignments (Top View)
                     SDI 2
                                                                                   CLK    1                                   12 SDO
                                                   15 REXT
                    CLK 3                          14 SDO
                                                                                    LD    2                                   11 OEN
                     LD 4                          13 OEN                                             AS1109
                OUTN0 5
                                   AS1109          12 OUTN7
                                                                                                      16-pin QFN
                                                                                 OUTN0    3            (4x4mm)                10 OUTN7
                OUTN1 6                            11 OUTN6
                OUTN2 7                            10 OUTN5                      OUTN1    4                                   9   OUTN6
OUTN3 8 9 OUTN4 5 6 7 8
                                                                                                                      OUTN5
                                                                                                              OUTN4
                                                                                                      OUTN3
                                                                                              OUTN2
                                 16-pin QSOP-150
                                 16-pin SOIC-150
         1                  15               GND             Ground
         2                  16               SDI             Serial Data Input
                                                             Serial Data Clock. The rising edge of the CLK signal is used to clock data into and at
         3                   1               CLK             the falling edge out of the AS1109 shift register. In error mode, the rising edge of the CLK
                                                             signal is used to switch error modes.
         4                   2                LD             Serial Data Load. Data is transferred to the data register at the rising edge of this pin.
                                                             Output Current Drivers. These pins are used as LED drivers or for input sense for
       5:12               3:10             OUTN0:7
                                                             diagnostic modes.
                                                             Output Enable. The active-low pin OEN signal can always enable output drivers to sink
                                                             current independent of the AS1109 mode.
        13                  11               OEN
                                                             0 = Output drivers are enabled.
                                                             1 = Output drivers are disabled.
                                                             Serial Data Output. In normal mode SDO is clocked out 8.5 clock cycles after SDI is
                                                             clocked in.
        14                  12               SDO             In global error detection mode this pin indicates the occurrence of a global error.
                                                             0 = Global error mode returned an error.
                                                             1 = No errors.
                                                             External Resistor Connection. This pin connects through the external resistor (REXT)
        15                  13              REXT
                                                             to GND, to setup the load current.
        16                  14               VDD             Positive Supply Voltage
6 Electrical Characteristics
VDD = +3.0V to +5.5V, Typical values measured at VDD = 5V, TAMB = 25°C (unless otherwise specified).
    IAV(LC1)               Device-to-Device Average Output Current              VDS = 0.5V, VDD = Const.,          24.5    25.26    26     mA
                                    from OUTN0 to OUTN7                              REXT = 744Ω
                                               Current Skew                     VDS ≥ 0.5V, VDD = Const.,
   ΔIAV(LC1)                                                                                                               ±0.9     ±3      %
                                            (Between Channels)                       REXT = 744Ω
    IAV(LC2)               Device-to-Device Average Output Current                VDS = 0.6V, VDD > 3.3V,          49.50   50.52   51.55   mA
                                    from OUTN0 to OUTN7                               REXT = 372Ω
                                               Current Skew                     VDS ≥ 0.6V, VDD = Const.,
   ΔIAV(LC2)                                                                                                               ±0.8     ±2      %
                                            (Between Channels)                       REXT = 372Ω
    IAV(LC3)               Device-to-Device Average Output Current                VDS = 0.8V, VDD = 5.0V,           98     101      104    mA
                                    from OUTN0 to OUTN7                               REXT = 186Ω
    %/ΔVDS                                Output Current vs.                      VDS within 1.0 and 3.0V                  ±0.1            %/V
                                       Output Voltage Regulation
    %/ΔVDD                                Output Current vs.                      VDD within 3.0 and 5.0V                   ±1             %/V
                                       Supply Voltage Regulation
     RIN(UP)                                  Pullup Resistance                              OEN                   250     500      800    kΩ
  RIN(DOWN)                                 Pulldown Resistance                              LD                    250     500      800    kΩ
               *
      VTHL                   Open Error Detection Threshold Voltage                       No load                  0.25    0.35    0.45     V
                *
                                                                                    VDD = 3.0V, no load             1.2     1.3     1.4
      VTHH                   Short Error Detection Threshold Voltage                                                                        V
                                                                                    VDD = 5.0V, no load             2.0     2.2     2.4
       TOV1                       Overtemperature Threshold Flag                                                           150             ºC
Note: All limits are guaranteed. The parameters with min and max values are guaranteed with production tests or SQC (Statistical Quality
      Control) methods.
                                                                                                                                         1
  IOUT (mA) .
                                                                                                                                0.5
                                                                                                                                                  REXT = 744Ω;
                                                                                                                                                  VDS = 0.5V
                               10                                                                                                        0
                                                                                                                      .
                                                                                                                           -0.5                                         REXT = 186Ω;
                                                                                                                                                  REXT = 372Ω;          VDS = 0.8V
                                                                                                                                                  VDS = 0.6V
                                                                                                                                         -1
-1.5
                                      1                                                                                                  -2
                                       100                      1000                  10000                                                   3         3.5      4       4.5         5          5.5
                                                             REXT (Ohm)                                                                                           VDD (V)
                                          Figure 5. Output Current vs. VDS;                         Figure 6. Output Current vs. VDS;
                                          VDD = 5V, TAMB = 25°C                                     VDD = 5V, TAMB = 25°C
                        160                                                                                                160
                                                                            REXT = 127Ω                                                                                        REXT = 127Ω
                        140                                                                                                140
IOUT (mA) .
                        100                                                                                                100
                                                                            REXT = 186Ω                                                                                        REXT = 186Ω
                               80                                                                                                  80
                                                                            REXT = 251Ω                                                                                        REXT = 251Ω
                               60                                                                                                  60
                                                                           REXT = 372Ω                                                                                         REXT = 372Ω
                               40                                                                                                  40
                                      0                                                                                                  0
                                          0      2      4        6    8    10   12    14                                                      0     0.2    0.4   0.6   0.8     1    1.2    1.4
                                                                 VDS (V)                                                                                          VDS (V)
                                          Figure 7. Relative IOUT Error vs. Temperature             Figure 8. Output Current vs. VDD
                                          VDD = 5V, Iout/Iout@25°C - 1, TAMB = 25°C
                                      1                                                                                     160
  Relative Output Current Error (%)
                                                                                                                                                                                     VDS = 1V
                                              REXT = 372Ω;                                                                  140
                                              VDS = 0.6V
                             0.5                                                                                            120                                                    VDS = 0.9V
                                                                                                      IOUT (mA) .
                                                                                                                                                                                   VDS = 0.7V
                                                                                                                                   60
                                                                                                                                                                                   VDS = 0.6V
                        -0.5                                               REXT = 744Ω;                                            40
                                                                           VDS = 0.5V
                                                                                                                                   20                                              VDS = 0.5V
                                      -1                                                                                                 0
                                        -50       -25        0       25    50    75       100                                                 3         3.5      4       4.5         5          5.5
                                                        Temperature (°C)                                                                                           VDD (V)
8 Detailed Description
The AS1109 is designed to drive up to 8 LEDs through a fast serial interface and 8 constant-current output drivers. Furthermore, the AS1109
provides diagnostics for detecting open- or shorted-LEDs, as well as over-temperature conditions for LED display systems, especially LED traffic
sign applications.
The AS1109 contains an 8-bit shift register and an 8-bit data register, which convert serial input data into parallel output format. At AS1109 output
stages, eight regulated current sinks are designed to provide uniform and constant current with excellent matching between ports for driving
LEDs within a wide range of forward voltage variations. External output current is adjustable from 0.5 to 100mA using an external resistor for
flexibility in controlling the brightness intensity of LEDs. The AS1109 guarantees to endure 15V maximum at the outputs.
The serial interface is capable of operating at a minimum of 30 MHz, satisfying the requirements of high-volume data transmission.
Using a multiplexed input/output technique, the AS1109 adds additional functionality to pins SDO, LD and OEN. These pins provide highly useful
functions (open- and shorted-LED detection, over-temperature detection), thus reducing pin count. Over-temperature detection will work on-the-
run, whereas the open- and shorted-LED detection can be used on-the-run or in low-current diagnostic mode (see page 14).
+VLED
OEN
          LD                                        8-Bit Data
                                                     Register             Detailed
                                                                            Error                                                              Global Error
                                                                          Detection                                                             Detection
SDO
The 8-bit data register will latch the data of the shift register at each rising edge of LD. This data is then used to drive the current generator output
drivers to switch on the corresponding LEDs as OEN goes low.
tW(CLK)
tSU(D) tH(D)
SDO 50%
tP1
tW(L)
LD 50% 50%
tSU(L) tH(L)
tP2
                                                                                                                    tW(OE)
                  OEN                                                                          50%                                          50%
                                                                                                          tP3                               tP3
                                                                                                                          90%              90%
               OUTN0                                                                                     50%                              10%           50%
                                                                                                                            10%
                                                                                                                    tOF                           tOR
                                                                                                                          tSTAG                         tSTAG
7XtSTAG 7XtSTAG
          OEN                                                                                                                                                                  tW(OE)
                                                                                                                                                 tSU(L      tSU(OE)
CLK
tSU(D)
                                            Data Bit    Data Bit    Data Bit     Data Bit       Data Bit    Data Bit        Data Bit       Data Bit
            SDI                                                                                                                                                   Don’t Care
                                               7           6           5            4              3           2               1              0
tH(D)
                                             Old Data    Old Data    Old Data        Old Data    Old Data    Old Data        Old Data       Old Data              Don’t Care
          SDO
                                               Bit 7       Bit 6       Bit 5           Bit 4       Bit 3       Bit 2           Bit 1          Bit 0
tP1
Time = 0 1 2 3 4 5 6 7
CLK
SDI D7 D6 D5 D4 D3 D2 D1 D0
LD
OEN
                                                                                                                                                                                        Off
         OUTN0
                                                                                                                                                                                        On
                                                                                                                                                                                        Off
         OUTN1
                                                                                                                                                                                        On
                                                                                                                                                                                        Off
         OUTN2                                                                                                                                                                          On
         OUTN3                                                                                                                                                                          Off
                                                                                                                                                                                        On
         OUTN4                                                                                                                                                                          Off
                                                                                                                                                                                        On
                                                                                                                                                                                        Off
         OUTN5                                                                                                                                                                          On
                                                                                                                                                                                        Off
         OUTN6                                                                                                                                                                          On
                                                                                                                                                                                        Off
         OUTN7                                                                                                                                                                          On
OEN tTESTING
tGSW(ERROR)
                                                                                                                                                tGSW(ERROR)
            LD            tSU(ERROR)
                                                                            tP(I/O)                            tP(I/O)                tP(I/O)
                                                                              tGSW(ERROR)
           CLK
Note: For a valid result SDI must be 1 for the first device.
If there are multiple AS1109s in a chain, the error flag will be gated through all devices. To get a valid result at the end of the chain, a logic 1 must
be applied to the SDI input of the first device of the chain. If one device produces an error this error will show up after n*tP(I/O) + tSW(ERROR) at
pin SDO of the last device in the chain. This means it is not possible to identify which device in the chain produced the error. Therefore, if a global
error occurs, the detailed error report can be run to identify which AS1109, or LED produced the error.
Note: When no error has occurred, the detailed error report can be skipped, setting LD and subsequently OEN low.
Note: LEDs which are turned off at test time cannot be tested.
Table 6. Open LED Detection Modes
                                                     Effective Output                    Detected Open-LED
          Output Port State                                                                                               Meaning
                                                     Point Conditions                     Error Status Code
                       On                              VDS < VTHL                                 0                     Open Circuit
                       On                              VDS > VTHL                                 1                       Normal
8.5.2        Shorted-LED
The AS1109 shorted-LED detection is based on the comparison between VDS and VTHH. The shortened LED status is acquired at the rising
edge of OEN and stored internally. While detecting shorted-LEDs the output port must be turned on. Shorted-LED detection can be started with
2 clock pulses during error detection mode while the output port is turned on.
For valid results, the voltage at OUTN0:OUTN7 must be lower then VTHH under low-current diagnostic mode operating conditions. This can be
achieved by reducing the VLED voltage or by adding additional diodes, resistors or LED’s.
Note: LEDs which are turned off at test time cannot be tested.
8.5.3        Overtemperature
Thermal protection for the AS1109 is provided by continuously monitoring the device’s core temperature. The overtemperature status is aquired
at the rising edge of OEN and stored internally.
Table 8. Overtemperature Modes
                                                     Effective Output             Detected Overtemperature
          Output Port State                                                                                               Meaning
                                                     Point Conditions                    Status Code
                 Don’t Care                         Temperature > TOV1                        0                  Overtemperature Condition
                 Don’t Care                         Temperature < TOV1                        1                          Normal
          OEN
                                                                        tH(L)
                                      tGSW(ERROR)
LD
                                       t(SU)ERROR                      tP4
           CLK
                                                                                                                                                 Don’t
            SDI                                                              DBit7     DBit6   DBit5   DBit4   DBit3   DBit2   DBit1   DBit0
                                                                                                                                                 Care
                                                                                                  New Data Input
                                                     TFLAG                                                                                       Don’t
          SDO                                                                                          Undefined                        TBit0
                                                                                                                                                 Care
OEN
                                             tTESTING
                                                                                 tH(L)
LD tSU(ERROR)
                                                   tGSW(ERROR)                   tP4
                                                               tGSW(ERROR)
        CLK
                                            tGSW(ERROR)
                                                                                                                                                                      Don’t
         SDI                                                                           DBit7      DBit6    DBit5    DBit4    DBit3    DBit2    DBit1    DBit0
                                                                                                                                                                      Care
                           Acquisition of
                                                           tSW(ERROR)
                           Error Status
                                                                                                                                                                      Don’t
       SDO                                       TFlag                   OFlag            OBit7    OBit6    OBit5    OBit4    OBit3    OBit2    OBit1    OBit0
                                                                                                                                                                      Care
                                                    tP4                                              Open Error Report Output                                   tP1
  For detailed timing information see Timing Diagrams on page 8.
Comparing this report with the input data indicates that IC2 is the device with two open LEDs at position 4 and 5 and IC4 with an open LED at
second position. For such a test it is recommended to enter low-current diagnostic mode first (see Low-Current Diagnostic Mode on page 14) to
reduce onscreen flickering.
OEN
tTESTING
LD tSU(ERROR) tH(L)
tGSW(ERROR) tP4
CLK tGSW(ERROR)
                                            tGSW(ERROR)
                                                                                                                                                                            Don’t
                     Acquisition of Error
                                                                   tSW(ERROR)
                                                                                                                        New Data Input
                                                                                                                                                                            Don’t
    SDO                                            FLAG OFLAG
                                                 TTFLAG                    SFLAG               SBit7    SBit6    SBit5     SBit4    SBit3    SBit2    SBit1    SBit0
                                                                                                                                                                            Care
Showing IC1 as the device with two shorted LEDs at position 6 and 7, and IC4 with one shorted LED at position 4.
Note: In an actual report there are no spaces in the output. LEDs turned off during test time cannot be tested.
Low-current diagnostic mode can be initiated via 3 clock pulses during error-detection mode. After the falling edge of LD, a test pattern displaying
all 1s can be written to the shift register which will be used for the next error-detection test.
On the next falling edge of OEN, current is reduced to ILC. With the next rising edge of OEN the current will immediately increase to normal
levels and the detailed error report can be read out entering error-detection mode.
                                                               tSU(ERROR)                                 tH(L)
                                                     LD
CLK
tGSW(ERROR) tGSW(ERROR)
                                                                   tSW(ERROR)
                                                    SDI
                                                                                                                      Re-entering Error Detection
                                                                                                                                Mode
Note: In shutdown mode the supply current drops down to typically 3µA.
OEN
LD tSU(ERROR)
CLK
                                                                                                                            1 = Wakeup
                  SDI
                                                                                                                            0 = Shutdown
                                                                                                                            1 = Wakeup
                 SDO                                          TFLAG              OFLAG                 SFLAG
                                                                                                                            0 = Shutdown
tP4 tSU(D)
9 Application Information
9.1 Error Detection
The AS1109 features two types of error detection. The error detection can be used on-the-fly, for active LEDs, without any delay, or by entering
into low-current diagnosis mode.
Figure 20. Normal Operation with Error Detection During Operation – 128 Cascaded AS1109s
                                T/O or S Error Code Data0                                      T/O or S Error Code                                       T/O or S Error Code
           SDO                                                             GEF                                                        GEF
                                          Data0                                                       Data1                                                     Data2
                                                                                    Falling Edge of LD; Error Register is copied              Falling Edge of LD; Error Register is copied
             LD                                                                     into Shift Register                                       into Shift Register
Current ≤ 100mA
Figure 21. Low-Current Diagnosis Mode with Internal All 1s Test Pattern – 128 Cascaded AS1109s
                                                                                                              O or S Error Code of
           SDO                                                                           GEF                                                     GEF            Temperature Error Code
                                                                                                               All 1s Test Patern
                                                            3x Clocks Low-      Clock for Error Mode
                                                             Current Mode               1x/2x
           CLK                                                                                                        1024x                                              1024x
                                                                              ≤ 0.8mA
                                                                                                                                                       GEF = Global Error Flag
Low-current diagnosis mode is started with 3 clock pulses during error detection mode. After the three pulses of CLK, a pulse of LD loads the
internal all 1s test pattern. Then OEN should be enabled for 2µs for testing. With the rising edge of OEN the test of the LEDs is stopped and
while LD is high the desired error mode can be selected with the corresponding clock pulses.
With the next data input the detailed error code will be clocked out at SDO.
Figure 22. Low-Current Diagnosis Mode with External Test Pattern – 128 Cascaded AS1109s
      Current
                                             ≤ 100mA                                                                                      ≤ 100mA
                                                                          ≤ 0.8mA
                                                                                                                                                          GEF = Global Error Flag
           SDI
                             SDI             AS1109 #1           SDO    SDI       AS1109 #2            SDO            SDI      AS1109 #n-1        SDO
      CLK
        LD
OEN
 In the saturation region, the characteristics curve of the output stage is flat               (see Figure 5 on page 6). Thus, the output current can be kept
       constant regardless of the variations of LED forward voltages (VF).
Note: Resistors or zener diodes can be used as a voltage reducer as shown in Figure 24.
Figure 24. Voltage Reducer using Resistor (Left) and Zener Diode (Right)
                      VLED
                                                          }   VDROP
                                                                                                           VDROP   {                  VLED
                                                                                                                   VF           VDS
                                VF                            VDS
                                                                                                                                 AS1109
                                                               AS1109
                                  AS1109B
                                  YYWWRZZ
Marking: YYWWRZZ.
                          YY                                             WW                                R                               ZZ
    Last two digits of the current year                           Manufacturing Week               Plant identifier                 Traceability code
                                                  AS1109B
                                                  YYWWRZZ
Marking: YYWWRZZ.
                          YY                                             WW                               R                             ZZ
    Last two digits of the current year                           Manufacturing Week               Plant identifier              Traceability code
                                                             AS
                                                             1109B
                                                             YYWW
                                                             QZZ
Marking: YYWWQZZ.
                          YY                                             WW                               Q                            ZZ
    Last two digits of the current year                           Manufacturing Week               Plant identifier             Traceability code
11 Ordering Information
The device is available as the standard products shown in Table 9.
Copyrights
Copyright © 1997-2012, ams AG, Tobelbaderstrasse 30, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®. All rights
reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the
copyright owner.
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warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described
devices from patent infringement. ams AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior
to designing this product into a system, it is necessary to check with ams AG for current information. This product is intended for use in normal
commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability
applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing
by ams AG for each application. For shipments of less than 100 parts the manufacturing flow might show deviations from the standard
production flow, such as test flow or test location.
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Tobelbaderstrasse 30
A-8141 Unterpremstaetten, Austria
Tel       : +43 (0) 3136 500 0
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