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Theory / B. Tech. / CSE / SEM - III / Code – CS 303 / 2017-18
Paper Name: Computer Organization
Full Marks: 75 Time Allotted: 3 hours
The figures in the margin indicate full marks. Candidates are required to give their answers in their own words as far as practicable.
GROUP – A
[MCQ Type Questions][Compulsory]
1. Choose the correct alternative of the following questions. Answer all questions. 10 x 1 = 10
i) The number of AND gates and number of full adders required in 4 X 4 array multiplier are
a) 4 and 4, respectively b) 4 and 16, respectively
c) 16 and 16, respectively d) 16 and 12, respectively
ii) The minimum number of additions and subtraction are required for which of the following
multiplier numbers in Booth’s algorithm?
a) 01001111 b) 00001111
c) 01111000 d) 01010101
iii) How many memory chips are required to implement 32K X 16 RAM using 8K X 8 RAM chip
a) 4 b) 16
c) 8 d) 10
iv) A two bit parallel adder can be implemented using
a) One full adder and one half adder b) Two half adders
c) Two full adders d) Both (a) and (c)
v) The basic principle of von Neumann computer is
a) storing both program and data in the same memory
b) storing program and data in separate memory
c) using large number of general purpose registers
d) using parallel processing
vi) How many operations (addition/subtraction) are involved for a quotient 10001 of a
restoring division?
a) 5 b) 6
c) 7 d) 8
vii) In normalized floating point numbers, the most significant bit in mantissa part should not be
a) 0 b) 1
c) 2 d) None of these
viii) When signed number are used in binary arithmetic then which one of the following number is
used to represent zero
a) 1 compliment number b) 2’s compliment number
c) signed number d) none of these
ix) A Priority Interrupts may be accompanied by
a) Polling b) Daisy chaining
c) Parallel methods of priority interrupts d) all of the above
x) Micro Instruction are kept in
a) Main memory b) control memory
c) Cache Memory d) None of these
CS 303 Computer Organization CSE SEM III PAGE 1 OF 2
GROUP – B
[Short Answer Type Questions]
Answer any four of the following
4 x 5 = 20
2. What are the differences between serial adder and parallel adder? Compare carry look-ahead
adder with ripple carry adder. [3+2]
3. What is meant by “instruction set of a machine”? Explain Von-Neumann machine. [2+3]
4. Draw a block diagram for 2 K X 8 memory system using 512 X 8 memory chips. [5]
-3
5. What are the differences between register and cache? Represent the number 5125 * 10 in IEEE
754 standard single precision format representation. [2+3]
6. Compare and contrast RISC and CISC architecture in brief. [5]
7. What are the advantages of microprogramming control over hardwired control? [5]
GROUP – C
[Long Answer Type Questions]
Answer any three of the following
3 x 15 = 45
8. a) Discuss the 3 X 3 array multiplication method with diagram.
b) Apply Booth’s algorithm to multiply (-11)10 and (+13)10 using 5 bits registers.
c) Write different phases of micro-operation of ADD operation. [5+6+4]
9. a) Define speed-up of a k-stage linear-pipeline processor over an equivalent non-pipeline
processor.
b) Divide (13)10 by (5)10 using restoring division method.
c) Write the assembly language procedures using 0, 1, 2 and 3-address instructions to implement
the instruction: X= (A+ B)/(B-C) [3+6+6]
10. a)Explain different type of DMA Controller and how they differ in their functioning ?
b) How does polling work?
c) Draw the timing diagram of memory read operation? [8+2+5]
11. a) A computer has 512 B cache memory and 2 KB main memory. If the block size is 16 bytes,
then find out the subfields for
(i) direct mapped cache
(ii) associative cache
(iii) 4-way set associative cache.
b) What is forbidden latency? Explain different types of pipelining hazard.
c) Why carry look-ahead adders (CLA) is called faster parallel adders? Explain. [6+(1+3)+5]
12. a) An instruction at address 021 in the basic computer has I=0, an operation code of the ADD
instruction, and an address part equal to 083 ( all numbers are in hexadecimal). The memory word
at address 083 contains the operand B8F2 and the content of AC is A937. Go over the instruction
cycle and determine the contents of following registers at the end of the execute phase: PC, AR,
DR, AC, E and IR.
b) Compare horizontal micro-instruction and vertical micro-instruction.
c) Compare hardware control unit and micro-program control unit. [6+5+4]
13. Write short notes on any three of the following: [3×5=15]
a) Content Addressable Memory
b) BCD adder
c) Memory Hierarchy
d) Direct Addressing Mode.
e) DMA
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