MIC50398/50399 Micrel
MIC50398/MIC50399
Six Decade Counter / Display Decoder
Not Recommended for New Designs
General Description Features
The MIC50398/9 is an ion-implanted, P-channel MOS • Single power supply
six-decade synchronous up/down-counter/display driver • Schmitt-Trigger on the count-input
with storage latches. The counter can be loaded • Six decades of synchronous up/down counting
digit-by-digit with BCD data. The counter has an • Look-ahead carry or borrow
asynchronous-clear function. • Loadable counter
• Multiplexed seven-segment outputs MIC50398N
Scanning is controlled by the scan oscillator input which is • Multiplexed BCD outputs, MIC50399N
self-oscillating or can be driven by an external signal. The • Internal scan oscillator
contents of the counter can be transferred into the 6-digit
latch which is then multiplexed from MSD to LSD in BCD or
7-segment format to the output. These devices are intended
to interface directly with the standard CMOS logic families.
Pin Connection
V SS 1 28 UP/DOWN V SS 1 28 UP/DOWN
SET 2 27 CARRY SET 2 27 ZERO
a 3 26 COUNT INHIBIT NC 3 26 CARRY
b 4 25 COUNT INPUT NC 4 25 COUNT INHIBIT
c 5 24 LOAD COUNTER A 5 24 COUNT INPUT
SEGMENTS d 6 23 D 6 B 6 23 LOAD COUNTER
BCD
e 7 22 D 5 OUTPUT C 7 22 D 6
MIC50398CN MIC50399CN
f 8 21 D 4 D 8 21 D 5
DIGIT
g 9 20 D 3 STROBES STORE 9 20 D 4
DIGIT
STORE 10 19 D 2 C D 10 19 D 3 STROBES
C D 11 18 D 1 COUNTER C C 11 18 D 2
BCD
COUNTER C C 12 17 V DD INPUTS C B 12 17 D 1
BCD
INPUTS C B 13 16 SCAN C A 13 16 V DD
C A 14 15 CLEAR CLEAR 14 15 SCAN
Ordering Information Segment Identification
Part Number Temp. Range Package a
MIC50398CN 0°C to 70°C 28-pin Plastic DIP f g b
MIC50399CN 0°C to 70°C 28-pin Plastic DIP
e c
8-10 August 1998
MIC50398/50399 Micrel
Operations: The carry output goes high with the leading edge of the
count input at the count of 000000 when counting up or at
Six Decade Counter, Latch 999999 when counting down and goes low with the negative
The six decade counter is synchronously incremented or going edge of the same count input. During a load counter
decremented on the positive edge of the count input signal. operation the carry output is inhibited.
A Schmitt trigger on this input provides hysteresis for protec- A count frequency of 1.5 MHz can be achieved if the zero
tion against both a noisy environment and double triggering output and carry output are not used. These outputs do not
due to a slow rising edge at the count input. respond at this frequency due to their output delay illustrated
The count inhibit can be changed in coincidence with on the timing diagram.
the positive transition of the count input. Count inhibit must BCD & Seven Segment Outputs
remain high while the count input is high to inhibit counting.
BCD or seven segment outputs are available. Digit strobes
The counter will increment when up/down input is high (VSS) are decoded internally by a divide by six Johnson counter.
and will decrement when up/down input is low. The up/down This counter scans from MSD to LSD. By bringing the SET
input can be changed 0.75 µs prior to the positive transition input low, this counter will be forced to the MSD decade
of the count input. count. During this time the segment outputs are blanked to
The clear input is asynchronous and will reset all decades to protect against display burn out.
zero when brought high but does not affect the six digit latch BCD outputs are valid for MSD when SET is low. Applying
or the scan counter. VSS to SET allows normal scan to resume. Digit 6 output is
As long as store input is low, data is continuously transferred active (VSS) until the next scan clock pulse brings up digit 5
from the counter to the display. Data in the counter will be output.
latched and displayed when store input is high. Store can be The segment outputs and digit strobes are blanked during
changed in coincidence with the positive transition of the the interdigit blanking time. Typically the interdigit blanking
count input. time is 3 to 10 microseconds when using the internal scan
The counter is loaded digit by digit corresponding to the digit oscillator.
strobe outputs. BCD thumb wheel switches with four diodes BCD output data changes at the beginning of the interdigit
per decade connected between the digit strobe outputs and blanking time. Therefore the BCD output data is valid when
the BCD inputs is one method to supply BCD data for the positive transition of a digit output occurs. BCD outputs
loading the counter decades. are on MIC50399 only.
The load counter pulse must be at VSS 2 µs prior to the Scan Oscillator
positive transition of the digit strobe of the digit to be loaded.
The load counter pulse may be removed after the positive The counters have an internal scan oscillator. The
transition of the digit strobe since the chip internally latches frequency of the scan oscillator is determined by an external
this signal. The BCD data to be loaded must be valid through capacitor between VSS or VDD and scan input. The wave
the negative transition of the digit strobe. form present on the scan oscillator input is triangular in the
self oscillate mode. An external oscillator may also be used
8
Inputs, Outputs to drive the scan input.
The seven segment outputs are open drain capable of In the external drive mode the interdigit blanking time will be
sourcing 10mA average current per segment over one digit the sum of the negative dwell period of the external oscillator
cycle. Segments are on when at VSS. The Carry, Zero, BCD and the normal self oscillate blanking time. (3→10 µs). Dis-
and digit strobe outputs are push pull and are on when at play brightness can be controlled by the duty cycle of the
VSS. All inputs except Counter BCD and SCAN inputs are external scan oscillator.
high impedance CMOS compatible.
Typically, the scan oscillator will oscillate at the following
Two basic outputs originate from the counter: zero output, frequencies with these nominal capacitor values from VSS to
and carry output. Each output goes high on the positive scan input.
(VSS) going edge of the count input under the following
conditions: CIN Min Max
Zero output goes high for one count period when all 820 pF 1.4 kHz 4.8 kHz
decades contain zero. During a load counter operation the
470 pF 2.0 kHz 6.8 kHz
zero output is inhibited. Zero output is on the MIC50399
only. 120 pF 7.0 kHz 20 kHz
August 1998 8-11
MIC50398/50399 Micrel
Functional Diagram
LED DIS
*50399 Only **
**50398 Only
BCD OUT *
7 6
4
7 SEGMENT DECODER
6:1 MUX
6
STORE 6 DIGIT LATCH SCAN COU
COUNT INHIBIT
COUNT
6 DIGIT BCD
UP/DOWN
UP/DOWN COUNTER
CLEAR
8-12 August 1998
MIC50398/50399 Micrel
Absolute Maximum Ratings*
Voltage on Any Terminal Relative to VSS +0.3V to –20V
Operating Temperature Range (Ambient) 0°C to +70°C
Storage Temperature Range (Ambient) –40°C to +100°C
*Operating above absolute maximum ratings may damage the
device.
Maximum Operating Conditions
Symbol Parameter Min Max Units Notes
TA Operating Temperature 0 70 °C
VSS Supply voltage (VDD = 0V) 10 15 V
ISS Supply Current 40 mA 1
BV Break Down Voltage VSS – 26 V MIC50398 only
(Segment only @ 10 µA)
PD Power Dissipation 670 mW 2
Electrical Characteristics
(VDD = 0V, VSS = +10.0V to +15.0, 0°C ≤ TA ≤ 70°C)
Static Operating Conditions
Symbol Parameter Min Max Units Notes
VIL Input Low Voltage, “0” VDD 0.2 VSS V
VIH Input High Voltage, “1” VSS – 1 VSS V 3
VOL Output Voltage “0” @ 30 µA 0.2 VSS V 4
VOH Output Voltage “1” @ 1.5 mA 0.8 VSS V 4
8
IOH Output Current “1”
Digit strobes 3.0 mA 5
Segment outputs 10.0 mA 6
ISCAN Scan Input Pullup Current @ 0 V 5.5 mA
ISCAN Scan Input Pulldown Current @ 15 V 2 40 µA
ISET SET Input Pullup Current @ 0V 5 60 µA
Note 1: ISS with inputs and outputs open at 0°C. 33 mA at 25°C and 28 mA at 70°C. This does not include segment current.
Total power per segment must be limited not to exceed power dissipation of package. (θJA = 100°C/Watt)
Note 2: All outputs loaded.
Note 3: MIN VIH from CA CB CC CD inputs is VSS – 3.5 V. Those inputs have internal pulldown resistors to VDD.
Note 4: This applied to the push pull CMOS compatible outputs. Does not include digit strobes on segment outputs.
Note 5: For VOUT = VSS – 2.0 Volts. Average value over one digit cycle.
Note 6: For VOUT = VSS – 3.0 Volts. Average value over one digit cycle.
August 1998 8-13
MIC50398/50399 Micrel
Timing
COUNT
t UDS t UDS
UP/DOWN
t CIS t CIS
COUNT INHIBIT
t SS
STORE
t PCW t SPW
CLEAR
t CS
COUNT
t OA t OH
ZERO
t CA t CH
CARRY
SCAN
tL
LOAD COUNTER
Loading Counter, Register (1 Digit)
t LS
LOAD COUNTER
tLS 2.0 µs min NOTE: REF. TO POSITIVE
t DV TRANSITION OF DIGIT OUTPUT
BCD DATA INPUT
tDV 2.0 µS min NOTE: REF. TO NEGATIVE
EDGE OF DIGIT OUTPUT
DIGIT OUTPUT 6
DIGIT OUTPUT 5 ETC
COUNT INPUT, CARRY
ZERO OUTPUT INHIBITED
DURING THIS TIME
NOTE:
The inhibit function of the zero or carry outputs does
COUNT INPUT
not end when the Load Counter input goes to a “0”
t OA t OH unless that transition occurs during interdigit
ZERO OUTPUT blanking period at least 2.0 µs prior to a positive
transition of a digit output.
t CA
t CH
CARRY OUTPUT
8-14 August 1998
MIC50398/50399 Micrel
Dynamic Operating Conditions
Symbol Parameter Min Max Units Notes
fCI Count Input Frequency 0 1.5 MHz 7,8
fSI Scan Input Frequency 0 20 kHz
tCPW Count Pulse Width 325 ns 9
tSPW Store Pulse Width 2.0 µs
tSS Store Setup Time 0 µs 10
tCIS Count Inhibit Setup Time 0 µs 10
tUDS Up/Down setup Time –0.75 µs 10
tCPW Clear Pulse Width 2.0 µs 10
tCS Clear Setup Time –0.5 µs 10
tOA Zero Access Time 3.0 µs 10 MIC50399 only
tOH Zero Hold Time 1.5 µs 10 MIC50399 only
tCA Carry Access Time 1.5 µs 10
tCH Carry Hold Time 0.9 µs 11
tL Load Time 1/6 fSI 12
Note 7: Measured at 50% duty cycle.
Note 8: If carry or zero outputs are used, the count frequency will be limited by their respective output times.
Note 9: The count pulse width must be greater than the carry access time when using the carry output.
Note 10: The positive edge of the count input is the t = 0 reference.
Note 11: Measured from negative edge of count input.
Note 12: Time to load one digit.
August 1998 8-15
This datasheet has been downloaded from:
www.DatasheetCatalog.com
Datasheets for electronic components.
