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I2C Final1

The I2C (Inter-Integrated Circuit) protocol, invented by Philips Semiconductors in 1982, allows multiple peripheral digital circuits to communicate using only two wires: SDA for data and SCL for synchronization. It supports various modes of operation with speeds ranging from 100 kbps to 5 Mbps and features multi-master and multi-slave communication. While I2C offers advantages like simplicity and built-in addressing, it also has disadvantages such as slower speeds and limitations in distance and communication direction.

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0% found this document useful (0 votes)
42 views11 pages

I2C Final1

The I2C (Inter-Integrated Circuit) protocol, invented by Philips Semiconductors in 1982, allows multiple peripheral digital circuits to communicate using only two wires: SDA for data and SCL for synchronization. It supports various modes of operation with speeds ranging from 100 kbps to 5 Mbps and features multi-master and multi-slave communication. While I2C offers advantages like simplicity and built-in addressing, it also has disadvantages such as slower speeds and limitations in distance and communication direction.

Uploaded by

umesh2782005
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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I2C

Inter-Integrated Circuit
 Invented by: Philips Semiconductors (now NXP
Semiconductors) in 1982.

There are 5 modes of operations for the i2c they are

 Standard Mode: 100 kbps


 Fast Mode: 400 kbps
 Fast Mode Plus: 1 Mbps
 High-Speed Mode: 3.4 Mbps
 Ultra-Fast Mode: 5 Mbps
I2C (Inter-Integrated Circuit):

 The Inter-Integrated Circuit (I2C) Protocol is a


protocol intended to allow multiple "peripheral"
digital integrated circuits ("chips") to communicate
with one or more "controller" chips, used to connect
low-speed devices like sensors, EEPROMs, and
microcontrollers.

 It uses only 2 wires:


1. SDA (Serial Data Line): For data transfer.
2. SCL (Serial Clock Line): For synchronization.
3. I2c is a synchronous protocol unlike the
UART .
 It supports multi-master and multi-
slave communication.
Packet:

 packet Structure:

o Start Bit: Indicates the beginning of


communication.
o Address Frame: 7-bit or 10-bit slave address
+ 1-bit (read/write).
o ACK/NACK: Acknowledgment bit after each
frame
o Data Frame: 8-bit data.
o ACK/NACK: Acknowledgment bit after each
frame.
o Stop Bit: Indicates the end of communication.
Timing diagram :

Keypoints to be taken care of :

1) In the ideal state sda and scl both will be high to


start first sda will be pulled down and followed by
the scl .
2) The data should be same during the positive level of
scl .
3) The data should be changed only at negative level
of scl .
4) Always master will decide the transaction .
5) If r/w bit is 0 then it indicate master writing the data
into the slave
1 indicates the master reading the data from
the slave.
6) Burst length transmission is possible in the i2c .
For stop condition sda will be pulled up to high when the
scl is high.
Differences :
What Are Pull-Up and Pull-Down Resistors?
1) Pull-Up Resistor:
a. A resistor connected between a signal line and
the positive supply voltage (VCC).
b. Ensures the signal line is at a HIGH (1) state
when no active device is driving it.
2) Pull-Down Resistor:
a. A resistor connected between a signal line
and ground (GND).
b. Ensures the signal line is at a LOW (0) state
when no active device is driving it.
3) Typical Value: 4.7 kΩ to 10 kΩ
4) The resistance values should in control if we increase
the resistance will decrease the raising time and
power consumption , increase the noise.
5) The lower resistance will be increase the raising time
and power consumption so need the balanced
resistance.
Advantages :

 Simplicity and Low Pin Count:


I2C uses only two wires (SDA for data and SCL for
clock) for communication, regardless of the number of
devices on the bus, simplifying hardware design and
reducing wiring complexity.
 Multi-Master, Multi-Slave Architecture:

I2C supports multiple master and slave devices on the


same bus, allowing for flexible and scalable system
designs.
 Built-in Addressing:

Each device on the I2C bus has a unique address,


enabling efficient communication and reducing the need
for complex addressing schemes.
 Error Handling:

I2C incorporates ACK/NACK (Acknowledge/Not


Acknowledge) functionality, allowing for error detection
and correction during data transmission.
 Power Efficiency:

I2C peripherals can be powered down when not in use


without affecting the bus, contributing to overall system
power efficiency.
Disadvantages :
 Slower: I2C is generally slower, especially for
high-speed data transfer.
 Open-drain design: I2C uses open-drain design,
which limits its speed compared to push-pull
designs used in SPI.
 Pull-up resistors: I2C requires pull-up resistors,
which can further limit clock speed and increase
power consumption.
 Short distances: I2C is designed for short distances,
and signal integrity can become problematic over
longer distances.
 Half-duplex communication: I2C is a half-duplex
communication protocol, meaning data can only
flow in one direction at a time.

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