PERGAMON Microelectronics Reliability 39 (1999) 133±137

Research note
Investigation of MOSFET operation in bipolar mode
V.S. Pershenkov *, V.V. Belyakov, S.V. Cherepko, I.N. Shvetzov-Shilovsky,
V.V. Abramov
Microelectronics Department, Moscow Engineering Physics Institute, Kashirskoe shosse 31, Moscow 115409, Russia
Received 16 July 1997; received in revised form 7 July 1998

Abstract

The work is concerned with the properties of conventional MOSFET in bipolar mode of operation. It is shown
that the base current can provide useful information about interface trap density at the Si±SiO2 interface. The new
device characteristics are found promising for use in low-voltage low-power logic circuits. # 1999 Elsevier
Science Ltd. All rights reserved.

1. Introduction not be achieved in a conventional transistor [3]. With a

MOSFET operating in a bipolar mode the appropriate
Years ago it was noticed, that the simple MOSFET gate±substrate voltage provides the control of e€ective
is quite similar to a lateral bipolar junction transistor base doping and brining the base properties close to
(BJT) with a gate upon the base region. Source, drain the intrinsic Si. It results in the increase of source
and substrate terminals of the MOSFET are the emit- region emitting eciency and, at the same time, in the
ter, collector and base of the lateral bipolar transistor, decrease of recombination due to the very little
respectively (Fig. 1). In an integrated circuit a amount of the major carriers in the base. The recombi-
MOSFET can be used in bipolar mode only if the sub- nation is also decreased by pushing di€using carriers
strates of di€erent devices are separated. The sub- to the surface. The same e€ect also decreases noise
strate-source junction must be forward biased to level in the transistor. The practical application of
provide bipolar transistor operation, which is di€erent such high gain bipolar device was suggested in ref. [3].
from the MOSFET mode where this bias should be It was used in a precise current mirror and low-noise
zero or reverse. low-frequency ampli®ers, but the main goal of ref. [3]
The fact that the di€erence between these two was to use the advantages of combining bipolar and
devices resides only in an operation mode has been ®eld-e€ect devices on the same chip in the convention-
used in scienti®c researches. Using the bipolar mode of al CMOS technology.
MOSFET provides the reliable model for some speci®c The progress in BiCMOS technology discarded this
e€ects, including the breakdown of short-channel main advantage of the device under consideration.
transistor [1]. Vice-versa, MOSFET can serve as a However, it can still be very promising from several
model device for the investigation of low-dose-rate points of view. First, the device can be promising for
radiation response of bipolar transistor [2]. the applications in the low voltage logical circuits, due
With respect to conventional lateral BJT the to its ability to operate at extremely low collector
MOSFET used in bipolar mode has an extra terminal, (drain) voltages. Second, its gain can be additionally
the gate. It can be used for the additional control of increased by the combining of bipolar and subthres-
the device, providing the operation modes which can- hold MOSFET mode of operation. Third, it can be
used for physical investigations of MOS structures. It
means that the physical parameters of oxide-semicon-
* Corresponding author. Tel.: 007 095 324 0184; Fax: 007 ductor interface, e.g. interface traps density, can be
095 321 2111; E-mail: pershenkov@d408.micro.mephi.ru. extracted by appropriate processing of device current±

0026-2714/99/$ - see front matter # 1999 Elsevier Science Ltd. All rights reserved.
PII: S 0 0 2 6 - 2 7 1 4 ( 9 8 ) 0 0 1 5 7 - 7
134 V.S. Pershenkov et al. / Microelectronics Reliability 39 (1999) 133±137

Output characteristics of MOSFET in bipolar mode

are a€ected by the speci®c features of n + -i-n + struc-
ture. The contact potential of n + -i junction is 0.3±
0.35 V lower as compared to the conventional n + -p
junctions. That is why collector saturation voltage of
MOSFET in the bipolar mode is low. This saturation
voltage is less than 50 mV, that is 2±4 times lower
than the one for BJT.
The output I±V curve can be derived from the
analysis of output characteristic of conventional
MOSFET in the subthreshold mode. The equation for
drain current of MOSFET leads to:
 V

ÿ jbe
Id 0 1 ÿ e t ; 1†

where Id is drain current; Vds is drain±source voltage;

jt is thermal potential.
Fig. 1. The lateral bipolar npn transistor based on the A logical circuit based on the MOSFET in bipolar
nMOSFET. mode could be able to handle potentials from about
50 mV (logical `0') to about 0.4 V (logical `1'). This
voltage characteristics. It can give additional important makes it possible to design IC powered with as low as
information compared with the values obtained by 0.5 V supply. The presence of additional gate terminal
other approaches. The current work deals with these provides additional ¯exibility in using the device.
three items. The bipolar transistor thus formed has certain draw-
back. The dynamic characteristics are expected to be
poor due to the low currents ¯ow during switching.
2. Analysis However, the device under investigation was not opti-
mised for operation in bipolar mode. A special design
The main feature of the device under consideration may lead to improvement of dynamic characteristics.
resides in the fact that its collector current consists of
the electrons injected by the emitter under the gate. It
can be assumed to constitute only a small part of the 3. Circuitry
emitter current because the lateral surface of the emitter
at the collector side is only a minor part of the total In recent works some circuits using MOS transistor
emitter surface. However, by the proper gate bias the in bipolar mode were presented [3]. One of the very
region under the gate can be depleted or weakly interesting applications is the use of such a structure in
inverted. For injection conditions it corresponds to the digital circuitry. The logical invertor is presented in
emitter±base junction with an extremely low doped base Fig. 2. A couple of complementary MOS transistors is
region. In conventional BJT the decrease of base doping
is limited by the increase of base resistance. In bipolar
mode MOSFET only a very shallow layer of the base is
i-type. Due to the fact that the injection in the i-region
is several orders higher than in the MOSFETs substrate,
one can obtain an operable device.
With the injection level increase, the i-region is
modulated and the gain coecient of the device
decreases. The injection from the bottom part of emit-
ter±base junction increases with the junction forward
bias that also decreases current gain. The reasonable
limit of emitter±base bias is thus found to be about
0.5 V. The devices used in this study were conventional
n- and pMOSFETs.
The high current gain expected for relatively wide
base region can be explained by the fact that the hole
concentration in the i-region is low and, therefore, Fig. 2. Logical invertor based on substrate controlled n- and p-
recombination is negligible. MOS transistors and biasing element (surrounded by dashed line).
 V.S. Pershenkov et al. / Microelectronics Reliability 39 (1999) 133±137 135

biases were chosen to provide Vsup/2 threshold voltage

of invertor and initial currents Ibias n and Ibias p of ap-
proximately 0.1 mA (Vg = 0.4 V for nMOSFET and
Vg = ÿ0.7 V for pMOSFET). The transfer regions of
characteristics are quite sharp and it is evident that
such a structure can be used as a base of logical el-
ements. The supply current for such a structure in sta-
tic condition is not higher than a maximum of Ibias n
and Ibias p. However, the output current can be much
higher during switching and is demonstrated in Fig. 4.
The varying of substrate (base-emitter) bias in the (0±
0.5) V range leads to huge variations (from 100 to
1000 times) in output current. Drain current saturates
at a very low drain voltage which allows one to use
supply voltage as low as to (0.1±0.2) V. An essential
feature of substrate controlled invertor is a low sensi-
tivity to the transistor's parameters variations: 0.2 V
Fig. 3. Transfer characteristics of the invertor for di€erent threshold voltage shift leads to only about 50 mV shift
supply voltages.
of transfer characteristics.
connected serially between `Ground' and ` + Vsup'
terminals. An input signal Vin, is applied to the sub- 4. Interface trap characterisation
strates of transistors, and the output signal Vout, is
measured at the common point of drains as in the The base current of a lateral bipolar transistor can
CMOS invertor. The gates of the invertor's transistors be at least partially attributed to the recombination via
are biased to provide initial conductivity which corre- fast interface traps. The recombination is most ecient
sponds to Ibias n and Ibias p values. The biasing element through the traps with energy levels close to the middle
(marked by a dashed line in Fig. 2) consists of two of the Si bandgap. Therefore, the surface recombina-
halves of `current mirrors', the second half being the tion component of the base current is most sensitive to
transistors of an invertor. One biasing element can the interface trap density in the near-midgap region.
provide gate bias for a number of invertors. The base current of lateral bipolar transistor
Experimental transfer characteristics of the invertor (nMOSFET in bipolar mode) vs gate voltage is pre-
for di€erent supply voltages are shown in Fig. 3. Gate sented in Fig. 5 for irradiated and non irradiated

Fig. 4. Output I±V characteristics of nMOS (a) and pMOS (b) transistors for di€erent substrate biases. Gate voltages are ®tted to
provide 0.1 mA drain current at the zero substrate bias.
136 V.S. Pershenkov et al. / Microelectronics Reliability 39 (1999) 133±137

the surface, ni is intrinsic electron concentration in Si

and vth is thermal velocity. According to Eq. (2) the
most ecient recombination occurs when the electron
and hole concentrations are equal. In terms of electron
and hole quasi-Fermi levels it means, that Si midgap
energy Ei at the surface falls in the middle between Efn
and Efp. In Fig. 5 this occurs when gate voltage is
equal to Vg = ÿ0.5 V. Since the di€erence Efn ÿEi is
known (Ube/2), the value of peak base current can be
obtained from (2):
Efn ÿEi Ei ÿEfp
ni e qjt ni e qjt ÿ n2i
Js ˆ svth Nit Efn ÿEi Ei ÿEfp
ni e qjt ‡ ni e qjt ‡ 2ni
 Vjbe 
svth Nit ni e t ÿ 1
ˆ
2 Vbe
e 2jt ‡ 1
 
Fig. 5. Dependencies of nMOS transistor substrate current at svth Nit ni V2jbe
ˆ e t ÿ1 : 3†
0.4 V substrate bias vs. gate voltage before and after ir- 2
radiation.
The surface recombination current Is then could be
devices. The base±emitter junction bias was kept con- obtained as Js times the gate area S: Is = Js
S.
stant during the measurement. As it can be seen from Provided the peak base current is known, the inter-
the ®gure the base currents have the peaks. These face trap density (Nit) could be expressed from (3). For
peaks indicate maximum surface recombination due to example, from the data shown in Fig. 5 one could esti-
the presence of both electrons and holes in the chan- mate:
nel. Radiation induced shift of peak gate voltage (DVg)   ÿ1
is equal to MOSFET threshold voltage shift due to svth ni V2jbe
Nit ˆ Is S
e t ÿ1 11:1
1012 cmÿ2 ;
oxide trapped charge DVot. The magnitude of the peak 2
is correlated with the number of fast interface traps where s = 2.5
10 ÿ 15cm2 was taken from [7].
introduced during irradiation.
The surface recombination current is reverse pro- 5. Summary and conclusion
portional to the carriers lifetime. This lifetime is corre-
lated with the trap recharge time constant. It means Characteristics of the MOSFET in the bipolar mode
that only the traps with small recharge time constant were investigated. Experiments show that the lateral
will contribute signi®cantly to the surface recombina- bipolar transistor can be used as a low voltage low
tion current. Therefore, the base current of MOSFET power logical element. Certain drawbacks also exist
in bipolar mode can be used to extract information due to the speci®cs of the MOSFET design which is
about fast interface traps with energies close to the Si not optimised for bipolar operation.
midgap. This is di€erent from the interface trap den- The expression for surface recombination current is
sity extracted via subthreshold technique [4] because derived. This current dominates the base current of
the subthreshold technique gives the density of traps MOSFET in bipolar mode. The peak of base current
recharged during measurement time, thus resulting in is correlated with the number of midgap fast interface
the sum of the border traps [5] and fast interface traps. traps at the Si±SiO2 interface, these traps being di€er-
This is also di€erent from the interface trap density ent from that measured by subthreshold and charge-
extracted via charge pumping technique [6] because the pumping techniques.
charge pumping is sensitive to the fast interface traps The logical inverter is proposed utilising substrate
with energy levels over the whole Si bandgap. controlled complementary MOSFETs. The invertor is
The peak value of the base current could be easily experimentally shown to be operable within (0.2±0.4)
expressed in terms of interface traps density (Nit), car- V supply voltage.
riers capture cross-section (s) and base-emitter bias
Vbe. The surface recombination current density can be
estimated in terms of conventional SRH theory: References
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