REF80

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REF80 Temperature-Controlled Buried Zener Reference with 0.05ppm/°C Drift

and < 1ppm Stability
1 Features 3 Description
• 7.6V ultra-precision reference with minimal number The REF80 is a highly integrated ultra-low drift
of external components buried zener precision voltage reference. The REF80
• Ultra-low temperature drift: 0.05ppm/°C combines a precision 7.6V reference with an internal
• Excellent long term stability: 0.3ppm (1k hour to 5k heater to achieve extremely low temperature drift
hour) of 0.05ppm/°C. The integrated heater maintains the
• Integrated heater with temperature stable indicator internal temperature of the die at a constant set
• 1/f noise (0.1Hz to 10Hz) : 0.12ppmpk-pk point. This helps the reference voltage stay constant
• Input Voltage range: 10V to 16.5V irrespective of ambient temperature variations. The
• Heater supply range: 10V to 42V device internal temperature is pre-programmed to
• Hermetically sealed ceramic package (20 pin eliminate design complexities. This allows for fast
LCCC) design cycles, easy bring up and no dependence on
high-cost external precision components.
2 Applications
The REF80 family is available in a 20-pin LCCC
• Parametric measurement unit package. The LCCC package is a hermetically sealed
• Lab and field instrumentation ceramic package that enables ultra-low long-term
• Precision weight scales stability specification of 0ppm (after setteling), critical
• Battery test equipment for applications that demand a long time period
• Digital multimeter without calibration. The package also offers excellent
• Source measurement unit immunity against humidity variation.
• Data acquisition
Device Information
PART NAME PACKAGE (1) BODY SIZE (NOM) (2)
REF80 LCCC (20) 8.89mm × 8.89mm

(1) For all available packages, see the orderable addendum at

the end of the data sheet.
(2) The package size (length × width) is a nominal value and
includes pins, where applicable.

+30 V 10 V 15

5V 1µF 1µF 10
Long Te rm Stability (ppm)

HEATP VDD 5

T-SET 0
10k

7.6V
REF80

REF_Z
OP-STBL
10µF -5
Stable Temp
Indicator
-10
HEATM REF_GND

-15
0 1000 2000 3000 4000 5000
Time (Hours)
Reference Voltage Drift Vs Time
REF80 Circuit Diagram
(With Supply and Passive Requirement)

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
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Table of Contents
1 Features............................................................................1 8.2 Temperature Drift...................................................... 14
2 Applications..................................................................... 1 8.3 Thermal Hysteresis................................................... 14
3 Description.......................................................................1 8.4 Noise Performance................................................... 15
4 Device Comparison Table...............................................3 9 Application and Implementation.................................. 18
5 Pin Configuration and Functions...................................4 9.1 Application Information............................................. 18
6 Specifications.................................................................. 5 9.2 Typical Applications.................................................. 18
6.1 Absolute Maximum Ratings........................................ 5 9.3 Power Supply Recommendation...............................22
6.2 ESD Ratings............................................................... 5 9.4 Layout ...................................................................... 22
6.3 Thermal Information....................................................5 10 Device and Documentation Support..........................23
6.4 Recommended Operating Conditions.........................6 10.1 Documentation Support.......................................... 23
6.5 Electrical Characteristics.............................................6 10.2 Receiving Notification of Documentation Updates..23
6.6 Typical Characteristics................................................ 8 10.3 Support Resources................................................. 23
7 Detailed Description...................................................... 11 10.4 Trademarks............................................................. 23
7.1 Overview................................................................... 11 10.5 Electrostatic Discharge Caution..............................23
7.2 Functional Block Diagram......................................... 11 10.6 Glossary..................................................................23
7.3 Feature Description...................................................11 11 Revision History.......................................................... 23
8 Parameter Measurement Information.......................... 13 12 Mechanical, Packaging, and Orderable
8.1 Long-Term Stability................................................... 13 Information.................................................................... 23

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4 Device Comparison Table

PRODUCT VREF_Z Temperature Range
REF80000B1NAJT 7.6V 0ºC to 70ºC

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5 Pin Configuration and Functions

OP-STBL
T-SET

VDD
NC

NC
3 1 19
REF_Z 4 18 HEATP

REF_Z HEATM
NC REF80 HEATM

NC REF_GND

NC 8 14 REF_GND
9 13

GND
NC
NC
NC

NC

Figure 5-1. NAJ Package

20-Pin LCCC
Top View

Table 5-1. Pin Functions

PIN
TYPE DESCRIPTION
NAME Number
NC 1, 2, 6-12 No Connect No connect pin. Leave this pin floating or connected to GND.
Connect resistor to adjust the heater temperature. Leave the pin
T-SET 3 Input floating to use factory programmed heater set point. Refer Section
7.3.1 for more details.
Reference voltage output. Connect a 10μF to 100μF output
REF_Z 4,5 Output
capacitor to REF_GND for the best performance.
GND 13 Ground This pin must be shorted to REF_GND pin.
REF_GND 14, 15 Ground Reference ground pin.
HEATM 16, 17 Power Heater power supply negative connection.
HEATP 18 Power Heater power supply positive connection.
VDD 19 Power Power supply for buried zener core and buffer.
Active high open drain output. Indicates the internal heater is
OP_STBL 20 Output
stabilized at factory programmed temperature.

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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range, all the voltages ratings are specified with respect to REF_GND pin voltage (unless
otherwise noted) (1)
MIN MAX UNIT
VDD, OP_STBL, –0.3 18 V
T-set, NC –0.3 6 V
REF_Z –0.3 10 V
Voltage
HEATP –0.3 48 V
HEATM –42 0.3 V
HEATP - HEATM 0 42
Output short circuit current ISC 30 mA
Operating temperature range TA –55 125 °C
Storage temperature range Tstg –65 170 °C

(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied. These are stress ratings only and functional operation of the device at these or any other conditions
beyond those specified in the Electrical Characteristics Table is not implied.

6.2 ESD Ratings

VALUE UNIT
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001,
±2000
all pins (1)
V(ESD) Electrostatic discharge V
Charged device model (CDM), per JEDEC specification
±750
JESD22-C101, all pins (2)

(1) JEDEC document JEP155 states that 500V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250V CDM allows safe manufacturing with a standard ESD control process.

6.3 Thermal Information

REF80
NAJ (LCCC)
THERMAL METRIC(1) UNIT
20 PINS
1s0p JEDEC REF8EVM
RθJA Junction-to-ambient thermal resistance 103.6 141.9 °C/W
RθJB Junction-to-board thermal resistance 45.1 55.8 °C/W
ΨJT Junction-to-top characterization parameter 38.3 39.2 °C/W
ΨJB Junction-to-board characterization parameter 45.1 55.8 °C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.

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6.4 Recommended Operating Conditions

over operating free-air temperature range, all the voltages ratings are specified with respect to REF_GND pin voltage
(unless otherwise noted)
MIN NOM MAX UNIT
VDD 10 16.5
REF_Z 0 8
VHET Heater voltage, V(HEATP - HEATM) 10 42
Voltage V
HEATP 0 42
HEATM -42 0
OP_STBL 0 VDD
Current OP_STBL (IOL) 0 5 mA
TA Operating temperature -40 70 °C

6.5 Electrical Characteristics

At VDD = 10V, VHET= 30V, TSET = 115℃, CREF_Z = 10µF, CVDD = 1µF, IL = 0mA, T-SET = Open, OP_STBL is pulled up to
5V through 10kΩ resistor, minimum and maximum specifications across supported temperature range, typical specifications
TA = 25℃; unless otherwise noted
PARAMETER TEST CONDITION MIN TYP MAX UNIT
ACCURACY AND DRIFT
REF_Z Output voltage 7.6 V
Output voltage
–50 50 mV
accuracy
Output voltage
temperature TA = 0℃ to 70℃ 0.05 0.2 ppm/℃
coefficient(1)
HYSTERESIS AND LONG-TERM STABILITY
1000 hours, TA = 25℃, TSET = 115℃ 3
Long-term stability ppm
1000 hours to 5000 hours , TA = 25℃, TSET = 115℃ 0.3

Output voltage Cycle 1 1 ppm

hysteresis Cycle 2 0.3 ppm
NOISE
enp-p Low frequency noise ƒ = 0.1Hz to 10Hz 0.12 ppmp-p
en Output voltage noise ƒ = 10Hz to 100Hz, 0.6 uVrms
LINE REGULATION
ΔVREF_Z/
Line regulation VDD = 10V to 16.5V 4 10 ppm/V
ΔVDD
POWER SUPPLY
VDD Input voltage 10 16.5 V
VHET Input voltage (HEATP - HEATM) 10 42 V
Start up current 335
IHET TA = 25℃, TSET = 115℃, VHET = 10V 75 mA
Quiescent current
TA = 25℃, TSET = 115℃, VHEATER = 42V 18
IVDD Quiescent current 15 mA
TURNON TIME
REF_Z settled within ±3ppm from VDD and VHET
VREF_Z 100 sec
power up time
Start-up
OP_STBL goes to logic high level form VHET power-up
Heater regulation time 250 ms
time

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6.5 Electrical Characteristics (continued)

At VDD = 10V, VHET= 30V, TSET = 115℃, CREF_Z = 10µF, CVDD = 1µF, IL = 0mA, T-SET = Open, OP_STBL is pulled up to
5V through 10kΩ resistor, minimum and maximum specifications across supported temperature range, typical specifications
TA = 25℃; unless otherwise noted
PARAMETER TEST CONDITION MIN TYP MAX UNIT
OP_STBL
Low level output
VOL OP_STBL Pin Current IOL = 5mA 0.65 V
voltage
Leakage Current
ILKG Pullup Voltage at OP_STBL VPULLUP = 18V 100 nA
when output is high
STABLE CAPACITANCE RANGE
Input capacitor range 0.1 µF
Output capacitor
10 100 µF
range (2)

(1) Temperature drift is calculated using box method

(2) ESR for the capacitor can range from 10mΩ to 400mΩ

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6.6 Typical Characteristics

At TA = 25°C, VIN = 10V, VHET = 30V, CREF_Z = 10μF, CVDD = 1μF, (unless otherwise noted)

10
42 Devices

VREF_Z Variation (ppm)

0

-5

-10
0 10 20 30 40 50 60 70
Ambient Te mperature (C)
Figure 6-2. VREF_Z Vs Free-Air Temperature
Figure 6-1. Long-Term Stability

60

50

40
Population (%)

30

20

10

0
-50 -45 -40 -35 -30 -25 -20 -15
Initial Accuracy (mV)
Figure 6-3. Temperature Drift Distribution Figure 6-4. Accuracy Distribution
17 200
VHET_10V
VHET_12V
VHET_24V
150 VHET_30V
Quiescent Current (mA)

IHET(mA)

15 100

50

13 0
0 10 20 30 40 50 60 70 0 10 20 30 40 50 60 70
Ambient Te mperature [C] Ambient Te mperature (C)

Figure 6-5. Supply Current (IVDD) vs Temperature Figure 6-6. Steady State Heater Current
IHET vs Temperature

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6.6 Typical Characteristics (continued)

At TA = 25°C, VIN = 10V, VHET = 30V, CREF_Z = 10μF, CVDD = 1μF, (unless otherwise noted)

400 120
VHET = 10V VHET = 10V
VHET = 15V VHET = 15V
VHET = 20V 100 VHET = 20V
300 VHET = 30V VHET = 30V
VHET = 40V VHET = 40V
80
IHET (mA)

IHET (mA)
200 60

40
100
20

0 0
-25 0 25 50 75 100 125 150 175 200 25 50 75 100 125 150 175 200
Time(seconds) Time(seconds)
Figure 6-7. Startup Heater Current Figure 6-8. Startup Heater Current (Zoomed View)
IHET vs Time IHET vs Time

40 250

200
30
Noise (nV/Hz)
Population (%)

150

20
100

10
50

0 0
0.084 0.096 0.108 0.12 0.132 0.144 0.156 1x100 1x101 1x102 1x103 1x104 1x105
Frequency(Hz)
Noise (ppmp-p)
Figure 6-10. Noise Density vs Frequency
Figure 6-9. 0.1Hz to 10Hz Voltage Noise Distribution

55 50
50
45 40
40
Population (%)

Population (%)

35
30
30
25
20
20
15
10 10
5
0 0
0.08

0.16

0.24

0.32

0.48

0.56
0.4
0

0 0.5 1 1.5 2 2.5 3

Thermal Hysteresis (ppm)
Solder Shift (mV)
Figure 6-12. Thermal Hysteresis (Cycle 1) Distribution
Figure 6-11. Solder Shift Distribution
TA = 0°C to 70°C

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6.6 Typical Characteristics (continued)

At TA = 25°C, VIN = 10V, VHET = 30V, CREF_Z = 10μF, CVDD = 1μF, (unless otherwise noted)

80 15
VDD = 12V
12 VHET = 12V
9
60

Output Variation (ppm)

6
Population (%)

3
40 0
-3
-6
20
-9
-12
0
0 0.2 0.4 0.6 0.8 1
-15
0 100 200 300 400 500 600 700
Thermal Hysteresis (ppm) Time [s]
Figure 6-13. Thermal Hysteresis (Cycle 2) Distribution Figure 6-14. Startup Behavior
TA = 0°C to 70°C
130 100
Heater Supply Rejection Ratio (dB)
Power Supply Rejection Ratio (dB)

120 90

110 80

100
70

90
60
80
50
70
40
60 1x100 1x101 1x102 1x103 1x104 1x105 1x106
1x101 1x10 2
1x10 3
1x10 4
1x10 5 Frequency (Hz)
Frequency (Hz) Figure 6-16. Heater Supply Rejection Ratio vs Frequency
Figure 6-15. Power-Supply Rejection Ratio vs Frequency

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7 Detailed Description
7.1 Overview
The REF80 is temperature controlled, buried zener voltage reference specifically designed for excellent voltage
stability over time and temperature. The Figure 7-1 is the simplified block diagram of the REF80 showing the
generation of voltage reference with buried zener and on chip heater control.
7.2 Functional Block Diagram
HEATP VDD

T-SET
Heater
Regulator Buried Zener
OP_STBL Reference REF_Z

HEATM REF_GND

Figure 7-1. Functional Block Diagram for REF80

7.3 Feature Description

7.3.1 Heater
REF80 has on chip heater which is factory programmed to TSET temperature as per Table 7-1 to regulate the
temperature of the die within ±1ºC, for the entire operating ambient temperature range. This allows REF80 to
achieve ultra low temperature drift of 0.05ppm/ºC. Heater has dedicated supply pins HEATP and HEATM which
run independent of VDD supply pin. The steady state power dissipation of the heater is directly proportional to
the difference between ambient temperature TA and TSET as per Equation 1. Heater current depends on (HEATP
- HEATM) voltage. Heater takes high transient current at the time of start-up to heat up the device from ambient.
REF80 has heater indicator pin OP_STBL, which de-asserts when the heater reaches within ±0.1% of TSET.
Table 7-1. TSET of Heater
Operating Temperature Range (TA) TSET
0ºC to 70ºC 115ºC

TSET − TA
PHEATER(W) = RθJA − VDD × IVDD (1)

VDD is supply voltage for the chip and IVDD is the supply current.
RθJA depends on board thickness and layout. The data sheet value of RθJA is based on JEDEC standard board.
REF80 offers flexibility to decrease the heater temperature by putting a resistor with less than 2% tolerance on
the T-SET pin as per Table 7-2 to save power and reduce the thermal noise for restricted ambient temperature
applications. TSET must be programmed to 45ºC above the max ambient temperature to make sure that the
heater is regulating the temperature properly. REF80 samples the value of the resistor at the time of startup and
the value of TSET is modified accordingly. Small drift in resistor value does not impact the TSET temperature as
T-SET pin samples discreet value.

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Table 7-2. T-SET Pin Resistor VS Change in TSET

Resistor on T-SET pin Heater Temperature
0 TSET
130kΩ TSET - 10ºC
360kΩ TSET - 20ºC
800kΩ TSET - 30ºC
OPEN TSET

For the applications that require the device to be turned off, make sure to power off for at least 15 seconds
before turning the device back on.
7.3.2 Buried Zener Reference
The 7.6V reference output is generated with an ultra low noise buried zener diode which is biased at 15mA
current. This buried zener exhibits extremely stable long term stability characteristics, which helps REF80 to
achieve an accuracy of calibration grade instruments.

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8 Parameter Measurement Information

8.1 Long-Term Stability
Buried zener references typically exhibit very stable long term stability and are used as an ultra stable reference
for internal calibration of the system. The long-term stability value is tested in a typical setup that reflects
standard PCB board manufacturing practices for references with a strain modulation structure around the device.
The boards are made of standard FR4 material with 35µm of Copper. The devices have been soldered through
standard reflow.
Long term stability setup is designed with utmost care to minimize impact of thermocouple error, strain impact
and mechanical vibration in long term stability measurement. The boards are maintained at 25°C in an air drift
oven with heater temperature set to 115°C in powered on condition for long term stability measurement.
Typical long-term stability characteristic is expressed as a deviation over time. Figure 8-1 shows the typical drift
value for the VREF_Z is 3ppm from 0 to 1000 hours. Drift of REF80 gets flat after 1000 hours. Powered-up burn-in
at room temperature helps REF80 to achieve best long term stability performance.
Power cycle has minimal impact on the stability of the VREF_Z and doesn't change the settled profile. Figure 8-2
shows the behavior of the output when the devices are powered off for 24 hours.

Figure 8-1. Long Term Stability (VREF_Z)

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40

30

Population (%)
20

10

0
0 0.05 0.1 0.15 0.2 0.25 0.3
Power Cycle Hysteresis (ppm)

Figure 8-2. Power Cycle Hysteresis

8.2 Temperature Drift

The REF80 has integrated on chip heater, which is factory programmed to TSET = 115°C temperature. Heater
regulates the TSET temperature to ±1°C for entire operating temperature range. This results in 0.05ppm/°C
temperature drift coefficient for REF80. Figure 6-2 shows temperature drift profile of 42 devices.
The temperature coefficient is calculated using the box method in which a box is formed by the min/max
variation for the nominal output voltage over the operating temperature range. REF80 has a maximum
temperature coefficient of 0.2ppm/°C for 0°C to70°C temperature range. The box method specifies limits for
the temperature error but does not specify the exact shape and slope of the device under test. See SLYT183 for
more information on the box method. The box method equation is shown in Equation 2:

VREF MAX − VREF MIN 6

Drift ppm/°C = VREF 25°C × Temperature Range × 10 (2)

Figure 8-3. Temperature Drift Distribution

8.3 Thermal Hysteresis

Thermal hysteresis is measured with the REF80 soldered to a PCB, similar to a real-world application. Thermal
hysteresis for the device is defined as the change in output voltage after operating the device at 25°C, cycling
the device through the 0°C to 70°C temperature range, and returning to 25°C. Thermal hysteresis for REF80
reduces significantly from second cycle ownwards as shown in Figure 8-4 and Figure 8-5. Hysteresis can be
expressed by Equation 3

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VPRE − VPOST
VHYST ppm = VPRE × 106 (3)

where-
• VHYST = thermal hysteresis (in units of ppm)
• VPRE = output voltage measured at 25°C pre-temperature cycling
• VPOST = output voltage measured after the device has cycled from 25°C through the specified temperature
range of 0°C to75°C and returns to 25°C.

50 80

40
60
Population (%)

Population (%)
30
40
20

20
10

0 0
0 0.5 1 1.5 2 2.5 3 0 0.2 0.4 0.6 0.8 1
Thermal Hysteresis (ppm) Thermal Hysteresis (ppm)
Figure 8-4. Thermal Hysteresis (Cycle 1) Figure 8-5. Thermal Hysteresis (Cycle 2)
Distribution (0°C to 70°C) Distribution (0°C to 70°C)

8.4 Noise Performance

8.4.1 1/f Noise
1/f noise, also known as flicker noise, is dominant mostly in the lower frequency bands. Flicker noise affects the
device output voltage which can affect the ENOB of the signal chain. REF80 data sheet specifies flicker noise for
0.1Hz to 10Hz frequency band where 1/f noise has maximum power. Flicker noise is measured by filtering the
output from 0.1Hz to 10Hz. Since the 1/f noise is an extremely low value, the frequency of interest needs to be
amplified and band-pass filtered as shown in Figure 8-6. 1/f noise must be tested in a Faraday cage enclosure
to block environmental noise. Refer to application note Techniques for Noise Measurements in Precision Series
References for more detail on noise measurement for precision series references.

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+30 V 10 V

HEATP VDD

Low Noise
REF80 REF_Z High-pass Filter
FC = 0.07 Hz
Preamplifier
G = 1000
CL

HEATM REF_GND

2nd Order 2nd Order 2nd Order

High-pass Filter Low-pass Filter Low-pass Filter Scope
FC = 0.1 Hz FC = 10 Hz FC = 10 Hz
G = 10 G = 10 G=1

Figure 8-6. 1/f Noise Test Setup

Typical 1/f noise (0.1Hz to 10Hz) distribution can be seen in Figure 8-7.
40

30
Population (%)

20

10

0
0.084 0.096 0.108 0.12 0.132 0.144 0.156
Noise (ppmp-p)

Figure 8-7. 0.1Hz to 10Hz Voltage Noise Distribution

The 1/f noise is in such a low frequency range that it is not practical to filter out which makes it a key parameter
for ultra-low noise measurements. Noise sensitive designs must use the lowest 1/f noise for the highest precision
measurements. Figure 8-8 shows the effect of 1/f noise over 10s.

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0.05 ppm/div

Time (1s/div)
Figure 8-8. 0.1Hz to 10Hz REF_Z Noise

8.4.2 Broadband Noise

Broadband noise is a noise that appears at higher frequency compared to 1/f noise. The broadband noise is
dominated by white noise as shown in Figure 6-10. The broadband noise is measured by high-pass filtering
the output of the REF80 and measuring the result on a spectrum analyzer as shown in Figure 8-9. The DC
component of the REF80 is removed by using a high-pass filter and then amplified. When measuring broadband
noise, you do not need high gain to achieve maximum bandwidth.
+30 V 10 V

HEATP VDD

High-pass Filter Post Amplifier Spectrum

REF80 REF_Z
G = 11 G = 11 Analyzer
CL

HEATM REF_GND

Figure 8-9. Broadband Noise Test Setup

For noise sensitive designs, a low-pass filter can be used to reduce broadband noise output noise levels by
removing the high frequency components. When designing a low-pass filter special care must be taken to make
sure the output impedance of the filter does not degrade ac performance. This can occur in RC low-pass filters
where a large series resistance can impact the load transients due to output current fluctuations.

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9 Application and Implementation

Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.

9.1 Application Information

Basic applications convert the REFZ output to calibration signal or connect to <= 5V signal for precision data
converter. The table below shows the typical applications of REF80 and the companion data converter.
APPLICATION DATA CONVERTER
Test & Measurement DAC11001B

9.2 Typical Applications

9.2.1 Typical Application: Basic Voltage Reference Connection

The circuit shown in Figure 9-1 shows the basic configuration for the REF80 references. Connect bypass
capacitors according to the guidelines in Section 9.4.1.
+30 V 10 V

5V 1µF 1µF

HEATP VDD

T-SET
10k

7.6V
REF80

REF_Z
10µF
OP-STBL
Stable Temp
Indicator
HEATM REF_GND

Figure 9-1. Basic Reference Connection

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9.2.1.1 Design Requirements

A detailed design procedure is based on a design example. For this design example, use the parameters listed
in Table 9-1 as the input parameters.
Table 9-1. Design Example Parameters
DESIGN PARAMETER VALUE
Input voltage VDD 10V
Heater Voltage VHET (HEATP - HEATM) 30V
Supply decoupling capacitor 1µF
Heater supply decoupling capacitor 1µF
OP-STBL pull-up resistor 10kΩ
OP-STBL pull-up supply 5V

9.2.1.2 Detailed Design Procedure

A bulk capacitor (0.1μF to 10μF) must be connected to the VDD, HEATP and HEATM (when not connected to
GND) pins to improve transient response in the applications where the supply voltage can fluctuate. Connect
an additional 0.1μF capacitor at VDD, HEATP and HEATM pins closer to the device to bypass high frequency
supply noise.
A low ESR (maximum 400mΩ) capacitor of 1μF to 100μF must be connected to the REF_Z pin to provide stable
output. For very low noise applications, special care must be taken with X7R and other MLCC capacitors due
to the piezoelectric effect. More information on how the piezoelectric effect can be explored in systems can be
found in Stress-induced outbursts: Microphonics in ceramic capacitors (Part 1) and Stress-induced outbursts:
Microphonics in ceramic capacitors (Part 2) . Designer must use C0G or film capacitors for noise sensitive
applications. OP-STBL indicates that the on chip heater is regulating the temperature. Connect a pullup resistor
of 10kΩ with suitable logic voltage on this pin. The transient start-up response of the REF80 is shown in REF80
Startup Behavior.
9.2.1.3 Application Curve

Figure 9-2. REF80 Startup Behavior

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9.2.2 Typical Application Circuits

9.2.2.1 Precision Voltage Divider Connection

Precision data converters typically require voltage reference which is less than or equal to 5V. REF80 requires a
precision resistor divider followed by low noise buffer to generate reference voltage for data converters as shown
in Figure 9-3.
The selection of resistor depends on the current capability (< 1mA is preferred) and noise requirement. Minimum
value of resistors are decided by the output current as per Equation 4.

R1 + R2 ≥ 7.6kΩ (4)

Maximum value of the resistors are decided by the noise consideration. Thermal noise of the resistors (parallel
equivalent) is added as per Equation 5

R2 2 2
VREFNoise = R1 + R2 × REF_ZNoise + R1 R2Thermal Noise (5)

Where
• VREFNoise = Reference noise requirement in desired frequency band
• REF_ZNoise = REF80 noise in desired frequency band
• R1||R2Thermal noise = Thermal noise of parallel equivalent of R1 and R2 resistor
R1 and R2 must be precision foil resistors with matched temperature drift for best performance.
+24 V 10 V

3.3V 1µF 1µF

HEATP VDD

T-SET
10k

7.6V OUTPUT
REF80

REF_Z
Stable Temp Indicator
OP-STBL
R1

VREF
HEATM REF_GND
R2

Figure 9-3. Precision Resistor Divider Connection

9.2.2.2 Calibration Signal

Ultra low long term stability and temperature drift makes REF80 an excellent choice for metrology grade
calibration signal generation.

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+15 V 10 V

3.3V

HEATP VDD

T-SET

Pull up
7.6V OUTPUT OPA189

Stable Temp Indicator

REF80 REF_Z + 10V
OP-STBL
–

R1
HEATM REF_GND R2

-15 V

Figure 9-4. 10V Precision Signal With Amplifier And Precision Resistors
+15 V 10 V

HEATP VDD

T-SET VREFP
7.6V OUTPUT
REF80 REF_Z
OP-STBL CL REFPF

C1
HEATM REF_GND REFPS
ROFS

-15 V RCM
DACx1001

RFB

REFNS
C2 DAC-OUT OPA827 VOUT

REFNF

VREFN

Figure 9-5. Precision Signal With DACx1001

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9.3 Power Supply Recommendation

The buried zener reference requires a stable power supply of 10V to 16.5V for stable operation of the REF_Z
pin. Potential difference between HEATP and HEATM pin must be 10V to 42V. HEATP must always be
connected to a positive supply or ground. HEAM must always be connected to a negative supply or ground.
The heater supply must be able to provide high inrush current for fast start-up of the device. TI recommends a
supply bypass capacitor ranging between 0.1µF to 10µF.
9.4 Layout
9.4.1 Layout Guidelines
Section 9.4.2 illustrates an example of a PCB layout (two layer routing) for a data acquisition system using the
REF80. Some key considerations are:
• Noise performance
– Connect low-ESR, 0.1μF ceramic bypass capacitors at VDD, HEATM and HEATP of the REF80.
– Connect 10uF to 100uF class 1 capacitor at REF_Z of the REF80.
– Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if
possible, and only make perpendicular crossings when absolutely necessary.
• Thermal performance
– The layout must minimize the heat dissipation to maintain good thermal resistance for REF80.
– Use minimum copper to route VDD, REF_Z, REF_GND signal.
– Use copper as per current requirement for HEATP and HEATM pin.
– Avoid direct copper pours underneath the package.
– A shield around the device is recommended to achieve best heater regulation.
• Seebeck effect
– Avoid multiple metal-metal junction to minimize Seebeck effect.
• Long term stability performance
– Provide strain relief directly to pins as shown in the Layout Example.
– Provide cuts near to the pin, perpendicular to the pins and corners.
– Avoid single point strain accumulation.

9.4.2 Layout Example

Figure 9-6. Top Layer Layout example for REF80 Figure 9-7. Bottom Layer Layout example for
REF80

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10 Device and Documentation Support

10.1 Documentation Support
10.1.1 Related Documentation
For related documentation see the following:
• Texas Instruments, Voltage Reference Design Tips For Data Converters
• Texas Instruments, Voltage Reference Selection Basics
10.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Notifications to register and receive a weekly digest of any product information that has changed. For change
details, review the revision history included in any revised document.
10.3 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
10.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
10.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.

10.6 Glossary
TI Glossary This glossary lists and explains terms, acronyms, and definitions.

11 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision * (September 2024) to Revision A (March 2025) Page

• Production Data Release....................................................................................................................................1

12 Mechanical, Packaging, and Orderable Information

The following pages include mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

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PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)

PREF80000B1NAJT ACTIVE LCCC NAJ 20 250 TBD Call TI Call TI -55 to 125 Samples

REF80000B1NAJT ACTIVE LCCC NAJ 20 250 Non-RoHS & Call TI N / A for Pkg Type -55 to 125 REF80A1 Samples
Non-Green

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 1
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Addendum-Page 2
 MECHANICAL DATA
NAJ0020A

E20A (Rev F)

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