Computer System Architecture
Chapter 1
Problems:
1- Show the block diagram of the hardware that implements the following register transfer
statement (similar to the figure in page 14):
2- Represent the following conditional control statement by two register transfer statements
with control functions.
3- A digital computer has a common bus system for 32 registers, each register is 64 bits.
The bus is constructed with multiplexers
a. How many multiplexers in the bus?
b. What is the size of multiplexers?
c. How many selection lines in each multiplexer?
4- The outputs of four registers, R0, R1, R2, R3, are connected throught 4-to-1-line
multiplexers to the inputs of a fifth register, R5. Each register is eight bits long. The
required transfers are dictated by four timming variables T0 through T3 as follows:
Regarding the timing variables, only one variable is equal to 1 at any given time, while
the other three are equal to 0.
Draw a block diagram showing the hardware implementation of the register transfers.
Include the connections necessary from the four timing variables to the selection inputs
of the multiplexers and to the load input of register R5.
5- Explain the memory operation in each case:
6- Draw the block diagram for the hardware that implements the following statements:
Where AR and BR are two n-bit registers and x, y, and z are control variables. Include
the logic gates for the control function.
7- The adder-subtractor circuit (page 29) has the following values for input M and data
inputs A and B. In each case, determine the values of the outputs: s3, s2, s2, s0, and c4.
8- Design a 4-bit combinational circuit decrementer using four full-adder circuits.
9- Design an arithmetic circuit with one selection variable S and two n-bit data inputs A and
B. the circuit generates the following four arithmetic operations in conjunction with the
input carry Cin.
Draw the logic diagram for the first two stages.
10- Design a digital circuit that performs the four logic operations of X-OR, X-NOR, NOR,
NAND. Use two selection variables. Show the logic diagram of one typical stage.
11- Register A holds the 8-bit binary 11011001. Determine the B operand and the logic
microoperation to be performed in order to change the value in A to:
a. 01101101
b. 11111101
12- The 8-bit registers AR, BR, CR, and DR initially have the following values:
Determine the 8-bit values in each register after the execution of the following sequence
of microoperations.
13- An 8-bit register contains the binary value 10011100. What is the register value after an
arithmetic shift right? Starting from the initial number 10011100, determine the register
value after an arithmetic shift left, and state whether there is an overflow.
14- Starting from an initial value of R = 11011101, determine the sequence of binary values
in R after a logical shift left, followed by a circular shift right, followed by a logical shift
right and finally a circular shift left.
15- What is the value of output H in the figure page 49 if input A is 1001, S=1, IR=1, and
IL=0?
16- What is wrong with the following register transfer statements?
